Coverage Report

Created: 2023-11-19 10:10

/__w/smoldot/smoldot/repo/target/debug/build/cranelift-codegen-a243f9cd104431ef/out/isle_x64.rs
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Source (jump to first uncovered line)
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// GENERATED BY ISLE. DO NOT EDIT!
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//
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// Generated automatically from the instruction-selection DSL code in:
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// - src/prelude.isle
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// - src/prelude_lower.isle
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// - src/isa/x64/inst.isle
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// - src/isa/x64/lower.isle
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// - /__w/smoldot/smoldot/repo/target/debug/build/cranelift-codegen-a243f9cd104431ef/out/clif_lower.isle
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use super::*;  // Pulls in all external types.
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use std::marker::PhantomData;
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/// Context during lowering: an implementation of this trait
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/// must be provided with all external constructors and extractors.
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/// A mutable borrow is passed along through all lowering logic.
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pub trait Context {
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    fn unit(&mut self, ) -> Unit;
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    fn value_type(&mut self, arg0: Value) -> Type;
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    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
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    fn offset32(&mut self, arg0: Offset32) -> i32;
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    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
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    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
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    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
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    fn simm32(&mut self, arg0: Imm64) -> Option<i32>;
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    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
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    fn u8_as_i8(&mut self, arg0: u8) -> i8;
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    fn u8_as_u32(&mut self, arg0: u8) -> u32;
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    fn u8_as_u64(&mut self, arg0: u8) -> u64;
29
    fn u16_as_u64(&mut self, arg0: u16) -> u64;
30
    fn u32_as_u64(&mut self, arg0: u32) -> u64;
31
    fn i32_as_i64(&mut self, arg0: i32) -> i64;
32
    fn i64_as_u64(&mut self, arg0: i64) -> u64;
33
    fn i64_neg(&mut self, arg0: i64) -> i64;
34
    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
35
    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
36
    fn u64_as_i32(&mut self, arg0: u64) -> i32;
37
    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
38
    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
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    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
40
    fn u8_sub(&mut self, arg0: u8, arg1: u8) -> u8;
41
    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
42
    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
43
    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
44
    fn s32_add_fallible(&mut self, arg0: i32, arg1: i32) -> Option<i32>;
45
    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
46
    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
47
    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
48
    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
49
    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
50
    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
51
    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
52
    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
53
    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
54
    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
55
    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
56
    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
57
    fn u64_not(&mut self, arg0: u64) -> u64;
58
    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
59
    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
60
    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
61
    fn i64_shr(&mut self, arg0: i64, arg1: i64) -> i64;
62
    fn i64_ctz(&mut self, arg0: i64) -> i64;
63
    fn i64_sextend_u64(&mut self, arg0: Type, arg1: u64) -> i64;
64
    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
65
    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
66
    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
67
    fn u64_is_zero(&mut self, arg0: u64) -> bool;
68
    fn u64_is_odd(&mut self, arg0: u64) -> bool;
69
    fn u128_replicated_u64(&mut self, arg0: u128) -> Option<u64>;
70
    fn u64_replicated_u32(&mut self, arg0: u64) -> Option<u64>;
71
    fn u32_replicated_u16(&mut self, arg0: u64) -> Option<u64>;
72
    fn u16_replicated_u8(&mut self, arg0: u64) -> Option<u8>;
73
    fn ty_umin(&mut self, arg0: Type) -> u64;
74
    fn ty_umax(&mut self, arg0: Type) -> u64;
75
    fn ty_smin(&mut self, arg0: Type) -> u64;
76
    fn ty_smax(&mut self, arg0: Type) -> u64;
77
    fn ty_bits(&mut self, arg0: Type) -> u8;
78
    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
79
    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
80
    fn ty_mask(&mut self, arg0: Type) -> u64;
81
    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
82
    fn ty_lane_count(&mut self, arg0: Type) -> u64;
83
    fn ty_bytes(&mut self, arg0: Type) -> u16;
84
    fn lane_type(&mut self, arg0: Type) -> Type;
85
    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
86
    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
87
    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
88
    fn mem_flags_trusted(&mut self, ) -> MemFlags;
89
    fn intcc_swap_args(&mut self, arg0: &IntCC) -> IntCC;
90
    fn intcc_complement(&mut self, arg0: &IntCC) -> IntCC;
91
    fn intcc_without_eq(&mut self, arg0: &IntCC) -> IntCC;
92
    fn floatcc_swap_args(&mut self, arg0: &FloatCC) -> FloatCC;
93
    fn floatcc_complement(&mut self, arg0: &FloatCC) -> FloatCC;
94
    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
95
    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
96
    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
97
    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
98
    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
99
    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
100
    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
101
    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
102
    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
103
    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
104
    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
105
    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
106
    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
107
    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
108
    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
109
    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
110
    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
111
    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
112
    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
113
    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
114
    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
115
    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
116
    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
117
    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
118
    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
119
    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
120
    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
121
    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
122
    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
123
    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
124
    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
125
    fn u64_from_bool(&mut self, arg0: bool) -> u64;
126
    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
127
    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
128
    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
129
    fn imm64(&mut self, arg0: u64) -> Imm64;
130
    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
131
    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
132
    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
133
    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
134
    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
135
    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
136
    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
137
    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
138
    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
139
    fn offset32_to_i32(&mut self, arg0: Offset32) -> i32;
140
    fn i32_to_offset32(&mut self, arg0: i32) -> Offset32;
141
    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
142
    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
143
    fn trap_code_division_by_zero(&mut self, ) -> TrapCode;
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    fn trap_code_integer_overflow(&mut self, ) -> TrapCode;
145
    fn trap_code_bad_conversion_to_integer(&mut self, ) -> TrapCode;
146
    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
147
    fn range_view(&mut self, arg0: Range) -> RangeView;
148
    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
149
    fn writable_value_reg(&mut self, arg0: WritableReg) -> WritableValueRegs;
150
    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
151
    fn writable_value_regs(&mut self, arg0: WritableReg, arg1: WritableReg) -> WritableValueRegs;
152
    fn value_regs_invalid(&mut self, ) -> ValueRegs;
153
    fn output_none(&mut self, ) -> InstOutput;
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    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
155
    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
156
    fn output_builder_new(&mut self, ) -> InstOutputBuilder;
157
    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
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    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
159
    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
160
    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
161
    fn invalid_reg(&mut self, ) -> Reg;
162
    fn mark_value_used(&mut self, arg0: Value) -> Unit;
163
    fn put_in_reg(&mut self, arg0: Value) -> Reg;
164
    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
165
    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
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    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
167
    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
168
    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
169
    fn single_target(&mut self, arg0: &MachLabelSlice) -> Option<MachLabel>;
170
    fn two_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, MachLabel)>;
171
    fn jump_table_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, BoxVecMachLabel)>;
172
    fn jump_table_size(&mut self, arg0: &BoxVecMachLabel) -> u32;
173
    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
174
    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
175
    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
176
    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
177
    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
178
    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
179
    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
180
    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
181
    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
182
    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
183
    fn i64_from_iconst(&mut self, arg0: Value) -> Option<i64>;
184
    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
185
    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
186
    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
187
    fn emit(&mut self, arg0: &MInst) -> Unit;
188
    fn sink_inst(&mut self, arg0: Inst) -> Unit;
189
    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
190
    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
191
    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
192
    fn tls_model(&mut self, arg0: Type) -> TlsModel;
193
    fn tls_model_is_elf_gd(&mut self, ) -> Option<Unit>;
194
    fn tls_model_is_macho(&mut self, ) -> Option<Unit>;
195
    fn tls_model_is_coff(&mut self, ) -> Option<Unit>;
196
    fn preserve_frame_pointers(&mut self, ) -> Option<Unit>;
197
    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
198
    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
199
    fn symbol_value_data(&mut self, arg0: GlobalValue) -> Option<(ExternalName, RelocDistance, i64)>;
200
    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
201
    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
202
    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
203
    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
204
    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
205
    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
206
    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
207
    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
208
    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
209
    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
210
    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
211
    fn abi_num_args(&mut self, arg0: Sig) -> usize;
212
    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
213
    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
214
    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
215
    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
216
    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
217
    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
218
    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
219
    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
220
    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
221
    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
222
    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
223
    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
224
    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
225
    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
226
    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
227
    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
228
    fn gen_return_call(&mut self, arg0: SigRef, arg1: ExternalName, arg2: RelocDistance, arg3: ValueSlice) -> InstOutput;
229
    fn gen_return_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
230
    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
231
    fn operand_size_of_type_32_64(&mut self, arg0: Type) -> OperandSize;
232
    fn raw_operand_size_of_type(&mut self, arg0: Type) -> OperandSize;
233
    fn put_in_reg_mem_imm(&mut self, arg0: Value) -> RegMemImm;
234
    fn put_in_reg_mem(&mut self, arg0: Value) -> RegMem;
235
    fn synthetic_amode_to_reg_mem(&mut self, arg0: &SyntheticAmode) -> RegMem;
236
    fn amode_to_synthetic_amode(&mut self, arg0: &Amode) -> SyntheticAmode;
237
    fn sum_extend_fits_in_32_bits(&mut self, arg0: Type, arg1: Imm64, arg2: Offset32) -> Option<u32>;
238
    fn amode_offset(&mut self, arg0: &Amode, arg1: i32) -> Amode;
239
    fn zero_offset(&mut self, ) -> Offset32;
240
    fn intcc_to_cc(&mut self, arg0: &IntCC) -> CC;
241
    fn cc_invert(&mut self, arg0: &CC) -> CC;
242
    fn cc_nz_or_z(&mut self, arg0: &CC) -> Option<CC>;
243
    fn encode_fcmp_imm(&mut self, arg0: &FcmpImm) -> u8;
244
    fn encode_round_imm(&mut self, arg0: &RoundImm) -> u8;
245
    fn imm8_reg_to_imm8_gpr(&mut self, arg0: &Imm8Reg) -> Imm8Gpr;
246
    fn gpr_from_imm8_gpr(&mut self, arg0: &Imm8Gpr) -> Option<Gpr>;
247
    fn imm8_from_imm8_gpr(&mut self, arg0: &Imm8Gpr) -> Option<u8>;
248
    fn writable_gpr_to_reg(&mut self, arg0: WritableGpr) -> WritableReg;
249
    fn writable_xmm_to_reg(&mut self, arg0: WritableXmm) -> WritableReg;
250
    fn writable_reg_to_xmm(&mut self, arg0: WritableReg) -> WritableXmm;
251
    fn writable_xmm_to_xmm(&mut self, arg0: WritableXmm) -> Xmm;
252
    fn writable_gpr_to_gpr(&mut self, arg0: WritableGpr) -> Gpr;
253
    fn gpr_to_reg(&mut self, arg0: Gpr) -> Reg;
254
    fn gpr_to_gpr_mem(&mut self, arg0: Gpr) -> GprMem;
255
    fn gpr_to_gpr_mem_imm(&mut self, arg0: Gpr) -> GprMemImm;
256
    fn xmm_to_reg(&mut self, arg0: Xmm) -> Reg;
257
    fn xmm_to_xmm_mem_imm(&mut self, arg0: Xmm) -> XmmMemImm;
258
    fn xmm_mem_to_xmm_mem_imm(&mut self, arg0: &XmmMem) -> XmmMemImm;
259
    fn xmm_mem_to_xmm_mem_aligned(&mut self, arg0: &XmmMem) -> XmmMemAligned;
260
    fn xmm_mem_imm_to_xmm_mem_aligned_imm(&mut self, arg0: &XmmMemImm) -> XmmMemAlignedImm;
261
    fn temp_writable_gpr(&mut self, ) -> WritableGpr;
262
    fn temp_writable_xmm(&mut self, ) -> WritableXmm;
263
    fn reg_mem_to_xmm_mem(&mut self, arg0: &RegMem) -> XmmMem;
264
    fn reg_to_reg_mem_imm(&mut self, arg0: Reg) -> RegMemImm;
265
    fn gpr_mem_imm_new(&mut self, arg0: &RegMemImm) -> GprMemImm;
266
    fn xmm_mem_imm_new(&mut self, arg0: &RegMemImm) -> XmmMemImm;
267
    fn xmm_to_xmm_mem(&mut self, arg0: Xmm) -> XmmMem;
268
    fn xmm_mem_to_reg_mem(&mut self, arg0: &XmmMem) -> RegMem;
269
    fn gpr_mem_to_reg_mem(&mut self, arg0: &GprMem) -> RegMem;
270
    fn xmm_new(&mut self, arg0: Reg) -> Xmm;
271
    fn gpr_new(&mut self, arg0: Reg) -> Gpr;
272
    fn reg_mem_to_gpr_mem(&mut self, arg0: &RegMem) -> GprMem;
273
    fn reg_to_gpr_mem(&mut self, arg0: Reg) -> GprMem;
274
    fn put_in_xmm_mem(&mut self, arg0: Value) -> XmmMem;
275
    fn put_in_xmm_mem_imm(&mut self, arg0: Value) -> XmmMemImm;
276
    fn gpr_to_imm8_gpr(&mut self, arg0: Gpr) -> Imm8Gpr;
277
    fn imm8_to_imm8_gpr(&mut self, arg0: u8) -> Imm8Gpr;
278
    fn xmi_imm(&mut self, arg0: u32) -> XmmMemImm;
279
    fn type_register_class(&mut self, arg0: Type) -> Option<RegisterClass>;
280
    fn use_avx512vl(&mut self, ) -> bool;
281
    fn use_avx512dq(&mut self, ) -> bool;
282
    fn use_avx512f(&mut self, ) -> bool;
283
    fn use_avx512bitalg(&mut self, ) -> bool;
284
    fn use_avx512vbmi(&mut self, ) -> bool;
285
    fn use_lzcnt(&mut self, ) -> bool;
286
    fn use_bmi1(&mut self, ) -> bool;
287
    fn use_bmi2(&mut self, ) -> bool;
288
    fn use_popcnt(&mut self, ) -> bool;
289
    fn use_fma(&mut self, ) -> bool;
290
    fn use_ssse3(&mut self, ) -> bool;
291
    fn use_sse41(&mut self, ) -> bool;
292
    fn use_sse42(&mut self, ) -> bool;
293
    fn use_avx(&mut self, ) -> bool;
294
    fn use_avx2(&mut self, ) -> bool;
295
    fn imm8_from_value(&mut self, arg0: Value) -> Option<Imm8Reg>;
296
    fn const_to_type_masked_imm8(&mut self, arg0: u64, arg1: Type) -> Imm8Gpr;
297
    fn shift_mask(&mut self, arg0: Type) -> u8;
298
    fn shift_amount_masked(&mut self, arg0: Type, arg1: Imm64) -> u8;
299
    fn simm32_from_value(&mut self, arg0: Value) -> Option<GprMemImm>;
300
    fn simm32_from_imm64(&mut self, arg0: Imm64) -> Option<GprMemImm>;
301
    fn sinkable_load(&mut self, arg0: Value) -> Option<SinkableLoad>;
302
    fn sinkable_load_exact(&mut self, arg0: Value) -> Option<SinkableLoad>;
303
    fn sink_load(&mut self, arg0: &SinkableLoad) -> SyntheticAmode;
304
    fn ext_mode(&mut self, arg0: u16, arg1: u16) -> ExtMode;
305
    fn gen_call(&mut self, arg0: SigRef, arg1: ExternalName, arg2: RelocDistance, arg3: ValueSlice) -> InstOutput;
306
    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
307
    fn nonzero_u64_fits_in_u32(&mut self, arg0: u64) -> Option<u64>;
308
    fn ty_int_bool_or_ref(&mut self, arg0: Type) -> Option<()>;
309
    fn atomic_rmw_op_to_mach_atomic_rmw_op(&mut self, arg0: &AtomicRmwOp) -> MachAtomicRmwOp;
310
    fn shuffle_0_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
311
    fn shuffle_0_15_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
312
    fn shuffle_16_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
313
    fn perm_from_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
314
    fn perm_from_mask_with_zeros(&mut self, arg0: &VecMask) -> Option<(VCodeConstant, VCodeConstant)>;
315
    fn const_to_synthetic_amode(&mut self, arg0: VCodeConstant) -> SyntheticAmode;
316
    fn preg_rbp(&mut self, ) -> PReg;
317
    fn preg_rsp(&mut self, ) -> PReg;
318
    fn preg_pinned(&mut self, ) -> PReg;
319
    fn libcall_1(&mut self, arg0: &LibCall, arg1: Reg) -> Reg;
320
    fn libcall_2(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg) -> Reg;
321
    fn libcall_3(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg, arg3: Reg) -> Reg;
322
    fn ishl_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
323
    fn ishl_i8x16_mask_table(&mut self, ) -> SyntheticAmode;
324
    fn ushr_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
325
    fn ushr_i8x16_mask_table(&mut self, ) -> SyntheticAmode;
326
    fn vconst_all_ones_or_all_zeros(&mut self, arg0: Constant) -> Option<()>;
327
    fn insert_i8x16_lane_hole(&mut self, arg0: u8) -> VCodeConstant;
328
    fn sse_insertps_lane_imm(&mut self, arg0: u8) -> u8;
329
    fn pblendw_imm(&mut self, arg0: Immediate) -> Option<u8>;
330
    fn palignr_imm_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
331
    fn pshuflw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
332
    fn pshuflw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
333
    fn pshufhw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
334
    fn pshufhw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
335
    fn pshufd_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
336
    fn pshufd_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
337
    fn shufps_imm(&mut self, arg0: Immediate) -> Option<u8>;
338
    fn shufps_rev_imm(&mut self, arg0: Immediate) -> Option<u8>;
339
    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
340
    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
341
    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
342
    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
343
    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
344
    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
345
}
346
347
           pub trait ContextIter {
348
               type Context;
349
               type Output;
350
               fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
351
           }
352
353
           pub struct ContextIterWrapper<Item, I: Iterator < Item = Item>, C: Context> {
354
               iter: I,
355
               _ctx: PhantomData<C>,
356
           }
357
           impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
358
0
               fn from(iter: I) -> Self {
359
0
                   Self { iter, _ctx: PhantomData }
360
0
               }
361
           }
362
           impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
363
               type Context = C;
364
               type Output = Item;
365
0
               fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
366
0
                   self.iter.next()
367
0
               }
368
           }
369
           
370
371
/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
372
0
#[derive(Clone, Debug)]
373
pub enum MultiReg {
374
    Empty,
375
    One {
376
        a: Reg,
377
    },
378
    Two {
379
        a: Reg,
380
        b: Reg,
381
    },
382
    Three {
383
        a: Reg,
384
        b: Reg,
385
        c: Reg,
386
    },
387
    Four {
388
        a: Reg,
389
        b: Reg,
390
        c: Reg,
391
        d: Reg,
392
    },
393
}
394
395
/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 340.
396
340k
#[derive(Clone, 
D0
ebu
g0
)]
397
pub enum SideEffectNoResult {
398
    Inst {
399
        inst: MInst,
400
    },
401
    Inst2 {
402
        inst1: MInst,
403
        inst2: MInst,
404
    },
405
    Inst3 {
406
        inst1: MInst,
407
        inst2: MInst,
408
        inst3: MInst,
409
    },
410
}
411
412
/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 382.
413
1.43M
#[derive(Clone, 
D0
ebu
g0
)]
414
pub enum ProducesFlags {
415
    AlreadyExistingFlags,
416
    ProducesFlagsSideEffect {
417
        inst: MInst,
418
    },
419
    ProducesFlagsTwiceSideEffect {
420
        inst1: MInst,
421
        inst2: MInst,
422
    },
423
    ProducesFlagsReturnsReg {
424
        inst: MInst,
425
        result: Reg,
426
    },
427
    ProducesFlagsReturnsResultWithConsumer {
428
        inst: MInst,
429
        result: Reg,
430
    },
431
}
432
433
/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 401.
434
0
#[derive(Clone, Debug)]
435
pub enum ConsumesAndProducesFlags {
436
    SideEffect {
437
        inst: MInst,
438
    },
439
    ReturnsReg {
440
        inst: MInst,
441
        result: Reg,
442
    },
443
}
444
445
/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 409.
446
24.2k
#[derive(Clone, 
D0
ebu
g0
)]
447
pub enum ConsumesFlags {
448
    ConsumesFlagsSideEffect {
449
        inst: MInst,
450
    },
451
    ConsumesFlagsSideEffect2 {
452
        inst1: MInst,
453
        inst2: MInst,
454
    },
455
    ConsumesFlagsReturnsResultWithProducer {
456
        inst: MInst,
457
        result: Reg,
458
    },
459
    ConsumesFlagsReturnsReg {
460
        inst: MInst,
461
        result: Reg,
462
    },
463
    ConsumesFlagsTwiceReturnsValueRegs {
464
        inst1: MInst,
465
        inst2: MInst,
466
        result: ValueRegs,
467
    },
468
    ConsumesFlagsFourTimesReturnsValueRegs {
469
        inst1: MInst,
470
        inst2: MInst,
471
        inst3: MInst,
472
        inst4: MInst,
473
        result: ValueRegs,
474
    },
475
}
476
477
/// Internal type MInst: defined at src/isa/x64/inst.isle line 8.
478
9.22M
#[derive(Clone)]
479
pub enum MInst {
480
    Nop {
481
        len: u8,
482
    },
483
    AluRmiR {
484
        size: OperandSize,
485
        op: AluRmiROpcode,
486
        src1: Gpr,
487
        src2: GprMemImm,
488
        dst: WritableGpr,
489
    },
490
    AluRM {
491
        size: OperandSize,
492
        op: AluRmiROpcode,
493
        src1_dst: SyntheticAmode,
494
        src2: Gpr,
495
    },
496
    AluRmRVex {
497
        size: OperandSize,
498
        op: AluRmROpcode,
499
        src1: Gpr,
500
        src2: GprMem,
501
        dst: WritableGpr,
502
    },
503
    AluConstOp {
504
        op: AluRmiROpcode,
505
        size: OperandSize,
506
        dst: WritableGpr,
507
    },
508
    UnaryRmR {
509
        size: OperandSize,
510
        op: UnaryRmROpcode,
511
        src: GprMem,
512
        dst: WritableGpr,
513
    },
514
    UnaryRmRVex {
515
        size: OperandSize,
516
        op: UnaryRmRVexOpcode,
517
        src: GprMem,
518
        dst: WritableGpr,
519
    },
520
    UnaryRmRImmVex {
521
        size: OperandSize,
522
        op: UnaryRmRImmVexOpcode,
523
        src: GprMem,
524
        dst: WritableGpr,
525
        imm: u8,
526
    },
527
    Not {
528
        size: OperandSize,
529
        src: Gpr,
530
        dst: WritableGpr,
531
    },
532
    Neg {
533
        size: OperandSize,
534
        src: Gpr,
535
        dst: WritableGpr,
536
    },
537
    Div {
538
        size: OperandSize,
539
        sign: DivSignedness,
540
        trap: TrapCode,
541
        divisor: GprMem,
542
        dividend_lo: Gpr,
543
        dividend_hi: Gpr,
544
        dst_quotient: WritableGpr,
545
        dst_remainder: WritableGpr,
546
    },
547
    Div8 {
548
        sign: DivSignedness,
549
        trap: TrapCode,
550
        divisor: GprMem,
551
        dividend: Gpr,
552
        dst: WritableGpr,
553
    },
554
    MulHi {
555
        size: OperandSize,
556
        signed: bool,
557
        src1: Gpr,
558
        src2: GprMem,
559
        dst_lo: WritableGpr,
560
        dst_hi: WritableGpr,
561
    },
562
    UMulLo {
563
        size: OperandSize,
564
        src1: Gpr,
565
        src2: GprMem,
566
        dst: WritableGpr,
567
    },
568
    CheckedSRemSeq {
569
        size: OperandSize,
570
        dividend_lo: Gpr,
571
        dividend_hi: Gpr,
572
        divisor: Gpr,
573
        dst_quotient: WritableGpr,
574
        dst_remainder: WritableGpr,
575
    },
576
    CheckedSRemSeq8 {
577
        dividend: Gpr,
578
        divisor: Gpr,
579
        dst: WritableGpr,
580
    },
581
    SignExtendData {
582
        size: OperandSize,
583
        src: Gpr,
584
        dst: WritableGpr,
585
    },
586
    Imm {
587
        dst_size: OperandSize,
588
        simm64: u64,
589
        dst: WritableGpr,
590
    },
591
    MovRR {
592
        size: OperandSize,
593
        src: Gpr,
594
        dst: WritableGpr,
595
    },
596
    MovFromPReg {
597
        src: PReg,
598
        dst: WritableGpr,
599
    },
600
    MovToPReg {
601
        src: Gpr,
602
        dst: PReg,
603
    },
604
    MovzxRmR {
605
        ext_mode: ExtMode,
606
        src: GprMem,
607
        dst: WritableGpr,
608
    },
609
    Mov64MR {
610
        src: SyntheticAmode,
611
        dst: WritableGpr,
612
    },
613
    LoadEffectiveAddress {
614
        addr: SyntheticAmode,
615
        dst: WritableGpr,
616
        size: OperandSize,
617
    },
618
    MovsxRmR {
619
        ext_mode: ExtMode,
620
        src: GprMem,
621
        dst: WritableGpr,
622
    },
623
    MovImmM {
624
        size: OperandSize,
625
        simm32: i32,
626
        dst: SyntheticAmode,
627
    },
628
    MovRM {
629
        size: OperandSize,
630
        src: Gpr,
631
        dst: SyntheticAmode,
632
    },
633
    ShiftR {
634
        size: OperandSize,
635
        kind: ShiftKind,
636
        src: Gpr,
637
        num_bits: Imm8Gpr,
638
        dst: WritableGpr,
639
    },
640
    XmmRmiReg {
641
        opcode: SseOpcode,
642
        src1: Xmm,
643
        src2: XmmMemAlignedImm,
644
        dst: WritableXmm,
645
    },
646
    CmpRmiR {
647
        size: OperandSize,
648
        opcode: CmpOpcode,
649
        src: GprMemImm,
650
        dst: Gpr,
651
    },
652
    Setcc {
653
        cc: CC,
654
        dst: WritableGpr,
655
    },
656
    Bswap {
657
        size: OperandSize,
658
        src: Gpr,
659
        dst: WritableGpr,
660
    },
661
    Cmove {
662
        size: OperandSize,
663
        cc: CC,
664
        consequent: GprMem,
665
        alternative: Gpr,
666
        dst: WritableGpr,
667
    },
668
    XmmCmove {
669
        ty: Type,
670
        cc: CC,
671
        consequent: XmmMemAligned,
672
        alternative: Xmm,
673
        dst: WritableXmm,
674
    },
675
    Push64 {
676
        src: GprMemImm,
677
    },
678
    Pop64 {
679
        dst: WritableGpr,
680
    },
681
    StackProbeLoop {
682
        tmp: WritableReg,
683
        frame_size: u32,
684
        guard_size: u32,
685
    },
686
    XmmRmR {
687
        op: SseOpcode,
688
        src1: Xmm,
689
        src2: XmmMemAligned,
690
        dst: WritableXmm,
691
    },
692
    XmmRmRUnaligned {
693
        op: SseOpcode,
694
        src1: Xmm,
695
        src2: XmmMem,
696
        dst: WritableXmm,
697
    },
698
    XmmRmRBlend {
699
        op: SseOpcode,
700
        src1: Xmm,
701
        src2: XmmMemAligned,
702
        mask: Xmm,
703
        dst: WritableXmm,
704
    },
705
    XmmRmiRVex {
706
        op: AvxOpcode,
707
        src1: Xmm,
708
        src2: XmmMemImm,
709
        dst: WritableXmm,
710
    },
711
    XmmRmRImmVex {
712
        op: AvxOpcode,
713
        src1: Xmm,
714
        src2: XmmMem,
715
        dst: WritableXmm,
716
        imm: u8,
717
    },
718
    XmmVexPinsr {
719
        op: AvxOpcode,
720
        src1: Xmm,
721
        src2: GprMem,
722
        dst: WritableXmm,
723
        imm: u8,
724
    },
725
    XmmRmRVex3 {
726
        op: AvxOpcode,
727
        src1: Xmm,
728
        src2: Xmm,
729
        src3: XmmMem,
730
        dst: WritableXmm,
731
    },
732
    XmmRmRBlendVex {
733
        op: AvxOpcode,
734
        src1: Xmm,
735
        src2: XmmMem,
736
        mask: Xmm,
737
        dst: WritableXmm,
738
    },
739
    XmmUnaryRmRVex {
740
        op: AvxOpcode,
741
        src: XmmMem,
742
        dst: WritableXmm,
743
    },
744
    XmmUnaryRmRImmVex {
745
        op: AvxOpcode,
746
        src: XmmMem,
747
        dst: WritableXmm,
748
        imm: u8,
749
    },
750
    XmmMovRMVex {
751
        op: AvxOpcode,
752
        src: Xmm,
753
        dst: SyntheticAmode,
754
    },
755
    XmmMovRMImmVex {
756
        op: AvxOpcode,
757
        src: Xmm,
758
        dst: SyntheticAmode,
759
        imm: u8,
760
    },
761
    XmmToGprImmVex {
762
        op: AvxOpcode,
763
        src: Xmm,
764
        dst: WritableGpr,
765
        imm: u8,
766
    },
767
    GprToXmmVex {
768
        op: AvxOpcode,
769
        src: GprMem,
770
        dst: WritableXmm,
771
        src_size: OperandSize,
772
    },
773
    XmmToGprVex {
774
        op: AvxOpcode,
775
        src: Xmm,
776
        dst: WritableGpr,
777
        dst_size: OperandSize,
778
    },
779
    XmmRmREvex {
780
        op: Avx512Opcode,
781
        src1: Xmm,
782
        src2: XmmMem,
783
        dst: WritableXmm,
784
    },
785
    XmmUnaryRmRImmEvex {
786
        op: Avx512Opcode,
787
        src: XmmMem,
788
        dst: WritableXmm,
789
        imm: u8,
790
    },
791
    XmmRmREvex3 {
792
        op: Avx512Opcode,
793
        src1: Xmm,
794
        src2: Xmm,
795
        src3: XmmMem,
796
        dst: WritableXmm,
797
    },
798
    XmmUnaryRmR {
799
        op: SseOpcode,
800
        src: XmmMemAligned,
801
        dst: WritableXmm,
802
    },
803
    XmmUnaryRmRUnaligned {
804
        op: SseOpcode,
805
        src: XmmMem,
806
        dst: WritableXmm,
807
    },
808
    XmmUnaryRmRImm {
809
        op: SseOpcode,
810
        src: XmmMemAligned,
811
        imm: u8,
812
        dst: WritableXmm,
813
    },
814
    XmmUnaryRmREvex {
815
        op: Avx512Opcode,
816
        src: XmmMem,
817
        dst: WritableXmm,
818
    },
819
    XmmMovRM {
820
        op: SseOpcode,
821
        src: Xmm,
822
        dst: SyntheticAmode,
823
    },
824
    XmmMovRMImm {
825
        op: SseOpcode,
826
        src: Xmm,
827
        dst: SyntheticAmode,
828
        imm: u8,
829
    },
830
    XmmToGpr {
831
        op: SseOpcode,
832
        src: Xmm,
833
        dst: WritableGpr,
834
        dst_size: OperandSize,
835
    },
836
    XmmToGprImm {
837
        op: SseOpcode,
838
        src: Xmm,
839
        dst: WritableGpr,
840
        imm: u8,
841
    },
842
    GprToXmm {
843
        op: SseOpcode,
844
        src: GprMem,
845
        dst: WritableXmm,
846
        src_size: OperandSize,
847
    },
848
    CvtIntToFloat {
849
        op: SseOpcode,
850
        src1: Xmm,
851
        src2: GprMem,
852
        dst: WritableXmm,
853
        src2_size: OperandSize,
854
    },
855
    CvtIntToFloatVex {
856
        op: AvxOpcode,
857
        src1: Xmm,
858
        src2: GprMem,
859
        dst: WritableXmm,
860
        src2_size: OperandSize,
861
    },
862
    CvtUint64ToFloatSeq {
863
        dst_size: OperandSize,
864
        src: Gpr,
865
        dst: WritableXmm,
866
        tmp_gpr1: WritableGpr,
867
        tmp_gpr2: WritableGpr,
868
    },
869
    CvtFloatToSintSeq {
870
        dst_size: OperandSize,
871
        src_size: OperandSize,
872
        is_saturating: bool,
873
        src: Xmm,
874
        dst: WritableGpr,
875
        tmp_gpr: WritableGpr,
876
        tmp_xmm: WritableXmm,
877
    },
878
    CvtFloatToUintSeq {
879
        dst_size: OperandSize,
880
        src_size: OperandSize,
881
        is_saturating: bool,
882
        src: Xmm,
883
        dst: WritableGpr,
884
        tmp_gpr: WritableGpr,
885
        tmp_xmm: WritableXmm,
886
        tmp_xmm2: WritableXmm,
887
    },
888
    XmmMinMaxSeq {
889
        size: OperandSize,
890
        is_min: bool,
891
        lhs: Xmm,
892
        rhs: Xmm,
893
        dst: WritableXmm,
894
    },
895
    XmmCmpRmR {
896
        op: SseOpcode,
897
        src: XmmMemAligned,
898
        dst: Xmm,
899
    },
900
    XmmRmRImm {
901
        op: SseOpcode,
902
        src1: Reg,
903
        src2: RegMem,
904
        dst: WritableReg,
905
        imm: u8,
906
        size: OperandSize,
907
    },
908
    CallKnown {
909
        dest: ExternalName,
910
        info: BoxCallInfo,
911
    },
912
    CallUnknown {
913
        dest: RegMem,
914
        info: BoxCallInfo,
915
    },
916
    ReturnCallKnown {
917
        callee: ExternalName,
918
        info: BoxReturnCallInfo,
919
    },
920
    ReturnCallUnknown {
921
        callee: RegMem,
922
        info: BoxReturnCallInfo,
923
    },
924
    Args {
925
        args: VecArgPair,
926
    },
927
    Rets {
928
        rets: VecRetPair,
929
    },
930
    Ret {
931
        stack_bytes_to_pop: u32,
932
    },
933
    JmpKnown {
934
        dst: MachLabel,
935
    },
936
    JmpIf {
937
        cc: CC,
938
        taken: MachLabel,
939
    },
940
    JmpCond {
941
        cc: CC,
942
        taken: MachLabel,
943
        not_taken: MachLabel,
944
    },
945
    JmpTableSeq {
946
        idx: Reg,
947
        tmp1: WritableReg,
948
        tmp2: WritableReg,
949
        default_target: MachLabel,
950
        targets: BoxVecMachLabel,
951
    },
952
    JmpUnknown {
953
        target: RegMem,
954
    },
955
    TrapIf {
956
        cc: CC,
957
        trap_code: TrapCode,
958
    },
959
    TrapIfAnd {
960
        cc1: CC,
961
        cc2: CC,
962
        trap_code: TrapCode,
963
    },
964
    TrapIfOr {
965
        cc1: CC,
966
        cc2: CC,
967
        trap_code: TrapCode,
968
    },
969
    Hlt,
970
    Ud2 {
971
        trap_code: TrapCode,
972
    },
973
    LoadExtName {
974
        dst: WritableReg,
975
        name: BoxExternalName,
976
        offset: i64,
977
        distance: RelocDistance,
978
    },
979
    LockCmpxchg {
980
        ty: Type,
981
        replacement: Reg,
982
        expected: Reg,
983
        mem: SyntheticAmode,
984
        dst_old: WritableReg,
985
    },
986
    AtomicRmwSeq {
987
        ty: Type,
988
        op: MachAtomicRmwOp,
989
        mem: SyntheticAmode,
990
        operand: Reg,
991
        temp: WritableReg,
992
        dst_old: WritableReg,
993
    },
994
    Fence {
995
        kind: FenceKind,
996
    },
997
    VirtualSPOffsetAdj {
998
        offset: i64,
999
    },
1000
    XmmUninitializedValue {
1001
        dst: WritableXmm,
1002
    },
1003
    ElfTlsGetAddr {
1004
        symbol: ExternalName,
1005
        dst: WritableGpr,
1006
    },
1007
    MachOTlsGetAddr {
1008
        symbol: ExternalName,
1009
        dst: WritableGpr,
1010
    },
1011
    CoffTlsGetAddr {
1012
        symbol: ExternalName,
1013
        dst: WritableGpr,
1014
        tmp: WritableGpr,
1015
    },
1016
    Unwind {
1017
        inst: UnwindInst,
1018
    },
1019
    DummyUse {
1020
        reg: Reg,
1021
    },
1022
}
1023
1024
/// Internal type DivSignedness: defined at src/isa/x64/inst.isle line 719.
1025
8.69k
#[derive(Copy, Clone, 
PartialEq0
, Eq,
D0
ebu
g0
)]
1026
pub enum DivSignedness {
1027
    Signed,
1028
    Unsigned,
1029
}
1030
1031
/// Internal type AluRmROpcode: defined at src/isa/x64/inst.isle line 756.
1032
2.53k
#[derive(Copy, Clone, 
PartialEq0
, Eq,
D0
ebu
g0
)]
1033
pub enum AluRmROpcode {
1034
    Andn,
1035
    Sarx,
1036
    Shrx,
1037
    Shlx,
1038
    Bzhi,
1039
}
1040
1041
/// Internal type UnaryRmRVexOpcode: defined at src/isa/x64/inst.isle line 770.
1042
116
#[derive(Copy, Clone, 
PartialEq0
, Eq,
D0
ebu
g0
)]
1043
pub enum UnaryRmRVexOpcode {
1044
    Blsi,
1045
    Blsmsk,
1046
    Blsr,
1047
}
1048
1049
/// Internal type UnaryRmRImmVexOpcode: defined at src/isa/x64/inst.isle line 775.
1050
1.91k
#[derive(Copy, Clone, 
PartialEq0
, Eq,
Debug0
)]
1051
pub enum UnaryRmRImmVexOpcode {
1052
    Rorx,
1053
}
1054
1055
/// Internal type Amode: defined at src/isa/x64/inst.isle line 1021.
1056
22.8M
#[derive(Clone, 
D0
ebu
g0
)]
1057
pub enum Amode {
1058
    ImmReg {
1059
        simm32: i32,
1060
        base: Reg,
1061
        flags: MemFlags,
1062
    },
1063
    ImmRegRegShift {
1064
        simm32: i32,
1065
        base: Gpr,
1066
        index: Gpr,
1067
        shift: u8,
1068
        flags: MemFlags,
1069
    },
1070
    RipRelative {
1071
        target: MachLabel,
1072
    },
1073
}
1074
1075
/// Internal type AvxOpcode: defined at src/isa/x64/inst.isle line 1207.
1076
3
#[derive(Copy, Clone, 
PartialEq0
, Eq,
D0
ebu
g0
)]
1077
pub enum AvxOpcode {
1078
    Vfmadd213ss,
1079
    Vfmadd213sd,
1080
    Vfmadd213ps,
1081
    Vfmadd213pd,
1082
    Vfmadd132ss,
1083
    Vfmadd132sd,
1084
    Vfmadd132ps,
1085
    Vfmadd132pd,
1086
    Vfnmadd213ss,
1087
    Vfnmadd213sd,
1088
    Vfnmadd213ps,
1089
    Vfnmadd213pd,
1090
    Vfnmadd132ss,
1091
    Vfnmadd132sd,
1092
    Vfnmadd132ps,
1093
    Vfnmadd132pd,
1094
    Vcmpps,
1095
    Vcmppd,
1096
    Vpsrlw,
1097
    Vpsrld,
1098
    Vpsrlq,
1099
    Vpaddb,
1100
    Vpaddw,
1101
    Vpaddd,
1102
    Vpaddq,
1103
    Vpaddsb,
1104
    Vpaddsw,
1105
    Vpaddusb,
1106
    Vpaddusw,
1107
    Vpsubb,
1108
    Vpsubw,
1109
    Vpsubd,
1110
    Vpsubq,
1111
    Vpsubsb,
1112
    Vpsubsw,
1113
    Vpsubusb,
1114
    Vpsubusw,
1115
    Vpavgb,
1116
    Vpavgw,
1117
    Vpand,
1118
    Vandps,
1119
    Vandpd,
1120
    Vpor,
1121
    Vorps,
1122
    Vorpd,
1123
    Vpxor,
1124
    Vxorps,
1125
    Vxorpd,
1126
    Vpmullw,
1127
    Vpmulld,
1128
    Vpmulhw,
1129
    Vpmulhd,
1130
    Vpmulhrsw,
1131
    Vpmulhuw,
1132
    Vpmuldq,
1133
    Vpmuludq,
1134
    Vpunpckhwd,
1135
    Vpunpcklwd,
1136
    Vunpcklps,
1137
    Vunpckhps,
1138
    Vandnps,
1139
    Vandnpd,
1140
    Vpandn,
1141
    Vaddps,
1142
    Vaddpd,
1143
    Vsubps,
1144
    Vsubpd,
1145
    Vmulps,
1146
    Vmulpd,
1147
    Vdivps,
1148
    Vdivpd,
1149
    Vpcmpeqb,
1150
    Vpcmpeqw,
1151
    Vpcmpeqd,
1152
    Vpcmpeqq,
1153
    Vpcmpgtb,
1154
    Vpcmpgtw,
1155
    Vpcmpgtd,
1156
    Vpcmpgtq,
1157
    Vminps,
1158
    Vminpd,
1159
    Vmaxps,
1160
    Vmaxpd,
1161
    Vblendvpd,
1162
    Vblendvps,
1163
    Vpblendvb,
1164
    Vmovlhps,
1165
    Vpmaxsb,
1166
    Vpmaxsw,
1167
    Vpmaxsd,
1168
    Vpminsb,
1169
    Vpminsw,
1170
    Vpminsd,
1171
    Vpmaxub,
1172
    Vpmaxuw,
1173
    Vpmaxud,
1174
    Vpminub,
1175
    Vpminuw,
1176
    Vpminud,
1177
    Vpunpcklbw,
1178
    Vpunpckhbw,
1179
    Vpacksswb,
1180
    Vpackssdw,
1181
    Vpackuswb,
1182
    Vpackusdw,
1183
    Vpalignr,
1184
    Vpinsrb,
1185
    Vpinsrw,
1186
    Vpinsrd,
1187
    Vpinsrq,
1188
    Vpmaddwd,
1189
    Vpmaddubsw,
1190
    Vinsertps,
1191
    Vpshufb,
1192
    Vshufps,
1193
    Vpsllw,
1194
    Vpslld,
1195
    Vpsllq,
1196
    Vpsraw,
1197
    Vpsrad,
1198
    Vpmovsxbw,
1199
    Vpmovzxbw,
1200
    Vpmovsxwd,
1201
    Vpmovzxwd,
1202
    Vpmovsxdq,
1203
    Vpmovzxdq,
1204
    Vaddss,
1205
    Vaddsd,
1206
    Vmulss,
1207
    Vmulsd,
1208
    Vsubss,
1209
    Vsubsd,
1210
    Vdivss,
1211
    Vdivsd,
1212
    Vpabsb,
1213
    Vpabsw,
1214
    Vpabsd,
1215
    Vminss,
1216
    Vminsd,
1217
    Vmaxss,
1218
    Vmaxsd,
1219
    Vsqrtps,
1220
    Vsqrtpd,
1221
    Vroundps,
1222
    Vroundpd,
1223
    Vcvtdq2pd,
1224
    Vcvtdq2ps,
1225
    Vcvtpd2ps,
1226
    Vcvtps2pd,
1227
    Vcvttpd2dq,
1228
    Vcvttps2dq,
1229
    Vphaddw,
1230
    Vphaddd,
1231
    Vpunpckhdq,
1232
    Vpunpckldq,
1233
    Vpunpckhqdq,
1234
    Vpunpcklqdq,
1235
    Vpshuflw,
1236
    Vpshufhw,
1237
    Vpshufd,
1238
    Vmovss,
1239
    Vmovsd,
1240
    Vmovups,
1241
    Vmovupd,
1242
    Vmovdqu,
1243
    Vpextrb,
1244
    Vpextrw,
1245
    Vpextrd,
1246
    Vpextrq,
1247
    Vpblendw,
1248
    Vmovddup,
1249
    Vpbroadcastb,
1250
    Vpbroadcastw,
1251
    Vpbroadcastd,
1252
    Vbroadcastss,
1253
    Vmovd,
1254
    Vmovq,
1255
    Vmovmskps,
1256
    Vmovmskpd,
1257
    Vpmovmskb,
1258
    Vcvtsi2ss,
1259
    Vcvtsi2sd,
1260
    Vcvtss2sd,
1261
    Vcvtsd2ss,
1262
    Vsqrtss,
1263
    Vsqrtsd,
1264
    Vroundss,
1265
    Vroundsd,
1266
}
1267
1268
/// Internal type Avx512Opcode: defined at src/isa/x64/inst.isle line 1398.
1269
0
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1270
pub enum Avx512Opcode {
1271
    Vcvtudq2ps,
1272
    Vpabsq,
1273
    Vpermi2b,
1274
    Vpmullq,
1275
    Vpopcntb,
1276
    Vpsraq,
1277
    VpsraqImm,
1278
}
1279
1280
/// Internal type RegisterClass: defined at src/isa/x64/inst.isle line 1674.
1281
0
#[derive(Clone, Debug)]
1282
pub enum RegisterClass {
1283
    Gpr {
1284
        single_register: bool,
1285
    },
1286
    Xmm,
1287
}
1288
1289
/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 2144.
1290
0
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1291
pub enum ExtendKind {
1292
    Sign,
1293
    Zero,
1294
}
1295
1296
/// Internal type IcmpCondResult: defined at src/isa/x64/inst.isle line 4644.
1297
386k
#[derive(Clone, 
Debug0
)]
1298
pub enum IcmpCondResult {
1299
    Condition {
1300
        producer: ProducesFlags,
1301
        cc: CC,
1302
    },
1303
}
1304
1305
/// Internal type FcmpCondResult: defined at src/isa/x64/inst.isle line 4757.
1306
0
#[derive(Clone, Debug)]
1307
pub enum FcmpCondResult {
1308
    Condition {
1309
        producer: ProducesFlags,
1310
        cc: CC,
1311
    },
1312
    AndCondition {
1313
        producer: ProducesFlags,
1314
        cc1: CC,
1315
        cc2: CC,
1316
    },
1317
    OrCondition {
1318
        producer: ProducesFlags,
1319
        cc1: CC,
1320
        cc2: CC,
1321
    },
1322
}
1323
1324
// Generated as internal constructor for term output_reg.
1325
4.17M
pub fn constructor_output_reg<C: Context>(
1326
4.17M
    ctx: &mut C,
1327
4.17M
    arg0: Reg,
1328
4.17M
) -> InstOutput {
1329
4.17M
    let v1 = C::value_reg(ctx, arg0);
1330
4.17M
    let v2 = C::output(ctx, v1);
1331
4.17M
    // Rule at src/prelude_lower.isle line 73.
1332
4.17M
    return v2;
1333
4.17M
}
1334
1335
// Generated as internal constructor for term output_value.
1336
0
pub fn constructor_output_value<C: Context>(
1337
0
    ctx: &mut C,
1338
0
    arg0: Value,
1339
0
) -> InstOutput {
1340
0
    let v1 = C::put_in_regs(ctx, arg0);
1341
0
    let v2 = C::output(ctx, v1);
1342
0
    // Rule at src/prelude_lower.isle line 77.
1343
0
    return v2;
1344
0
}
1345
1346
// Generated as internal constructor for term temp_reg.
1347
0
pub fn constructor_temp_reg<C: Context>(
1348
0
    ctx: &mut C,
1349
0
    arg0: Type,
1350
0
) -> Reg {
1351
0
    let v1 = C::temp_writable_reg(ctx, arg0);
1352
0
    let v2 = C::writable_reg_to_reg(ctx, v1);
1353
0
    // Rule at src/prelude_lower.isle line 97.
1354
0
    return v2;
1355
0
}
1356
1357
// Generated as internal constructor for term value_regs_range.
1358
0
pub fn constructor_value_regs_range<C: Context>(
1359
0
    ctx: &mut C,
1360
0
    arg0: ValueRegs,
1361
0
) -> Range {
1362
0
    let v2 = C::value_regs_len(ctx, arg0);
1363
0
    let v3 = C::range(ctx, 0x0, v2);
1364
0
    // Rule at src/prelude_lower.isle line 146.
1365
0
    return v3;
1366
0
}
1367
1368
// Generated as internal constructor for term lo_reg.
1369
0
pub fn constructor_lo_reg<C: Context>(
1370
0
    ctx: &mut C,
1371
0
    arg0: Value,
1372
0
) -> Reg {
1373
0
    let v1 = C::put_in_regs(ctx, arg0);
1374
0
    let v3 = C::value_regs_get(ctx, v1, 0x0);
1375
0
    // Rule at src/prelude_lower.isle line 157.
1376
0
    return v3;
1377
0
}
1378
1379
// Generated as internal constructor for term multi_reg_to_pair_and_single.
1380
0
pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
1381
0
    ctx: &mut C,
1382
0
    arg0: &MultiReg,
1383
0
) -> InstOutput {
1384
    if let &MultiReg::Three {
1385
0
        a: v1,
1386
0
        b: v2,
1387
0
        c: v3,
1388
0
    } = arg0 {
1389
0
        let v4 = C::value_regs(ctx, v1, v2);
1390
0
        let v5 = C::value_reg(ctx, v3);
1391
0
        let v6 = C::output_pair(ctx, v4, v5);
1392
0
        // Rule at src/prelude_lower.isle line 168.
1393
0
        return v6;
1394
0
    }
1395
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 167")
1396
0
}
1397
1398
// Generated as internal constructor for term multi_reg_to_pair.
1399
0
pub fn constructor_multi_reg_to_pair<C: Context>(
1400
0
    ctx: &mut C,
1401
0
    arg0: &MultiReg,
1402
0
) -> InstOutput {
1403
    if let &MultiReg::Two {
1404
0
        a: v1,
1405
0
        b: v2,
1406
0
    } = arg0 {
1407
0
        let v3 = C::value_regs(ctx, v1, v2);
1408
0
        let v4 = C::output(ctx, v3);
1409
0
        // Rule at src/prelude_lower.isle line 173.
1410
0
        return v4;
1411
0
    }
1412
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_pair", "src/prelude_lower.isle line 172")
1413
0
}
1414
1415
// Generated as internal constructor for term multi_reg_to_single.
1416
0
pub fn constructor_multi_reg_to_single<C: Context>(
1417
0
    ctx: &mut C,
1418
0
    arg0: &MultiReg,
1419
0
) -> InstOutput {
1420
    if let &MultiReg::One {
1421
0
        a: v1,
1422
0
    } = arg0 {
1423
0
        let v2 = C::value_reg(ctx, v1);
1424
0
        let v3 = C::output(ctx, v2);
1425
0
        // Rule at src/prelude_lower.isle line 178.
1426
0
        return v3;
1427
0
    }
1428
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_single", "src/prelude_lower.isle line 177")
1429
0
}
1430
1431
// Generated as internal constructor for term emit_side_effect.
1432
1.92M
pub fn constructor_emit_side_effect<C: Context>(
1433
1.92M
    ctx: &mut C,
1434
1.92M
    arg0: &SideEffectNoResult,
1435
1.92M
) -> Unit {
1436
1.92M
    match arg0 {
1437
        &SideEffectNoResult::Inst {
1438
1.47M
            inst: ref v1,
1439
1.47M
        } => {
1440
1.47M
            let v2 = C::emit(ctx, v1);
1441
1.47M
            // Rule at src/prelude_lower.isle line 350.
1442
1.47M
            return v2;
1443
        }
1444
        &SideEffectNoResult::Inst2 {
1445
452k
            inst1: ref v3,
1446
452k
            inst2: ref v4,
1447
452k
        } => {
1448
452k
            let v5 = C::emit(ctx, v3);
1449
452k
            let v6 = C::emit(ctx, v4);
1450
452k
            // Rule at src/prelude_lower.isle line 352.
1451
452k
            return v6;
1452
        }
1453
        &SideEffectNoResult::Inst3 {
1454
0
            inst1: ref v7,
1455
0
            inst2: ref v8,
1456
0
            inst3: ref v9,
1457
0
        } => {
1458
0
            let v10 = C::emit(ctx, v7);
1459
0
            let v11 = C::emit(ctx, v8);
1460
0
            let v12 = C::emit(ctx, v9);
1461
0
            // Rule at src/prelude_lower.isle line 355.
1462
0
            return v12;
1463
        }
1464
0
        _ => {}
1465
0
    }
1466
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "emit_side_effect", "src/prelude_lower.isle line 349")
1467
1.92M
}
1468
1469
// Generated as internal constructor for term side_effect.
1470
1.14M
pub fn constructor_side_effect<C: Context>(
1471
1.14M
    ctx: &mut C,
1472
1.14M
    arg0: &SideEffectNoResult,
1473
1.14M
) -> InstOutput {
1474
1.14M
    let v1 = constructor_emit_side_effect(ctx, arg0);
1475
1.14M
    let v2 = C::output_none(ctx);
1476
1.14M
    // Rule at src/prelude_lower.isle line 363.
1477
1.14M
    return v2;
1478
1.14M
}
1479
1480
// Generated as internal constructor for term side_effect_concat.
1481
0
pub fn constructor_side_effect_concat<C: Context>(
1482
0
    ctx: &mut C,
1483
0
    arg0: &SideEffectNoResult,
1484
0
    arg1: &SideEffectNoResult,
1485
0
) -> SideEffectNoResult {
1486
0
    match arg0 {
1487
        &SideEffectNoResult::Inst {
1488
0
            inst: ref v1,
1489
0
        } => {
1490
0
            match arg1 {
1491
                &SideEffectNoResult::Inst {
1492
0
                    inst: ref v3,
1493
0
                } => {
1494
0
                    let v4 = SideEffectNoResult::Inst2 {
1495
0
                        inst1: v1.clone(),
1496
0
                        inst2: v3.clone(),
1497
0
                    };
1498
0
                    // Rule at src/prelude_lower.isle line 368.
1499
0
                    return v4;
1500
                }
1501
                &SideEffectNoResult::Inst2 {
1502
0
                    inst1: ref v5,
1503
0
                    inst2: ref v6,
1504
0
                } => {
1505
0
                    let v7 = SideEffectNoResult::Inst3 {
1506
0
                        inst1: v1.clone(),
1507
0
                        inst2: v5.clone(),
1508
0
                        inst3: v6.clone(),
1509
0
                    };
1510
0
                    // Rule at src/prelude_lower.isle line 370.
1511
0
                    return v7;
1512
                }
1513
0
                _ => {}
1514
            }
1515
        }
1516
        &SideEffectNoResult::Inst2 {
1517
0
            inst1: ref v8,
1518
0
            inst2: ref v9,
1519
        } => {
1520
            if let &SideEffectNoResult::Inst {
1521
0
                inst: ref v3,
1522
0
            } = arg1 {
1523
0
                let v10 = SideEffectNoResult::Inst3 {
1524
0
                    inst1: v8.clone(),
1525
0
                    inst2: v9.clone(),
1526
0
                    inst3: v3.clone(),
1527
0
                };
1528
0
                // Rule at src/prelude_lower.isle line 372.
1529
0
                return v10;
1530
0
            }
1531
        }
1532
0
        _ => {}
1533
    }
1534
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "side_effect_concat", "src/prelude_lower.isle line 367")
1535
0
}
1536
1537
// Generated as internal constructor for term produces_flags_concat.
1538
0
pub fn constructor_produces_flags_concat<C: Context>(
1539
0
    ctx: &mut C,
1540
0
    arg0: &ProducesFlags,
1541
0
    arg1: &ProducesFlags,
1542
0
) -> ProducesFlags {
1543
    if let &ProducesFlags::ProducesFlagsSideEffect {
1544
0
        inst: ref v1,
1545
0
    } = arg0 {
1546
        if let &ProducesFlags::ProducesFlagsSideEffect {
1547
0
            inst: ref v3,
1548
0
        } = arg1 {
1549
0
            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
1550
0
                inst1: v1.clone(),
1551
0
                inst2: v3.clone(),
1552
0
            };
1553
0
            // Rule at src/prelude_lower.isle line 397.
1554
0
            return v4;
1555
0
        }
1556
0
    }
1557
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_concat", "src/prelude_lower.isle line 396")
1558
0
}
1559
1560
// Generated as internal constructor for term produces_flags_get_reg.
1561
0
pub fn constructor_produces_flags_get_reg<C: Context>(
1562
0
    ctx: &mut C,
1563
0
    arg0: &ProducesFlags,
1564
0
) -> Reg {
1565
0
    match arg0 {
1566
        &ProducesFlags::ProducesFlagsReturnsReg {
1567
0
            inst: ref v1,
1568
0
            result: v2,
1569
0
        } => {
1570
0
            // Rule at src/prelude_lower.isle line 427.
1571
0
            return v2;
1572
        }
1573
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1574
0
            inst: ref v3,
1575
0
            result: v4,
1576
0
        } => {
1577
0
            // Rule at src/prelude_lower.isle line 428.
1578
0
            return v4;
1579
        }
1580
0
        _ => {}
1581
0
    }
1582
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_get_reg", "src/prelude_lower.isle line 426")
1583
0
}
1584
1585
// Generated as internal constructor for term produces_flags_ignore.
1586
0
pub fn constructor_produces_flags_ignore<C: Context>(
1587
0
    ctx: &mut C,
1588
0
    arg0: &ProducesFlags,
1589
0
) -> ProducesFlags {
1590
0
    match arg0 {
1591
        &ProducesFlags::ProducesFlagsReturnsReg {
1592
0
            inst: ref v1,
1593
0
            result: v2,
1594
0
        } => {
1595
0
            let v3 = ProducesFlags::ProducesFlagsSideEffect {
1596
0
                inst: v1.clone(),
1597
0
            };
1598
0
            // Rule at src/prelude_lower.isle line 433.
1599
0
            return v3;
1600
        }
1601
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1602
0
            inst: ref v4,
1603
0
            result: v5,
1604
0
        } => {
1605
0
            let v6 = ProducesFlags::ProducesFlagsSideEffect {
1606
0
                inst: v4.clone(),
1607
0
            };
1608
0
            // Rule at src/prelude_lower.isle line 435.
1609
0
            return v6;
1610
        }
1611
0
        _ => {}
1612
0
    }
1613
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_ignore", "src/prelude_lower.isle line 432")
1614
0
}
1615
1616
// Generated as internal constructor for term consumes_flags_concat.
1617
0
pub fn constructor_consumes_flags_concat<C: Context>(
1618
0
    ctx: &mut C,
1619
0
    arg0: &ConsumesFlags,
1620
0
    arg1: &ConsumesFlags,
1621
0
) -> ConsumesFlags {
1622
0
    match arg0 {
1623
        &ConsumesFlags::ConsumesFlagsSideEffect {
1624
0
            inst: ref v8,
1625
        } => {
1626
            if let &ConsumesFlags::ConsumesFlagsSideEffect {
1627
0
                inst: ref v9,
1628
0
            } = arg1 {
1629
0
                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
1630
0
                    inst1: v8.clone(),
1631
0
                    inst2: v9.clone(),
1632
0
                };
1633
0
                // Rule at src/prelude_lower.isle line 448.
1634
0
                return v10;
1635
0
            }
1636
        }
1637
        &ConsumesFlags::ConsumesFlagsReturnsReg {
1638
0
            inst: ref v1,
1639
0
            result: v2,
1640
        } => {
1641
            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
1642
0
                inst: ref v4,
1643
0
                result: v5,
1644
0
            } = arg1 {
1645
0
                let v6 = C::value_regs(ctx, v2, v5);
1646
0
                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1647
0
                    inst1: v1.clone(),
1648
0
                    inst2: v4.clone(),
1649
0
                    result: v6,
1650
0
                };
1651
0
                // Rule at src/prelude_lower.isle line 442.
1652
0
                return v7;
1653
0
            }
1654
        }
1655
0
        _ => {}
1656
    }
1657
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "consumes_flags_concat", "src/prelude_lower.isle line 441")
1658
0
}
1659
1660
// Generated as internal constructor for term with_flags.
1661
92.0k
pub fn constructor_with_flags<C: Context>(
1662
92.0k
    ctx: &mut C,
1663
92.0k
    arg0: &ProducesFlags,
1664
92.0k
    arg1: &ConsumesFlags,
1665
92.0k
) -> ValueRegs {
1666
92.0k
    match arg0 {
1667
        &ProducesFlags::ProducesFlagsSideEffect {
1668
92.0k
            inst: ref v12,
1669
92.0k
        } => {
1670
92.0k
            match arg1 {
1671
                &ConsumesFlags::ConsumesFlagsReturnsReg {
1672
92.0k
                    inst: ref v13,
1673
92.0k
                    result: v14,
1674
92.0k
                } => {
1675
92.0k
                    let v15 = C::emit(ctx, v12);
1676
92.0k
                    let v16 = C::emit(ctx, v13);
1677
92.0k
                    let v17 = C::value_reg(ctx, v14);
1678
92.0k
                    // Rule at src/prelude_lower.isle line 479.
1679
92.0k
                    return v17;
1680
                }
1681
                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1682
0
                    inst1: ref v18,
1683
0
                    inst2: ref v19,
1684
0
                    result: v20,
1685
0
                } => {
1686
0
                    let v15 = C::emit(ctx, v12);
1687
0
                    let v21 = C::emit(ctx, v18);
1688
0
                    let v22 = C::emit(ctx, v19);
1689
0
                    // Rule at src/prelude_lower.isle line 485.
1690
0
                    return v20;
1691
                }
1692
                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1693
0
                    inst1: ref v23,
1694
0
                    inst2: ref v24,
1695
0
                    inst3: ref v25,
1696
0
                    inst4: ref v26,
1697
0
                    result: v27,
1698
0
                } => {
1699
0
                    let v15 = C::emit(ctx, v12);
1700
0
                    let v28 = C::emit(ctx, v23);
1701
0
                    let v29 = C::emit(ctx, v24);
1702
0
                    let v30 = C::emit(ctx, v25);
1703
0
                    let v31 = C::emit(ctx, v26);
1704
0
                    // Rule at src/prelude_lower.isle line 497.
1705
0
                    return v27;
1706
                }
1707
0
                _ => {}
1708
            }
1709
        }
1710
        &ProducesFlags::ProducesFlagsTwiceSideEffect {
1711
0
            inst1: ref v32,
1712
0
            inst2: ref v33,
1713
0
        } => {
1714
0
            match arg1 {
1715
                &ConsumesFlags::ConsumesFlagsReturnsReg {
1716
0
                    inst: ref v13,
1717
0
                    result: v14,
1718
0
                } => {
1719
0
                    let v34 = C::emit(ctx, v32);
1720
0
                    let v35 = C::emit(ctx, v33);
1721
0
                    let v36 = C::emit(ctx, v13);
1722
0
                    let v37 = C::value_reg(ctx, v14);
1723
0
                    // Rule at src/prelude_lower.isle line 513.
1724
0
                    return v37;
1725
                }
1726
                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1727
0
                    inst1: ref v18,
1728
0
                    inst2: ref v19,
1729
0
                    result: v20,
1730
0
                } => {
1731
0
                    let v34 = C::emit(ctx, v32);
1732
0
                    let v35 = C::emit(ctx, v33);
1733
0
                    let v38 = C::emit(ctx, v18);
1734
0
                    let v39 = C::emit(ctx, v19);
1735
0
                    // Rule at src/prelude_lower.isle line 520.
1736
0
                    return v20;
1737
                }
1738
                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1739
0
                    inst1: ref v23,
1740
0
                    inst2: ref v24,
1741
0
                    inst3: ref v25,
1742
0
                    inst4: ref v26,
1743
0
                    result: v27,
1744
0
                } => {
1745
0
                    let v34 = C::emit(ctx, v32);
1746
0
                    let v35 = C::emit(ctx, v33);
1747
0
                    let v40 = C::emit(ctx, v23);
1748
0
                    let v41 = C::emit(ctx, v24);
1749
0
                    let v42 = C::emit(ctx, v25);
1750
0
                    let v43 = C::emit(ctx, v26);
1751
0
                    // Rule at src/prelude_lower.isle line 533.
1752
0
                    return v27;
1753
                }
1754
0
                _ => {}
1755
            }
1756
        }
1757
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1758
0
            inst: ref v1,
1759
0
            result: v2,
1760
0
        } => {
1761
0
            match arg1 {
1762
                &ConsumesFlags::ConsumesFlagsSideEffect {
1763
0
                    inst: ref v9,
1764
0
                } => {
1765
0
                    let v6 = C::emit(ctx, v1);
1766
0
                    let v10 = C::emit(ctx, v9);
1767
0
                    let v11 = C::value_reg(ctx, v2);
1768
0
                    // Rule at src/prelude_lower.isle line 473.
1769
0
                    return v11;
1770
                }
1771
                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
1772
0
                    inst: ref v4,
1773
0
                    result: v5,
1774
0
                } => {
1775
0
                    let v6 = C::emit(ctx, v1);
1776
0
                    let v7 = C::emit(ctx, v4);
1777
0
                    let v8 = C::value_regs(ctx, v2, v5);
1778
0
                    // Rule at src/prelude_lower.isle line 465.
1779
0
                    return v8;
1780
                }
1781
0
                _ => {}
1782
            }
1783
        }
1784
0
        _ => {}
1785
    }
1786
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags", "src/prelude_lower.isle line 463")
1787
92.0k
}
1788
1789
// Generated as internal constructor for term with_flags_reg.
1790
19.9k
pub fn constructor_with_flags_reg<C: Context>(
1791
19.9k
    ctx: &mut C,
1792
19.9k
    arg0: &ProducesFlags,
1793
19.9k
    arg1: &ConsumesFlags,
1794
19.9k
) -> Reg {
1795
19.9k
    let v2 = constructor_with_flags(ctx, arg0, arg1);
1796
19.9k
    let v4 = C::value_regs_get(ctx, v2, 0x0);
1797
19.9k
    // Rule at src/prelude_lower.isle line 551.
1798
19.9k
    return v4;
1799
19.9k
}
1800
1801
// Generated as internal constructor for term flags_to_producesflags.
1802
0
pub fn constructor_flags_to_producesflags<C: Context>(
1803
0
    ctx: &mut C,
1804
0
    arg0: Value,
1805
0
) -> ProducesFlags {
1806
0
    let v1 = C::mark_value_used(ctx, arg0);
1807
0
    // Rule at src/prelude_lower.isle line 558.
1808
0
    return ProducesFlags::AlreadyExistingFlags;
1809
0
}
1810
1811
// Generated as internal constructor for term with_flags_side_effect.
1812
452k
pub fn constructor_with_flags_side_effect<C: Context>(
1813
452k
    ctx: &mut C,
1814
452k
    arg0: &ProducesFlags,
1815
452k
    arg1: &ConsumesFlags,
1816
452k
) -> SideEffectNoResult {
1817
452k
    match arg0 {
1818
        &ProducesFlags::AlreadyExistingFlags => {
1819
0
            match arg1 {
1820
                &ConsumesFlags::ConsumesFlagsSideEffect {
1821
0
                    inst: ref v2,
1822
0
                } => {
1823
0
                    let v3 = SideEffectNoResult::Inst {
1824
0
                        inst: v2.clone(),
1825
0
                    };
1826
0
                    // Rule at src/prelude_lower.isle line 569.
1827
0
                    return v3;
1828
                }
1829
                &ConsumesFlags::ConsumesFlagsSideEffect2 {
1830
0
                    inst1: ref v4,
1831
0
                    inst2: ref v5,
1832
0
                } => {
1833
0
                    let v6 = SideEffectNoResult::Inst2 {
1834
0
                        inst1: v4.clone(),
1835
0
                        inst2: v5.clone(),
1836
0
                    };
1837
0
                    // Rule at src/prelude_lower.isle line 574.
1838
0
                    return v6;
1839
                }
1840
0
                _ => {}
1841
            }
1842
        }
1843
        &ProducesFlags::ProducesFlagsSideEffect {
1844
452k
            inst: ref v7,
1845
452k
        } => {
1846
452k
            match arg1 {
1847
                &ConsumesFlags::ConsumesFlagsSideEffect {
1848
452k
                    inst: ref v2,
1849
452k
                } => {
1850
452k
                    let v8 = SideEffectNoResult::Inst2 {
1851
452k
                        inst1: v7.clone(),
1852
452k
                        inst2: v2.clone(),
1853
452k
                    };
1854
452k
                    // Rule at src/prelude_lower.isle line 579.
1855
452k
                    return v8;
1856
                }
1857
                &ConsumesFlags::ConsumesFlagsSideEffect2 {
1858
0
                    inst1: ref v4,
1859
0
                    inst2: ref v5,
1860
0
                } => {
1861
0
                    let v9 = SideEffectNoResult::Inst3 {
1862
0
                        inst1: v7.clone(),
1863
0
                        inst2: v4.clone(),
1864
0
                        inst3: v5.clone(),
1865
0
                    };
1866
0
                    // Rule at src/prelude_lower.isle line 584.
1867
0
                    return v9;
1868
                }
1869
0
                _ => {}
1870
            }
1871
        }
1872
        &ProducesFlags::ProducesFlagsTwiceSideEffect {
1873
0
            inst1: ref v10,
1874
0
            inst2: ref v11,
1875
        } => {
1876
            if let &ConsumesFlags::ConsumesFlagsSideEffect {
1877
0
                inst: ref v2,
1878
0
            } = arg1 {
1879
0
                let v12 = SideEffectNoResult::Inst3 {
1880
0
                    inst1: v10.clone(),
1881
0
                    inst2: v11.clone(),
1882
0
                    inst3: v2.clone(),
1883
0
                };
1884
0
                // Rule at src/prelude_lower.isle line 589.
1885
0
                return v12;
1886
0
            }
1887
        }
1888
0
        _ => {}
1889
    }
1890
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags_side_effect", "src/prelude_lower.isle line 567")
1891
452k
}
1892
1893
// Generated as internal constructor for term with_flags_chained.
1894
0
pub fn constructor_with_flags_chained<C: Context>(
1895
0
    ctx: &mut C,
1896
0
    arg0: &ProducesFlags,
1897
0
    arg1: &ConsumesAndProducesFlags,
1898
0
    arg2: &ConsumesFlags,
1899
0
) -> MultiReg {
1900
0
    match arg0 {
1901
        &ProducesFlags::ProducesFlagsSideEffect {
1902
0
            inst: ref v1,
1903
0
        } => {
1904
0
            match arg1 {
1905
                &ConsumesAndProducesFlags::SideEffect {
1906
0
                    inst: ref v3,
1907
0
                } => {
1908
0
                    match arg2 {
1909
                        &ConsumesFlags::ConsumesFlagsSideEffect {
1910
0
                            inst: ref v5,
1911
0
                        } => {
1912
0
                            let v6 = C::emit(ctx, v1);
1913
0
                            let v7 = C::emit(ctx, v3);
1914
0
                            let v8 = C::emit(ctx, v5);
1915
0
                            // Rule at src/prelude_lower.isle line 598.
1916
0
                            return MultiReg::Empty;
1917
                        }
1918
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
1919
0
                            inst1: ref v10,
1920
0
                            inst2: ref v11,
1921
0
                        } => {
1922
0
                            let v6 = C::emit(ctx, v1);
1923
0
                            let v7 = C::emit(ctx, v3);
1924
0
                            let v12 = C::emit(ctx, v10);
1925
0
                            let v13 = C::emit(ctx, v11);
1926
0
                            // Rule at src/prelude_lower.isle line 606.
1927
0
                            return MultiReg::Empty;
1928
                        }
1929
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
1930
0
                            inst: ref v14,
1931
0
                            result: v15,
1932
0
                        } => {
1933
0
                            let v6 = C::emit(ctx, v1);
1934
0
                            let v7 = C::emit(ctx, v3);
1935
0
                            let v16 = C::emit(ctx, v14);
1936
0
                            let v17 = MultiReg::One {
1937
0
                                a: v15,
1938
0
                            };
1939
0
                            // Rule at src/prelude_lower.isle line 615.
1940
0
                            return v17;
1941
                        }
1942
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1943
0
                            inst1: ref v18,
1944
0
                            inst2: ref v19,
1945
0
                            result: v20,
1946
0
                        } => {
1947
0
                            let v6 = C::emit(ctx, v1);
1948
0
                            let v7 = C::emit(ctx, v3);
1949
0
                            let v21 = C::emit(ctx, v18);
1950
0
                            let v22 = C::emit(ctx, v19);
1951
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
1952
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
1953
0
                            let v27 = MultiReg::Two {
1954
0
                                a: v24,
1955
0
                                b: v26,
1956
0
                            };
1957
0
                            // Rule at src/prelude_lower.isle line 623.
1958
0
                            return v27;
1959
                        }
1960
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1961
0
                            inst1: ref v28,
1962
0
                            inst2: ref v29,
1963
0
                            inst3: ref v30,
1964
0
                            inst4: ref v31,
1965
0
                            result: v32,
1966
0
                        } => {
1967
0
                            let v6 = C::emit(ctx, v1);
1968
0
                            let v7 = C::emit(ctx, v3);
1969
0
                            let v33 = C::emit(ctx, v28);
1970
0
                            let v34 = C::emit(ctx, v29);
1971
0
                            let v35 = C::emit(ctx, v30);
1972
0
                            let v36 = C::emit(ctx, v31);
1973
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
1974
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
1975
0
                            let v39 = MultiReg::Two {
1976
0
                                a: v37,
1977
0
                                b: v38,
1978
0
                            };
1979
0
                            // Rule at src/prelude_lower.isle line 632.
1980
0
                            return v39;
1981
                        }
1982
0
                        _ => {}
1983
                    }
1984
                }
1985
                &ConsumesAndProducesFlags::ReturnsReg {
1986
0
                    inst: ref v47,
1987
0
                    result: v48,
1988
0
                } => {
1989
0
                    match arg2 {
1990
                        &ConsumesFlags::ConsumesFlagsSideEffect {
1991
0
                            inst: ref v5,
1992
0
                        } => {
1993
0
                            let v6 = C::emit(ctx, v1);
1994
0
                            let v49 = C::emit(ctx, v47);
1995
0
                            let v8 = C::emit(ctx, v5);
1996
0
                            let v50 = MultiReg::One {
1997
0
                                a: v48,
1998
0
                            };
1999
0
                            // Rule at src/prelude_lower.isle line 692.
2000
0
                            return v50;
2001
                        }
2002
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2003
0
                            inst1: ref v10,
2004
0
                            inst2: ref v11,
2005
0
                        } => {
2006
0
                            let v6 = C::emit(ctx, v1);
2007
0
                            let v49 = C::emit(ctx, v47);
2008
0
                            let v12 = C::emit(ctx, v10);
2009
0
                            let v13 = C::emit(ctx, v11);
2010
0
                            let v50 = MultiReg::One {
2011
0
                                a: v48,
2012
0
                            };
2013
0
                            // Rule at src/prelude_lower.isle line 700.
2014
0
                            return v50;
2015
                        }
2016
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2017
0
                            inst: ref v14,
2018
0
                            result: v15,
2019
0
                        } => {
2020
0
                            let v6 = C::emit(ctx, v1);
2021
0
                            let v49 = C::emit(ctx, v47);
2022
0
                            let v16 = C::emit(ctx, v14);
2023
0
                            let v51 = MultiReg::Two {
2024
0
                                a: v48,
2025
0
                                b: v15,
2026
0
                            };
2027
0
                            // Rule at src/prelude_lower.isle line 709.
2028
0
                            return v51;
2029
                        }
2030
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2031
0
                            inst1: ref v18,
2032
0
                            inst2: ref v19,
2033
0
                            result: v20,
2034
0
                        } => {
2035
0
                            let v6 = C::emit(ctx, v1);
2036
0
                            let v49 = C::emit(ctx, v47);
2037
0
                            let v21 = C::emit(ctx, v18);
2038
0
                            let v22 = C::emit(ctx, v19);
2039
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2040
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2041
0
                            let v52 = MultiReg::Three {
2042
0
                                a: v48,
2043
0
                                b: v24,
2044
0
                                c: v26,
2045
0
                            };
2046
0
                            // Rule at src/prelude_lower.isle line 717.
2047
0
                            return v52;
2048
                        }
2049
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2050
0
                            inst1: ref v28,
2051
0
                            inst2: ref v29,
2052
0
                            inst3: ref v30,
2053
0
                            inst4: ref v31,
2054
0
                            result: v32,
2055
0
                        } => {
2056
0
                            let v6 = C::emit(ctx, v1);
2057
0
                            let v49 = C::emit(ctx, v47);
2058
0
                            let v33 = C::emit(ctx, v28);
2059
0
                            let v34 = C::emit(ctx, v29);
2060
0
                            let v35 = C::emit(ctx, v30);
2061
0
                            let v36 = C::emit(ctx, v31);
2062
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2063
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2064
0
                            let v53 = MultiReg::Three {
2065
0
                                a: v48,
2066
0
                                b: v37,
2067
0
                                c: v38,
2068
0
                            };
2069
0
                            // Rule at src/prelude_lower.isle line 726.
2070
0
                            return v53;
2071
                        }
2072
0
                        _ => {}
2073
                    }
2074
                }
2075
0
                _ => {}
2076
            }
2077
        }
2078
        &ProducesFlags::ProducesFlagsReturnsReg {
2079
0
            inst: ref v40,
2080
0
            result: v41,
2081
0
        } => {
2082
0
            match arg1 {
2083
                &ConsumesAndProducesFlags::SideEffect {
2084
0
                    inst: ref v3,
2085
0
                } => {
2086
0
                    match arg2 {
2087
                        &ConsumesFlags::ConsumesFlagsSideEffect {
2088
0
                            inst: ref v5,
2089
0
                        } => {
2090
0
                            let v42 = C::emit(ctx, v40);
2091
0
                            let v7 = C::emit(ctx, v3);
2092
0
                            let v8 = C::emit(ctx, v5);
2093
0
                            let v43 = MultiReg::One {
2094
0
                                a: v41,
2095
0
                            };
2096
0
                            // Rule at src/prelude_lower.isle line 645.
2097
0
                            return v43;
2098
                        }
2099
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2100
0
                            inst1: ref v10,
2101
0
                            inst2: ref v11,
2102
0
                        } => {
2103
0
                            let v42 = C::emit(ctx, v40);
2104
0
                            let v7 = C::emit(ctx, v3);
2105
0
                            let v12 = C::emit(ctx, v10);
2106
0
                            let v13 = C::emit(ctx, v11);
2107
0
                            let v43 = MultiReg::One {
2108
0
                                a: v41,
2109
0
                            };
2110
0
                            // Rule at src/prelude_lower.isle line 653.
2111
0
                            return v43;
2112
                        }
2113
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2114
0
                            inst: ref v14,
2115
0
                            result: v15,
2116
0
                        } => {
2117
0
                            let v42 = C::emit(ctx, v40);
2118
0
                            let v7 = C::emit(ctx, v3);
2119
0
                            let v16 = C::emit(ctx, v14);
2120
0
                            let v44 = MultiReg::Two {
2121
0
                                a: v41,
2122
0
                                b: v15,
2123
0
                            };
2124
0
                            // Rule at src/prelude_lower.isle line 662.
2125
0
                            return v44;
2126
                        }
2127
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2128
0
                            inst1: ref v18,
2129
0
                            inst2: ref v19,
2130
0
                            result: v20,
2131
0
                        } => {
2132
0
                            let v42 = C::emit(ctx, v40);
2133
0
                            let v7 = C::emit(ctx, v3);
2134
0
                            let v21 = C::emit(ctx, v18);
2135
0
                            let v22 = C::emit(ctx, v19);
2136
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2137
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2138
0
                            let v45 = MultiReg::Three {
2139
0
                                a: v41,
2140
0
                                b: v24,
2141
0
                                c: v26,
2142
0
                            };
2143
0
                            // Rule at src/prelude_lower.isle line 670.
2144
0
                            return v45;
2145
                        }
2146
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2147
0
                            inst1: ref v28,
2148
0
                            inst2: ref v29,
2149
0
                            inst3: ref v30,
2150
0
                            inst4: ref v31,
2151
0
                            result: v32,
2152
0
                        } => {
2153
0
                            let v42 = C::emit(ctx, v40);
2154
0
                            let v7 = C::emit(ctx, v3);
2155
0
                            let v33 = C::emit(ctx, v28);
2156
0
                            let v34 = C::emit(ctx, v29);
2157
0
                            let v35 = C::emit(ctx, v30);
2158
0
                            let v36 = C::emit(ctx, v31);
2159
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2160
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2161
0
                            let v46 = MultiReg::Three {
2162
0
                                a: v41,
2163
0
                                b: v37,
2164
0
                                c: v38,
2165
0
                            };
2166
0
                            // Rule at src/prelude_lower.isle line 679.
2167
0
                            return v46;
2168
                        }
2169
0
                        _ => {}
2170
                    }
2171
                }
2172
                &ConsumesAndProducesFlags::ReturnsReg {
2173
0
                    inst: ref v47,
2174
0
                    result: v48,
2175
0
                } => {
2176
0
                    match arg2 {
2177
                        &ConsumesFlags::ConsumesFlagsSideEffect {
2178
0
                            inst: ref v5,
2179
0
                        } => {
2180
0
                            let v42 = C::emit(ctx, v40);
2181
0
                            let v49 = C::emit(ctx, v47);
2182
0
                            let v8 = C::emit(ctx, v5);
2183
0
                            let v54 = MultiReg::Two {
2184
0
                                a: v41,
2185
0
                                b: v48,
2186
0
                            };
2187
0
                            // Rule at src/prelude_lower.isle line 739.
2188
0
                            return v54;
2189
                        }
2190
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2191
0
                            inst1: ref v10,
2192
0
                            inst2: ref v11,
2193
0
                        } => {
2194
0
                            let v42 = C::emit(ctx, v40);
2195
0
                            let v49 = C::emit(ctx, v47);
2196
0
                            let v12 = C::emit(ctx, v10);
2197
0
                            let v13 = C::emit(ctx, v11);
2198
0
                            let v54 = MultiReg::Two {
2199
0
                                a: v41,
2200
0
                                b: v48,
2201
0
                            };
2202
0
                            // Rule at src/prelude_lower.isle line 747.
2203
0
                            return v54;
2204
                        }
2205
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2206
0
                            inst: ref v14,
2207
0
                            result: v15,
2208
0
                        } => {
2209
0
                            let v42 = C::emit(ctx, v40);
2210
0
                            let v49 = C::emit(ctx, v47);
2211
0
                            let v16 = C::emit(ctx, v14);
2212
0
                            let v55 = MultiReg::Three {
2213
0
                                a: v41,
2214
0
                                b: v48,
2215
0
                                c: v15,
2216
0
                            };
2217
0
                            // Rule at src/prelude_lower.isle line 756.
2218
0
                            return v55;
2219
                        }
2220
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2221
0
                            inst1: ref v18,
2222
0
                            inst2: ref v19,
2223
0
                            result: v20,
2224
0
                        } => {
2225
0
                            let v42 = C::emit(ctx, v40);
2226
0
                            let v49 = C::emit(ctx, v47);
2227
0
                            let v21 = C::emit(ctx, v18);
2228
0
                            let v22 = C::emit(ctx, v19);
2229
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2230
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2231
0
                            let v56 = MultiReg::Four {
2232
0
                                a: v41,
2233
0
                                b: v48,
2234
0
                                c: v24,
2235
0
                                d: v26,
2236
0
                            };
2237
0
                            // Rule at src/prelude_lower.isle line 764.
2238
0
                            return v56;
2239
                        }
2240
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2241
0
                            inst1: ref v28,
2242
0
                            inst2: ref v29,
2243
0
                            inst3: ref v30,
2244
0
                            inst4: ref v31,
2245
0
                            result: v32,
2246
0
                        } => {
2247
0
                            let v42 = C::emit(ctx, v40);
2248
0
                            let v49 = C::emit(ctx, v47);
2249
0
                            let v33 = C::emit(ctx, v28);
2250
0
                            let v34 = C::emit(ctx, v29);
2251
0
                            let v35 = C::emit(ctx, v30);
2252
0
                            let v36 = C::emit(ctx, v31);
2253
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2254
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2255
0
                            let v57 = MultiReg::Four {
2256
0
                                a: v41,
2257
0
                                b: v48,
2258
0
                                c: v37,
2259
0
                                d: v38,
2260
0
                            };
2261
0
                            // Rule at src/prelude_lower.isle line 773.
2262
0
                            return v57;
2263
                        }
2264
0
                        _ => {}
2265
                    }
2266
                }
2267
0
                _ => {}
2268
            }
2269
        }
2270
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
2271
0
            inst: ref v58,
2272
0
            result: v59,
2273
        } => {
2274
            if let &ConsumesAndProducesFlags::ReturnsReg {
2275
0
                inst: ref v47,
2276
0
                result: v48,
2277
0
            } = arg1 {
2278
0
                match arg2 {
2279
                    &ConsumesFlags::ConsumesFlagsSideEffect {
2280
0
                        inst: ref v5,
2281
0
                    } => {
2282
0
                        let v60 = C::emit(ctx, v58);
2283
0
                        let v49 = C::emit(ctx, v47);
2284
0
                        let v8 = C::emit(ctx, v5);
2285
0
                        let v61 = MultiReg::Two {
2286
0
                            a: v59,
2287
0
                            b: v48,
2288
0
                        };
2289
0
                        // Rule at src/prelude_lower.isle line 785.
2290
0
                        return v61;
2291
                    }
2292
                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
2293
0
                        inst1: ref v10,
2294
0
                        inst2: ref v11,
2295
0
                    } => {
2296
0
                        let v60 = C::emit(ctx, v58);
2297
0
                        let v49 = C::emit(ctx, v47);
2298
0
                        let v12 = C::emit(ctx, v10);
2299
0
                        let v13 = C::emit(ctx, v11);
2300
0
                        let v61 = MultiReg::Two {
2301
0
                            a: v59,
2302
0
                            b: v48,
2303
0
                        };
2304
0
                        // Rule at src/prelude_lower.isle line 793.
2305
0
                        return v61;
2306
                    }
2307
                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
2308
0
                        inst: ref v63,
2309
0
                        result: v64,
2310
0
                    } => {
2311
0
                        let v60 = C::emit(ctx, v58);
2312
0
                        let v49 = C::emit(ctx, v47);
2313
0
                        let v65 = C::emit(ctx, v63);
2314
0
                        let v66 = MultiReg::Three {
2315
0
                            a: v59,
2316
0
                            b: v48,
2317
0
                            c: v64,
2318
0
                        };
2319
0
                        // Rule at src/prelude_lower.isle line 810.
2320
0
                        return v66;
2321
                    }
2322
                    &ConsumesFlags::ConsumesFlagsReturnsReg {
2323
0
                        inst: ref v14,
2324
0
                        result: v15,
2325
0
                    } => {
2326
0
                        let v60 = C::emit(ctx, v58);
2327
0
                        let v49 = C::emit(ctx, v47);
2328
0
                        let v16 = C::emit(ctx, v14);
2329
0
                        let v62 = MultiReg::Three {
2330
0
                            a: v59,
2331
0
                            b: v48,
2332
0
                            c: v15,
2333
0
                        };
2334
0
                        // Rule at src/prelude_lower.isle line 802.
2335
0
                        return v62;
2336
                    }
2337
                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2338
0
                        inst1: ref v18,
2339
0
                        inst2: ref v19,
2340
0
                        result: v20,
2341
0
                    } => {
2342
0
                        let v60 = C::emit(ctx, v58);
2343
0
                        let v49 = C::emit(ctx, v47);
2344
0
                        let v21 = C::emit(ctx, v18);
2345
0
                        let v22 = C::emit(ctx, v19);
2346
0
                        let v24 = C::value_regs_get(ctx, v20, 0x0);
2347
0
                        let v26 = C::value_regs_get(ctx, v20, 0x1);
2348
0
                        let v67 = MultiReg::Four {
2349
0
                            a: v59,
2350
0
                            b: v48,
2351
0
                            c: v24,
2352
0
                            d: v26,
2353
0
                        };
2354
0
                        // Rule at src/prelude_lower.isle line 818.
2355
0
                        return v67;
2356
                    }
2357
                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2358
0
                        inst1: ref v28,
2359
0
                        inst2: ref v29,
2360
0
                        inst3: ref v30,
2361
0
                        inst4: ref v31,
2362
0
                        result: v32,
2363
0
                    } => {
2364
0
                        let v60 = C::emit(ctx, v58);
2365
0
                        let v49 = C::emit(ctx, v47);
2366
0
                        let v33 = C::emit(ctx, v28);
2367
0
                        let v34 = C::emit(ctx, v29);
2368
0
                        let v35 = C::emit(ctx, v30);
2369
0
                        let v36 = C::emit(ctx, v31);
2370
0
                        let v37 = C::value_regs_get(ctx, v32, 0x0);
2371
0
                        let v38 = C::value_regs_get(ctx, v32, 0x1);
2372
0
                        let v68 = MultiReg::Four {
2373
0
                            a: v59,
2374
0
                            b: v48,
2375
0
                            c: v37,
2376
0
                            d: v38,
2377
0
                        };
2378
0
                        // Rule at src/prelude_lower.isle line 827.
2379
0
                        return v68;
2380
                    }
2381
0
                    _ => {}
2382
                }
2383
0
            }
2384
        }
2385
0
        _ => {}
2386
    }
2387
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags_chained", "src/prelude_lower.isle line 595")
2388
0
}
2389
2390
// Generated as internal constructor for term lower_return.
2391
50.1k
pub fn constructor_lower_return<C: Context>(
2392
50.1k
    ctx: &mut C,
2393
50.1k
    arg0: ValueSlice,
2394
50.1k
) -> InstOutput {
2395
50.1k
    let v1 = C::gen_return(ctx, arg0);
2396
50.1k
    let v2 = C::output_none(ctx);
2397
50.1k
    // Rule at src/prelude_lower.isle line 1027.
2398
50.1k
    return v2;
2399
50.1k
}
2400
2401
// Generated as internal constructor for term operand_size_bits.
2402
188k
pub fn constructor_operand_size_bits<C: Context>(
2403
188k
    ctx: &mut C,
2404
188k
    arg0: &OperandSize,
2405
188k
) -> u16 {
2406
188k
    match arg0 {
2407
        &OperandSize::Size8 => {
2408
            // Rule at src/isa/x64/inst.isle line 741.
2409
0
            return 0x8;
2410
        }
2411
        &OperandSize::Size16 => {
2412
            // Rule at src/isa/x64/inst.isle line 742.
2413
0
            return 0x10;
2414
        }
2415
        &OperandSize::Size32 => {
2416
            // Rule at src/isa/x64/inst.isle line 743.
2417
14.3k
            return 0x20;
2418
        }
2419
        &OperandSize::Size64 => {
2420
            // Rule at src/isa/x64/inst.isle line 744.
2421
173k
            return 0x40;
2422
        }
2423
0
        _ => {}
2424
0
    }
2425
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "operand_size_bits", "src/isa/x64/inst.isle line 740")
2426
188k
}
2427
2428
// Generated as internal constructor for term reg_mem_to_reg_mem_imm.
2429
0
pub fn constructor_reg_mem_to_reg_mem_imm<C: Context>(
2430
0
    ctx: &mut C,
2431
0
    arg0: &RegMem,
2432
0
) -> RegMemImm {
2433
0
    match arg0 {
2434
        &RegMem::Reg {
2435
0
            reg: v1,
2436
0
        } => {
2437
0
            let v2 = RegMemImm::Reg {
2438
0
                reg: v1,
2439
0
            };
2440
0
            // Rule at src/isa/x64/inst.isle line 995.
2441
0
            return v2;
2442
        }
2443
        &RegMem::Mem {
2444
0
            addr: ref v3,
2445
0
        } => {
2446
0
            let v4 = RegMemImm::Mem {
2447
0
                addr: v3.clone(),
2448
0
            };
2449
0
            // Rule at src/isa/x64/inst.isle line 997.
2450
0
            return v4;
2451
        }
2452
0
        _ => {}
2453
0
    }
2454
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "reg_mem_to_reg_mem_imm", "src/isa/x64/inst.isle line 994")
2455
0
}
2456
2457
// Generated as internal constructor for term to_amode.
2458
2.19M
pub fn constructor_to_amode<C: Context>(
2459
2.19M
    ctx: &mut C,
2460
2.19M
    arg0: MemFlags,
2461
2.19M
    arg1: Value,
2462
2.19M
    arg2: Offset32,
2463
2.19M
) -> Amode {
2464
2.19M
    let v4 = C::def_inst(ctx, arg1);
2465
2.19M
    if let Some(
v51.86M
) = v4 {
2466
1.86M
        let v6 = &C::inst_data(ctx, v5);
2467
        if let &InstructionData::Binary {
2468
1.73M
            opcode: ref v7,
2469
1.73M
            args: ref v8,
2470
1.86M
        } = v6 {
2471
1.73M
            if let &Opcode::Iadd = v7 {
2472
1.73M
                let v9 = C::unpack_value_array_2(ctx, v8);
2473
1.73M
                let v12 = &constructor_to_amode_add(ctx, arg0, v9.0, v9.1, arg2);
2474
1.73M
                // Rule at src/isa/x64/inst.isle line 1083.
2475
1.73M
                return v12.clone();
2476
0
            }
2477
134k
        }
2478
333k
    }
2479
467k
    let v3 = &constructor_amode_imm_reg(ctx, arg0, arg1, arg2);
2480
467k
    // Rule at src/isa/x64/inst.isle line 1081.
2481
467k
    return v3.clone();
2482
2.19M
}
2483
2484
// Generated as internal constructor for term to_amode_add.
2485
2.77M
pub fn constructor_to_amode_add<C: Context>(
2486
2.77M
    ctx: &mut C,
2487
2.77M
    arg0: MemFlags,
2488
2.77M
    arg1: Value,
2489
2.77M
    arg2: Value,
2490
2.77M
    arg3: Offset32,
2491
2.77M
) -> Amode {
2492
2.77M
    let v5 = C::def_inst(ctx, arg2);
2493
2.77M
    if let Some(
v62.75M
) = v5 {
2494
2.75M
        let v7 = &C::inst_data(ctx, v6);
2495
        if let &InstructionData::Binary {
2496
88.1k
            opcode: ref v55,
2497
88.1k
            args: ref v56,
2498
2.75M
        } = v7 {
2499
88.1k
            if let &Opcode::Iadd = v55 {
2500
2.27k
                let v57 = C::unpack_value_array_2(ctx, v56);
2501
2.27k
                let v71 = C::def_inst(ctx, v57.0);
2502
2.27k
                if let Some(
v721.19k
) = v71 {
2503
1.19k
                    let v73 = &C::inst_data(ctx, v72);
2504
                    if let &InstructionData::UnaryImm {
2505
0
                        opcode: ref v74,
2506
0
                        imm: v75,
2507
1.19k
                    } = v73 {
2508
0
                        if let &Opcode::Iconst = v74 {
2509
0
                            let v76 = C::simm32(ctx, v75);
2510
0
                            if let Some(v77) = v76 {
2511
0
                                let v12 = C::offset32_to_i32(ctx, arg3);
2512
0
                                let v78 = C::s32_add_fallible(ctx, v12, v77);
2513
0
                                if let Some(v79) = v78 {
2514
0
                                    let v80 = C::i32_to_offset32(ctx, v79);
2515
0
                                    let v81 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, arg1, v57.1, v80);
2516
0
                                    // Rule at src/isa/x64/inst.isle line 1116.
2517
0
                                    return v81.clone();
2518
0
                                }
2519
0
                            }
2520
0
                        }
2521
1.19k
                    }
2522
1.08k
                }
2523
2.27k
                let v60 = C::def_inst(ctx, v57.1);
2524
2.27k
                if let Some(
v612.09k
) = v60 {
2525
2.09k
                    let v62 = &C::inst_data(ctx, v61);
2526
                    if let &InstructionData::UnaryImm {
2527
1.04k
                        opcode: ref v63,
2528
1.04k
                        imm: v64,
2529
2.09k
                    } = v62 {
2530
1.04k
                        if let &Opcode::Iconst = v63 {
2531
1.04k
                            let v65 = C::simm32(ctx, v64);
2532
1.04k
                            if let Some(
v66700
) = v65 {
2533
700
                                let v12 = C::offset32_to_i32(ctx, arg3);
2534
700
                                let v67 = C::s32_add_fallible(ctx, v12, v66);
2535
700
                                if let Some(v68) = v67 {
2536
700
                                    let v69 = C::i32_to_offset32(ctx, v68);
2537
700
                                    let v70 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, arg1, v57.0, v69);
2538
700
                                    // Rule at src/isa/x64/inst.isle line 1113.
2539
700
                                    return v70.clone();
2540
0
                                }
2541
342
                            }
2542
0
                        }
2543
1.05k
                    }
2544
182
                }
2545
85.8k
            }
2546
2.67M
        }
2547
13.0k
    }
2548
2.77M
    let v17 = C::def_inst(ctx, arg1);
2549
2.77M
    if let Some(
v182.45M
) = v17 {
2550
2.45M
        let v19 = &C::inst_data(ctx, v18);
2551
2.45M
        match v19 {
2552
            &InstructionData::Binary {
2553
962k
                opcode: ref v28,
2554
962k
                args: ref v29,
2555
962k
            } => {
2556
962k
                if let &Opcode::Iadd = v28 {
2557
942k
                    let v30 = C::unpack_value_array_2(ctx, v29);
2558
942k
                    let v44 = C::def_inst(ctx, v30.0);
2559
942k
                    if let Some(
v45916k
) = v44 {
2560
916k
                        let v46 = &C::inst_data(ctx, v45);
2561
                        if let &InstructionData::UnaryImm {
2562
0
                            opcode: ref v47,
2563
0
                            imm: v48,
2564
916k
                        } = v46 {
2565
0
                            if let &Opcode::Iconst = v47 {
2566
0
                                let v49 = C::simm32(ctx, v48);
2567
0
                                if let Some(v50) = v49 {
2568
0
                                    let v12 = C::offset32_to_i32(ctx, arg3);
2569
0
                                    let v51 = C::s32_add_fallible(ctx, v12, v50);
2570
0
                                    if let Some(v52) = v51 {
2571
0
                                        let v53 = C::i32_to_offset32(ctx, v52);
2572
0
                                        let v54 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, v30.1, arg2, v53);
2573
0
                                        // Rule at src/isa/x64/inst.isle line 1110.
2574
0
                                        return v54.clone();
2575
0
                                    }
2576
0
                                }
2577
0
                            }
2578
916k
                        }
2579
26.5k
                    }
2580
942k
                    let v33 = C::def_inst(ctx, v30.1);
2581
942k
                    if let Some(
v34922k
) = v33 {
2582
922k
                        let v35 = &C::inst_data(ctx, v34);
2583
                        if let &InstructionData::UnaryImm {
2584
4.97k
                            opcode: ref v36,
2585
4.97k
                            imm: v37,
2586
922k
                        } = v35 {
2587
4.97k
                            if let &Opcode::Iconst = v36 {
2588
4.97k
                                let v38 = C::simm32(ctx, v37);
2589
4.97k
                                if let Some(
v393.91k
) = v38 {
2590
3.91k
                                    let v12 = C::offset32_to_i32(ctx, arg3);
2591
3.91k
                                    let v40 = C::s32_add_fallible(ctx, v12, v39);
2592
3.91k
                                    if let Some(v41) = v40 {
2593
3.91k
                                        let v42 = C::i32_to_offset32(ctx, v41);
2594
3.91k
                                        let v43 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, v30.0, arg2, v42);
2595
3.91k
                                        // Rule at src/isa/x64/inst.isle line 1107.
2596
3.91k
                                        return v43.clone();
2597
0
                                    }
2598
1.05k
                                }
2599
0
                            }
2600
917k
                        }
2601
20.0k
                    }
2602
20.1k
                }
2603
            }
2604
            &InstructionData::UnaryImm {
2605
0
                opcode: ref v20,
2606
0
                imm: v21,
2607
0
            } => {
2608
0
                if let &Opcode::Iconst = v20 {
2609
0
                    let v22 = C::simm32(ctx, v21);
2610
0
                    if let Some(v23) = v22 {
2611
0
                        let v12 = C::offset32_to_i32(ctx, arg3);
2612
0
                        let v24 = C::s32_add_fallible(ctx, v12, v23);
2613
0
                        if let Some(v25) = v24 {
2614
0
                            let v26 = C::i32_to_offset32(ctx, v25);
2615
0
                            let v27 = &constructor_amode_imm_reg(ctx, arg0, arg2, v26);
2616
0
                            // Rule at src/isa/x64/inst.isle line 1104.
2617
0
                            return v27.clone();
2618
0
                        }
2619
0
                    }
2620
0
                }
2621
            }
2622
1.48M
            _ => {}
2623
        }
2624
318k
    }
2625
2.76M
    if let Some(
v62.75M
) = v5 {
2626
2.75M
        let v7 = &C::inst_data(ctx, v6);
2627
        if let &InstructionData::UnaryImm {
2628
1.76M
            opcode: ref v8,
2629
1.76M
            imm: v9,
2630
2.75M
        } = v7 {
2631
1.76M
            if let &Opcode::Iconst = v8 {
2632
1.76M
                let v10 = C::simm32(ctx, v9);
2633
1.76M
                if let Some(
v111.35M
) = v10 {
2634
1.35M
                    let v12 = C::offset32_to_i32(ctx, arg3);
2635
1.35M
                    let v13 = C::s32_add_fallible(ctx, v12, v11);
2636
1.35M
                    if let Some(v14) = v13 {
2637
1.35M
                        let v15 = C::i32_to_offset32(ctx, v14);
2638
1.35M
                        let v16 = &constructor_amode_imm_reg(ctx, arg0, arg1, v15);
2639
1.35M
                        // Rule at src/isa/x64/inst.isle line 1101.
2640
1.35M
                        return v16.clone();
2641
0
                    }
2642
410k
                }
2643
0
            }
2644
992k
        }
2645
13.0k
    }
2646
1.41M
    let v4 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, arg1, arg2, arg3);
2647
1.41M
    // Rule at src/isa/x64/inst.isle line 1099.
2648
1.41M
    return v4.clone();
2649
2.77M
}
2650
2651
// Generated as internal constructor for term amode_imm_reg.
2652
1.81M
pub fn constructor_amode_imm_reg<C: Context>(
2653
1.81M
    ctx: &mut C,
2654
1.81M
    arg0: MemFlags,
2655
1.81M
    arg1: Value,
2656
1.81M
    arg2: Offset32,
2657
1.81M
) -> Amode {
2658
1.81M
    let v6 = C::def_inst(ctx, arg1);
2659
1.81M
    if let Some(
v71.21M
) = v6 {
2660
1.21M
        let v8 = &C::inst_data(ctx, v7);
2661
        if let &InstructionData::Binary {
2662
939k
            opcode: ref v9,
2663
939k
            args: ref v10,
2664
1.21M
        } = v8 {
2665
939k
            if let &Opcode::Iadd = v9 {
2666
925k
                let v11 = C::unpack_value_array_2(ctx, v10);
2667
925k
                let v14 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, v11.0, v11.1, arg2);
2668
925k
                // Rule at src/isa/x64/inst.isle line 1126.
2669
925k
                return v14.clone();
2670
14.4k
            }
2671
275k
        }
2672
603k
    }
2673
893k
    let v4 = C::put_in_reg(ctx, arg1);
2674
893k
    let v3 = C::offset32_to_i32(ctx, arg2);
2675
893k
    let v5 = Amode::ImmReg {
2676
893k
        simm32: v3,
2677
893k
        base: v4,
2678
893k
        flags: arg0,
2679
893k
    };
2680
893k
    // Rule at src/isa/x64/inst.isle line 1124.
2681
893k
    return v5;
2682
1.81M
}
2683
2684
// Generated as internal constructor for term amode_imm_reg_reg_shift.
2685
2.34M
pub fn constructor_amode_imm_reg_reg_shift<C: Context>(
2686
2.34M
    ctx: &mut C,
2687
2.34M
    arg0: MemFlags,
2688
2.34M
    arg1: Value,
2689
2.34M
    arg2: Value,
2690
2.34M
    arg3: Offset32,
2691
2.34M
) -> Amode {
2692
2.34M
    let v30 = C::def_inst(ctx, arg1);
2693
2.34M
    if let Some(
v312.27M
) = v30 {
2694
2.27M
        let v32 = &C::inst_data(ctx, v31);
2695
        if let &InstructionData::Binary {
2696
24.1k
            opcode: ref v33,
2697
24.1k
            args: ref v34,
2698
2.27M
        } = v32 {
2699
24.1k
            if let &Opcode::Ishl = v33 {
2700
1.40k
                let v35 = C::unpack_value_array_2(ctx, v34);
2701
1.40k
                let v38 = C::def_inst(ctx, v35.1);
2702
1.40k
                if let Some(v39) = v38 {
2703
1.40k
                    let v40 = &C::inst_data(ctx, v39);
2704
                    if let &InstructionData::UnaryImm {
2705
1.38k
                        opcode: ref v41,
2706
1.38k
                        imm: v42,
2707
1.40k
                    } = v40 {
2708
1.38k
                        if let &Opcode::Iconst = v41 {
2709
1.38k
                            let v43 = C::uimm8(ctx, v42);
2710
1.38k
                            if let Some(v44) = v43 {
2711
1.38k
                                let v45 = C::u8_as_u32(ctx, v44);
2712
1.38k
                                let v46 = C::u32_lteq(ctx, v45, 0x3);
2713
1.38k
                                if let Some(
v471.18k
) = v46 {
2714
1.18k
                                    let v48 = constructor_put_in_gpr(ctx, arg2);
2715
1.18k
                                    let v49 = constructor_put_in_gpr(ctx, v35.0);
2716
1.18k
                                    let v4 = C::offset32_to_i32(ctx, arg3);
2717
1.18k
                                    let v50 = Amode::ImmRegRegShift {
2718
1.18k
                                        simm32: v4,
2719
1.18k
                                        base: v48,
2720
1.18k
                                        index: v49,
2721
1.18k
                                        shift: v44,
2722
1.18k
                                        flags: arg0,
2723
1.18k
                                    };
2724
1.18k
                                    // Rule at src/isa/x64/inst.isle line 1135.
2725
1.18k
                                    return v50;
2726
194
                                }
2727
0
                            }
2728
0
                        }
2729
18
                    }
2730
0
                }
2731
22.7k
            }
2732
2.24M
        }
2733
73.6k
    }
2734
2.34M
    let v9 = C::def_inst(ctx, arg2);
2735
2.34M
    if let Some(
v102.31M
) = v9 {
2736
2.31M
        let v11 = &C::inst_data(ctx, v10);
2737
        if let &InstructionData::Binary {
2738
196k
            opcode: ref v12,
2739
196k
            args: ref v13,
2740
2.31M
        } = v11 {
2741
196k
            if let &Opcode::Ishl = v12 {
2742
46.3k
                let v14 = C::unpack_value_array_2(ctx, v13);
2743
46.3k
                let v17 = C::def_inst(ctx, v14.1);
2744
46.3k
                if let Some(v18) = v17 {
2745
46.3k
                    let v19 = &C::inst_data(ctx, v18);
2746
                    if let &InstructionData::UnaryImm {
2747
46.2k
                        opcode: ref v20,
2748
46.2k
                        imm: v21,
2749
46.3k
                    } = v19 {
2750
46.2k
                        if let &Opcode::Iconst = v20 {
2751
46.2k
                            let v22 = C::uimm8(ctx, v21);
2752
46.2k
                            if let Some(v23) = v22 {
2753
46.2k
                                let v24 = C::u8_as_u32(ctx, v23);
2754
46.2k
                                let v26 = C::u32_lteq(ctx, v24, 0x3);
2755
46.2k
                                if let Some(
v2740.2k
) = v26 {
2756
40.2k
                                    let v5 = constructor_put_in_gpr(ctx, arg1);
2757
40.2k
                                    let v28 = constructor_put_in_gpr(ctx, v14.0);
2758
40.2k
                                    let v4 = C::offset32_to_i32(ctx, arg3);
2759
40.2k
                                    let v29 = Amode::ImmRegRegShift {
2760
40.2k
                                        simm32: v4,
2761
40.2k
                                        base: v5,
2762
40.2k
                                        index: v28,
2763
40.2k
                                        shift: v23,
2764
40.2k
                                        flags: arg0,
2765
40.2k
                                    };
2766
40.2k
                                    // Rule at src/isa/x64/inst.isle line 1132.
2767
40.2k
                                    return v29;
2768
6.07k
                                }
2769
0
                            }
2770
0
                        }
2771
11
                    }
2772
0
                }
2773
150k
            }
2774
2.11M
        }
2775
31.7k
    }
2776
2.30M
    let v5 = constructor_put_in_gpr(ctx, arg1);
2777
2.30M
    let v6 = constructor_put_in_gpr(ctx, arg2);
2778
2.30M
    let v4 = C::offset32_to_i32(ctx, arg3);
2779
2.30M
    let v8 = Amode::ImmRegRegShift {
2780
2.30M
        simm32: v4,
2781
2.30M
        base: v5,
2782
2.30M
        index: v6,
2783
2.30M
        shift: 0x0,
2784
2.30M
        flags: arg0,
2785
2.30M
    };
2786
2.30M
    // Rule at src/isa/x64/inst.isle line 1130.
2787
2.30M
    return v8;
2788
2.34M
}
2789
2790
// Generated as internal constructor for term put_masked_in_imm8_gpr.
2791
40.8k
pub fn constructor_put_masked_in_imm8_gpr<C: Context>(
2792
40.8k
    ctx: &mut C,
2793
40.8k
    arg0: Value,
2794
40.8k
    arg1: Type,
2795
40.8k
) -> Imm8Gpr {
2796
40.8k
    let v1 = C::def_inst(ctx, arg0);
2797
40.8k
    if let Some(
v240.8k
) = v1 {
2798
40.8k
        let v3 = &C::inst_data(ctx, v2);
2799
        if let &InstructionData::UnaryImm {
2800
39.8k
            opcode: ref v4,
2801
39.8k
            imm: v5,
2802
40.8k
        } = v3 {
2803
39.8k
            if let &Opcode::Iconst = v4 {
2804
39.8k
                let v6 = C::u64_from_imm64(ctx, v5);
2805
39.8k
                let v8 = &C::const_to_type_masked_imm8(ctx, v6, arg1);
2806
39.8k
                // Rule at src/isa/x64/inst.isle line 1171.
2807
39.8k
                return v8.clone();
2808
0
            }
2809
1.04k
        }
2810
14
    }
2811
1.05k
    let v9 = C::fits_in_16(ctx, arg1);
2812
1.05k
    if let Some(
v100
) = v9 {
2813
0
        let v12 = C::put_in_regs(ctx, arg0);
2814
0
        let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
2815
0
        let v15 = C::shift_mask(ctx, v10);
2816
0
        let v16 = C::u8_as_u32(ctx, v15);
2817
0
        let v17 = RegMemImm::Imm {
2818
0
            simm32: v16,
2819
0
        };
2820
0
        let v18 = &C::gpr_mem_imm_new(ctx, &v17);
2821
0
        let v19 = constructor_x64_and(ctx, I64, v14, v18);
2822
0
        let v20 = &C::gpr_to_imm8_gpr(ctx, v19);
2823
0
        // Rule at src/isa/x64/inst.isle line 1173.
2824
0
        return v20.clone();
2825
1.05k
    }
2826
1.05k
    let v12 = C::put_in_regs(ctx, arg0);
2827
1.05k
    let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
2828
1.05k
    let v21 = &C::gpr_to_imm8_gpr(ctx, v14);
2829
1.05k
    // Rule at src/isa/x64/inst.isle line 1175.
2830
1.05k
    return v21.clone();
2831
40.8k
}
2832
2833
// Generated as internal constructor for term reg_to_gpr_mem_imm.
2834
19.9k
pub fn constructor_reg_to_gpr_mem_imm<C: Context>(
2835
19.9k
    ctx: &mut C,
2836
19.9k
    arg0: Reg,
2837
19.9k
) -> GprMemImm {
2838
19.9k
    let v1 = C::gpr_new(ctx, arg0);
2839
19.9k
    let v2 = &C::gpr_to_gpr_mem_imm(ctx, v1);
2840
19.9k
    // Rule at src/isa/x64/inst.isle line 1591.
2841
19.9k
    return v2.clone();
2842
19.9k
}
2843
2844
// Generated as internal constructor for term put_in_gpr.
2845
6.82M
pub fn constructor_put_in_gpr<C: Context>(
2846
6.82M
    ctx: &mut C,
2847
6.82M
    arg0: Value,
2848
6.82M
) -> Gpr {
2849
6.82M
    let v1 = C::put_in_reg(ctx, arg0);
2850
6.82M
    let v2 = C::gpr_new(ctx, v1);
2851
6.82M
    // Rule at src/isa/x64/inst.isle line 1598.
2852
6.82M
    return v2;
2853
6.82M
}
2854
2855
// Generated as internal constructor for term put_in_gpr_mem.
2856
212k
pub fn constructor_put_in_gpr_mem<C: Context>(
2857
212k
    ctx: &mut C,
2858
212k
    arg0: Value,
2859
212k
) -> GprMem {
2860
212k
    let v1 = &C::put_in_reg_mem(ctx, arg0);
2861
212k
    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
2862
212k
    // Rule at src/isa/x64/inst.isle line 1605.
2863
212k
    return v2.clone();
2864
212k
}
2865
2866
// Generated as internal constructor for term put_in_gpr_mem_imm.
2867
499k
pub fn constructor_put_in_gpr_mem_imm<C: Context>(
2868
499k
    ctx: &mut C,
2869
499k
    arg0: Value,
2870
499k
) -> GprMemImm {
2871
499k
    let v1 = &C::put_in_reg_mem_imm(ctx, arg0);
2872
499k
    let v2 = &C::gpr_mem_imm_new(ctx, v1);
2873
499k
    // Rule at src/isa/x64/inst.isle line 1612.
2874
499k
    return v2.clone();
2875
499k
}
2876
2877
// Generated as internal constructor for term put_in_xmm.
2878
1
pub fn constructor_put_in_xmm<C: Context>(
2879
1
    ctx: &mut C,
2880
1
    arg0: Value,
2881
1
) -> Xmm {
2882
1
    let v1 = C::put_in_reg(ctx, arg0);
2883
1
    let v2 = C::xmm_new(ctx, v1);
2884
1
    // Rule at src/isa/x64/inst.isle line 1619.
2885
1
    return v2;
2886
1
}
2887
2888
// Generated as internal constructor for term output_gpr.
2889
2.81M
pub fn constructor_output_gpr<C: Context>(
2890
2.81M
    ctx: &mut C,
2891
2.81M
    arg0: Gpr,
2892
2.81M
) -> InstOutput {
2893
2.81M
    let v1 = C::gpr_to_reg(ctx, arg0);
2894
2.81M
    let v2 = constructor_output_reg(ctx, v1);
2895
2.81M
    // Rule at src/isa/x64/inst.isle line 1636.
2896
2.81M
    return v2;
2897
2.81M
}
2898
2899
// Generated as internal constructor for term value_gprs.
2900
0
pub fn constructor_value_gprs<C: Context>(
2901
0
    ctx: &mut C,
2902
0
    arg0: Gpr,
2903
0
    arg1: Gpr,
2904
0
) -> ValueRegs {
2905
0
    let v2 = C::gpr_to_reg(ctx, arg0);
2906
0
    let v3 = C::gpr_to_reg(ctx, arg1);
2907
0
    let v4 = C::value_regs(ctx, v2, v3);
2908
0
    // Rule at src/isa/x64/inst.isle line 1641.
2909
0
    return v4;
2910
0
}
2911
2912
// Generated as internal constructor for term output_xmm.
2913
0
pub fn constructor_output_xmm<C: Context>(
2914
0
    ctx: &mut C,
2915
0
    arg0: Xmm,
2916
0
) -> InstOutput {
2917
0
    let v1 = C::xmm_to_reg(ctx, arg0);
2918
0
    let v2 = constructor_output_reg(ctx, v1);
2919
0
    // Rule at src/isa/x64/inst.isle line 1646.
2920
0
    return v2;
2921
0
}
2922
2923
// Generated as internal constructor for term value_regs_get_gpr.
2924
16.3k
pub fn constructor_value_regs_get_gpr<C: Context>(
2925
16.3k
    ctx: &mut C,
2926
16.3k
    arg0: ValueRegs,
2927
16.3k
    arg1: usize,
2928
16.3k
) -> Gpr {
2929
16.3k
    let v2 = C::value_regs_get(ctx, arg0, arg1);
2930
16.3k
    let v3 = C::gpr_new(ctx, v2);
2931
16.3k
    // Rule at src/isa/x64/inst.isle line 1653.
2932
16.3k
    return v3;
2933
16.3k
}
2934
2935
// Generated as internal constructor for term lo_gpr.
2936
0
pub fn constructor_lo_gpr<C: Context>(
2937
0
    ctx: &mut C,
2938
0
    arg0: Value,
2939
0
) -> Gpr {
2940
0
    let v1 = constructor_lo_reg(ctx, arg0);
2941
0
    let v2 = C::gpr_new(ctx, v1);
2942
0
    // Rule at src/isa/x64/inst.isle line 1666.
2943
0
    return v2;
2944
0
}
2945
2946
// Generated as internal constructor for term sink_load_to_gpr_mem_imm.
2947
17.8k
pub fn constructor_sink_load_to_gpr_mem_imm<C: Context>(
2948
17.8k
    ctx: &mut C,
2949
17.8k
    arg0: &SinkableLoad,
2950
17.8k
) -> GprMemImm {
2951
17.8k
    let v1 = &constructor_sink_load_to_reg_mem_imm(ctx, arg0);
2952
17.8k
    let v2 = &C::gpr_mem_imm_new(ctx, v1);
2953
17.8k
    // Rule at src/isa/x64/inst.isle line 1801.
2954
17.8k
    return v2.clone();
2955
17.8k
}
2956
2957
// Generated as internal constructor for term sink_load_to_xmm_mem.
2958
0
pub fn constructor_sink_load_to_xmm_mem<C: Context>(
2959
0
    ctx: &mut C,
2960
0
    arg0: &SinkableLoad,
2961
0
) -> XmmMem {
2962
0
    let v1 = &constructor_sink_load_to_reg_mem(ctx, arg0);
2963
0
    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
2964
0
    // Rule at src/isa/x64/inst.isle line 1805.
2965
0
    return v2.clone();
2966
0
}
2967
2968
// Generated as internal constructor for term sink_load_to_reg_mem.
2969
0
pub fn constructor_sink_load_to_reg_mem<C: Context>(
2970
0
    ctx: &mut C,
2971
0
    arg0: &SinkableLoad,
2972
0
) -> RegMem {
2973
0
    let v1 = &C::sink_load(ctx, arg0);
2974
0
    let v2 = RegMem::Mem {
2975
0
        addr: v1.clone(),
2976
0
    };
2977
0
    // Rule at src/isa/x64/inst.isle line 1809.
2978
0
    return v2;
2979
0
}
2980
2981
// Generated as internal constructor for term sink_load_to_gpr_mem.
2982
0
pub fn constructor_sink_load_to_gpr_mem<C: Context>(
2983
0
    ctx: &mut C,
2984
0
    arg0: &SinkableLoad,
2985
0
) -> GprMem {
2986
0
    let v1 = &C::sink_load(ctx, arg0);
2987
0
    let v2 = RegMem::Mem {
2988
0
        addr: v1.clone(),
2989
0
    };
2990
0
    let v3 = &C::reg_mem_to_gpr_mem(ctx, &v2);
2991
0
    // Rule at src/isa/x64/inst.isle line 1812.
2992
0
    return v3.clone();
2993
0
}
2994
2995
// Generated as internal constructor for term sink_load_to_reg_mem_imm.
2996
19.7k
pub fn constructor_sink_load_to_reg_mem_imm<C: Context>(
2997
19.7k
    ctx: &mut C,
2998
19.7k
    arg0: &SinkableLoad,
2999
19.7k
) -> RegMemImm {
3000
19.7k
    let v1 = &C::sink_load(ctx, arg0);
3001
19.7k
    let v2 = RegMemImm::Mem {
3002
19.7k
        addr: v1.clone(),
3003
19.7k
    };
3004
19.7k
    // Rule at src/isa/x64/inst.isle line 1815.
3005
19.7k
    return v2;
3006
19.7k
}
3007
3008
// Generated as internal constructor for term xmm_uninit_value.
3009
0
pub fn constructor_xmm_uninit_value<C: Context>(
3010
0
    ctx: &mut C,
3011
0
) -> Xmm {
3012
0
    let v0 = C::temp_writable_xmm(ctx);
3013
0
    let v1 = MInst::XmmUninitializedValue {
3014
0
        dst: v0,
3015
0
    };
3016
0
    let v2 = C::emit(ctx, &v1);
3017
0
    let v3 = C::writable_xmm_to_xmm(ctx, v0);
3018
0
    // Rule at src/isa/x64/inst.isle line 1827.
3019
0
    return v3;
3020
0
}
3021
3022
// Generated as internal constructor for term load_ext_name.
3023
0
pub fn constructor_load_ext_name<C: Context>(
3024
0
    ctx: &mut C,
3025
0
    arg0: ExternalName,
3026
0
    arg1: i64,
3027
0
    arg2: RelocDistance,
3028
0
) -> Reg {
3029
0
    let v3 = C::temp_writable_gpr(ctx);
3030
0
    let v4 = C::writable_gpr_to_reg(ctx, v3);
3031
0
    let v5 = C::box_external_name(ctx, arg0);
3032
0
    let v6 = MInst::LoadExtName {
3033
0
        dst: v4,
3034
0
        name: v5,
3035
0
        offset: arg1,
3036
0
        distance: arg2,
3037
0
    };
3038
0
    let v7 = C::emit(ctx, &v6);
3039
0
    let v8 = constructor_writable_gpr_to_r_reg(ctx, v3);
3040
0
    // Rule at src/isa/x64/inst.isle line 1834.
3041
0
    return v8;
3042
0
}
3043
3044
// Generated as internal constructor for term mov64_mr.
3045
530k
pub fn constructor_mov64_mr<C: Context>(
3046
530k
    ctx: &mut C,
3047
530k
    arg0: &SyntheticAmode,
3048
530k
) -> Reg {
3049
530k
    let v1 = C::temp_writable_gpr(ctx);
3050
530k
    let v2 = MInst::Mov64MR {
3051
530k
        src: arg0.clone(),
3052
530k
        dst: v1,
3053
530k
    };
3054
530k
    let v3 = C::emit(ctx, &v2);
3055
530k
    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
3056
530k
    // Rule at src/isa/x64/inst.isle line 1841.
3057
530k
    return v4;
3058
530k
}
3059
3060
// Generated as internal constructor for term alu_rmi_r.
3061
234k
pub fn constructor_alu_rmi_r<C: Context>(
3062
234k
    ctx: &mut C,
3063
234k
    arg0: Type,
3064
234k
    arg1: &AluRmiROpcode,
3065
234k
    arg2: Gpr,
3066
234k
    arg3: &GprMemImm,
3067
234k
) -> Gpr {
3068
234k
    let v4 = C::temp_writable_gpr(ctx);
3069
234k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3070
234k
    let v6 = MInst::AluRmiR {
3071
234k
        size: v5.clone(),
3072
234k
        op: arg1.clone(),
3073
234k
        src1: arg2,
3074
234k
        src2: arg3.clone(),
3075
234k
        dst: v4,
3076
234k
    };
3077
234k
    let v7 = C::emit(ctx, &v6);
3078
234k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
3079
234k
    // Rule at src/isa/x64/inst.isle line 1848.
3080
234k
    return v8;
3081
234k
}
3082
3083
// Generated as internal constructor for term alu_rm_r_vex.
3084
1.26k
pub fn constructor_alu_rm_r_vex<C: Context>(
3085
1.26k
    ctx: &mut C,
3086
1.26k
    arg0: Type,
3087
1.26k
    arg1: &AluRmROpcode,
3088
1.26k
    arg2: Gpr,
3089
1.26k
    arg3: &GprMem,
3090
1.26k
) -> Gpr {
3091
1.26k
    let v4 = C::temp_writable_gpr(ctx);
3092
1.26k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3093
1.26k
    let v6 = MInst::AluRmRVex {
3094
1.26k
        size: v5.clone(),
3095
1.26k
        op: arg1.clone(),
3096
1.26k
        src1: arg2,
3097
1.26k
        src2: arg3.clone(),
3098
1.26k
        dst: v4,
3099
1.26k
    };
3100
1.26k
    let v7 = C::emit(ctx, &v6);
3101
1.26k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
3102
1.26k
    // Rule at src/isa/x64/inst.isle line 1856.
3103
1.26k
    return v8;
3104
1.26k
}
3105
3106
// Generated as internal constructor for term xmm_rm_r.
3107
0
pub fn constructor_xmm_rm_r<C: Context>(
3108
0
    ctx: &mut C,
3109
0
    arg0: &SseOpcode,
3110
0
    arg1: Xmm,
3111
0
    arg2: &XmmMemAligned,
3112
0
) -> Xmm {
3113
0
    let v3 = C::temp_writable_xmm(ctx);
3114
0
    let v4 = MInst::XmmRmR {
3115
0
        op: arg0.clone(),
3116
0
        src1: arg1,
3117
0
        src2: arg2.clone(),
3118
0
        dst: v3,
3119
0
    };
3120
0
    let v5 = C::emit(ctx, &v4);
3121
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3122
0
    // Rule at src/isa/x64/inst.isle line 1864.
3123
0
    return v6;
3124
0
}
3125
3126
// Generated as internal constructor for term xmm_rm_r_unaligned.
3127
0
pub fn constructor_xmm_rm_r_unaligned<C: Context>(
3128
0
    ctx: &mut C,
3129
0
    arg0: &SseOpcode,
3130
0
    arg1: Xmm,
3131
0
    arg2: &XmmMem,
3132
0
) -> Xmm {
3133
0
    let v3 = C::temp_writable_xmm(ctx);
3134
0
    let v4 = MInst::XmmRmRUnaligned {
3135
0
        op: arg0.clone(),
3136
0
        src1: arg1,
3137
0
        src2: arg2.clone(),
3138
0
        dst: v3,
3139
0
    };
3140
0
    let v5 = C::emit(ctx, &v4);
3141
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3142
0
    // Rule at src/isa/x64/inst.isle line 1871.
3143
0
    return v6;
3144
0
}
3145
3146
// Generated as internal constructor for term xmm_rm_r_blend.
3147
0
pub fn constructor_xmm_rm_r_blend<C: Context>(
3148
0
    ctx: &mut C,
3149
0
    arg0: &SseOpcode,
3150
0
    arg1: Xmm,
3151
0
    arg2: &XmmMemAligned,
3152
0
    arg3: Xmm,
3153
0
) -> Xmm {
3154
0
    let v4 = C::temp_writable_xmm(ctx);
3155
0
    let v5 = MInst::XmmRmRBlend {
3156
0
        op: arg0.clone(),
3157
0
        src1: arg1,
3158
0
        src2: arg2.clone(),
3159
0
        mask: arg3,
3160
0
        dst: v4,
3161
0
    };
3162
0
    let v6 = C::emit(ctx, &v5);
3163
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3164
0
    // Rule at src/isa/x64/inst.isle line 1878.
3165
0
    return v7;
3166
0
}
3167
3168
// Generated as internal constructor for term xmm_rmr_blend_vex.
3169
0
pub fn constructor_xmm_rmr_blend_vex<C: Context>(
3170
0
    ctx: &mut C,
3171
0
    arg0: &AvxOpcode,
3172
0
    arg1: Xmm,
3173
0
    arg2: &XmmMem,
3174
0
    arg3: Xmm,
3175
0
) -> Xmm {
3176
0
    let v4 = C::temp_writable_xmm(ctx);
3177
0
    let v5 = MInst::XmmRmRBlendVex {
3178
0
        op: arg0.clone(),
3179
0
        src1: arg1,
3180
0
        src2: arg2.clone(),
3181
0
        mask: arg3,
3182
0
        dst: v4,
3183
0
    };
3184
0
    let v6 = C::emit(ctx, &v5);
3185
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3186
0
    // Rule at src/isa/x64/inst.isle line 1885.
3187
0
    return v7;
3188
0
}
3189
3190
// Generated as internal constructor for term xmm_unary_rm_r_vex.
3191
0
pub fn constructor_xmm_unary_rm_r_vex<C: Context>(
3192
0
    ctx: &mut C,
3193
0
    arg0: &AvxOpcode,
3194
0
    arg1: &XmmMem,
3195
0
) -> Xmm {
3196
0
    let v2 = C::temp_writable_xmm(ctx);
3197
0
    let v3 = MInst::XmmUnaryRmRVex {
3198
0
        op: arg0.clone(),
3199
0
        src: arg1.clone(),
3200
0
        dst: v2,
3201
0
    };
3202
0
    let v4 = C::emit(ctx, &v3);
3203
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3204
0
    // Rule at src/isa/x64/inst.isle line 1892.
3205
0
    return v5;
3206
0
}
3207
3208
// Generated as internal constructor for term xmm_unary_rm_r_imm_vex.
3209
0
pub fn constructor_xmm_unary_rm_r_imm_vex<C: Context>(
3210
0
    ctx: &mut C,
3211
0
    arg0: &AvxOpcode,
3212
0
    arg1: &XmmMem,
3213
0
    arg2: u8,
3214
0
) -> Xmm {
3215
0
    let v3 = C::temp_writable_xmm(ctx);
3216
0
    let v4 = MInst::XmmUnaryRmRImmVex {
3217
0
        op: arg0.clone(),
3218
0
        src: arg1.clone(),
3219
0
        dst: v3,
3220
0
        imm: arg2,
3221
0
    };
3222
0
    let v5 = C::emit(ctx, &v4);
3223
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3224
0
    // Rule at src/isa/x64/inst.isle line 1899.
3225
0
    return v6;
3226
0
}
3227
3228
// Generated as internal constructor for term xmm_rm_r_imm.
3229
0
pub fn constructor_xmm_rm_r_imm<C: Context>(
3230
0
    ctx: &mut C,
3231
0
    arg0: &SseOpcode,
3232
0
    arg1: Reg,
3233
0
    arg2: &RegMem,
3234
0
    arg3: u8,
3235
0
    arg4: &OperandSize,
3236
0
) -> Xmm {
3237
0
    let v5 = C::temp_writable_xmm(ctx);
3238
0
    let v6 = C::writable_xmm_to_reg(ctx, v5);
3239
0
    let v7 = MInst::XmmRmRImm {
3240
0
        op: arg0.clone(),
3241
0
        src1: arg1,
3242
0
        src2: arg2.clone(),
3243
0
        dst: v6,
3244
0
        imm: arg3,
3245
0
        size: arg4.clone(),
3246
0
    };
3247
0
    let v8 = C::emit(ctx, &v7);
3248
0
    let v9 = C::writable_xmm_to_xmm(ctx, v5);
3249
0
    // Rule at src/isa/x64/inst.isle line 1906.
3250
0
    return v9;
3251
0
}
3252
3253
// Generated as internal constructor for term xmm_vex_pinsr.
3254
0
pub fn constructor_xmm_vex_pinsr<C: Context>(
3255
0
    ctx: &mut C,
3256
0
    arg0: &AvxOpcode,
3257
0
    arg1: Xmm,
3258
0
    arg2: &GprMem,
3259
0
    arg3: u8,
3260
0
) -> Xmm {
3261
0
    let v4 = C::temp_writable_xmm(ctx);
3262
0
    let v5 = MInst::XmmVexPinsr {
3263
0
        op: arg0.clone(),
3264
0
        src1: arg1,
3265
0
        src2: arg2.clone(),
3266
0
        dst: v4,
3267
0
        imm: arg3,
3268
0
    };
3269
0
    let v6 = C::emit(ctx, &v5);
3270
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3271
0
    // Rule at src/isa/x64/inst.isle line 1918.
3272
0
    return v7;
3273
0
}
3274
3275
// Generated as internal constructor for term xmm_unary_rm_r_imm.
3276
0
pub fn constructor_xmm_unary_rm_r_imm<C: Context>(
3277
0
    ctx: &mut C,
3278
0
    arg0: &SseOpcode,
3279
0
    arg1: &XmmMemAligned,
3280
0
    arg2: u8,
3281
0
) -> Xmm {
3282
0
    let v3 = C::temp_writable_xmm(ctx);
3283
0
    let v4 = MInst::XmmUnaryRmRImm {
3284
0
        op: arg0.clone(),
3285
0
        src: arg1.clone(),
3286
0
        imm: arg2,
3287
0
        dst: v3,
3288
0
    };
3289
0
    let v5 = C::emit(ctx, &v4);
3290
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3291
0
    // Rule at src/isa/x64/inst.isle line 1925.
3292
0
    return v6;
3293
0
}
3294
3295
// Generated as internal constructor for term xmm_unary_rm_r.
3296
0
pub fn constructor_xmm_unary_rm_r<C: Context>(
3297
0
    ctx: &mut C,
3298
0
    arg0: &SseOpcode,
3299
0
    arg1: &XmmMemAligned,
3300
0
) -> Xmm {
3301
0
    let v2 = C::temp_writable_xmm(ctx);
3302
0
    let v3 = MInst::XmmUnaryRmR {
3303
0
        op: arg0.clone(),
3304
0
        src: arg1.clone(),
3305
0
        dst: v2,
3306
0
    };
3307
0
    let v4 = C::emit(ctx, &v3);
3308
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3309
0
    // Rule at src/isa/x64/inst.isle line 1932.
3310
0
    return v5;
3311
0
}
3312
3313
// Generated as internal constructor for term xmm_unary_rm_r_unaligned.
3314
0
pub fn constructor_xmm_unary_rm_r_unaligned<C: Context>(
3315
0
    ctx: &mut C,
3316
0
    arg0: &SseOpcode,
3317
0
    arg1: &XmmMem,
3318
0
) -> Xmm {
3319
0
    let v2 = C::temp_writable_xmm(ctx);
3320
0
    let v3 = MInst::XmmUnaryRmRUnaligned {
3321
0
        op: arg0.clone(),
3322
0
        src: arg1.clone(),
3323
0
        dst: v2,
3324
0
    };
3325
0
    let v4 = C::emit(ctx, &v3);
3326
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3327
0
    // Rule at src/isa/x64/inst.isle line 1939.
3328
0
    return v5;
3329
0
}
3330
3331
// Generated as internal constructor for term xmm_unary_rm_r_evex.
3332
0
pub fn constructor_xmm_unary_rm_r_evex<C: Context>(
3333
0
    ctx: &mut C,
3334
0
    arg0: &Avx512Opcode,
3335
0
    arg1: &XmmMem,
3336
0
) -> Xmm {
3337
0
    let v2 = C::temp_writable_xmm(ctx);
3338
0
    let v3 = MInst::XmmUnaryRmREvex {
3339
0
        op: arg0.clone(),
3340
0
        src: arg1.clone(),
3341
0
        dst: v2,
3342
0
    };
3343
0
    let v4 = C::emit(ctx, &v3);
3344
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3345
0
    // Rule at src/isa/x64/inst.isle line 1946.
3346
0
    return v5;
3347
0
}
3348
3349
// Generated as internal constructor for term xmm_rm_r_evex.
3350
0
pub fn constructor_xmm_rm_r_evex<C: Context>(
3351
0
    ctx: &mut C,
3352
0
    arg0: &Avx512Opcode,
3353
0
    arg1: Xmm,
3354
0
    arg2: &XmmMem,
3355
0
) -> Xmm {
3356
0
    let v3 = C::temp_writable_xmm(ctx);
3357
0
    let v4 = MInst::XmmRmREvex {
3358
0
        op: arg0.clone(),
3359
0
        src1: arg1,
3360
0
        src2: arg2.clone(),
3361
0
        dst: v3,
3362
0
    };
3363
0
    let v5 = C::emit(ctx, &v4);
3364
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3365
0
    // Rule at src/isa/x64/inst.isle line 1953.
3366
0
    return v6;
3367
0
}
3368
3369
// Generated as internal constructor for term xmm_unary_rm_r_imm_evex.
3370
0
pub fn constructor_xmm_unary_rm_r_imm_evex<C: Context>(
3371
0
    ctx: &mut C,
3372
0
    arg0: &Avx512Opcode,
3373
0
    arg1: &XmmMem,
3374
0
    arg2: u8,
3375
0
) -> Xmm {
3376
0
    let v3 = C::temp_writable_xmm(ctx);
3377
0
    let v4 = MInst::XmmUnaryRmRImmEvex {
3378
0
        op: arg0.clone(),
3379
0
        src: arg1.clone(),
3380
0
        dst: v3,
3381
0
        imm: arg2,
3382
0
    };
3383
0
    let v5 = C::emit(ctx, &v4);
3384
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3385
0
    // Rule at src/isa/x64/inst.isle line 1963.
3386
0
    return v6;
3387
0
}
3388
3389
// Generated as internal constructor for term xmm_rmi_xmm.
3390
0
pub fn constructor_xmm_rmi_xmm<C: Context>(
3391
0
    ctx: &mut C,
3392
0
    arg0: &SseOpcode,
3393
0
    arg1: Xmm,
3394
0
    arg2: &XmmMemAlignedImm,
3395
0
) -> Xmm {
3396
0
    let v3 = C::temp_writable_xmm(ctx);
3397
0
    let v4 = MInst::XmmRmiReg {
3398
0
        opcode: arg0.clone(),
3399
0
        src1: arg1,
3400
0
        src2: arg2.clone(),
3401
0
        dst: v3,
3402
0
    };
3403
0
    let v5 = C::emit(ctx, &v4);
3404
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3405
0
    // Rule at src/isa/x64/inst.isle line 1970.
3406
0
    return v6;
3407
0
}
3408
3409
// Generated as internal constructor for term xmm_to_gpr_imm.
3410
0
pub fn constructor_xmm_to_gpr_imm<C: Context>(
3411
0
    ctx: &mut C,
3412
0
    arg0: &SseOpcode,
3413
0
    arg1: Xmm,
3414
0
    arg2: u8,
3415
0
) -> Gpr {
3416
0
    let v3 = C::temp_writable_gpr(ctx);
3417
0
    let v4 = MInst::XmmToGprImm {
3418
0
        op: arg0.clone(),
3419
0
        src: arg1,
3420
0
        dst: v3,
3421
0
        imm: arg2,
3422
0
    };
3423
0
    let v5 = C::emit(ctx, &v4);
3424
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3425
0
    // Rule at src/isa/x64/inst.isle line 1980.
3426
0
    return v6;
3427
0
}
3428
3429
// Generated as internal constructor for term xmm_to_gpr_imm_vex.
3430
0
pub fn constructor_xmm_to_gpr_imm_vex<C: Context>(
3431
0
    ctx: &mut C,
3432
0
    arg0: &AvxOpcode,
3433
0
    arg1: Xmm,
3434
0
    arg2: u8,
3435
0
) -> Gpr {
3436
0
    let v3 = C::temp_writable_gpr(ctx);
3437
0
    let v4 = MInst::XmmToGprImmVex {
3438
0
        op: arg0.clone(),
3439
0
        src: arg1,
3440
0
        dst: v3,
3441
0
        imm: arg2,
3442
0
    };
3443
0
    let v5 = C::emit(ctx, &v4);
3444
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3445
0
    // Rule at src/isa/x64/inst.isle line 1987.
3446
0
    return v6;
3447
0
}
3448
3449
// Generated as internal constructor for term gpr_to_xmm.
3450
0
pub fn constructor_gpr_to_xmm<C: Context>(
3451
0
    ctx: &mut C,
3452
0
    arg0: &SseOpcode,
3453
0
    arg1: &GprMem,
3454
0
    arg2: &OperandSize,
3455
0
) -> Xmm {
3456
0
    let v3 = C::temp_writable_xmm(ctx);
3457
0
    let v4 = MInst::GprToXmm {
3458
0
        op: arg0.clone(),
3459
0
        src: arg1.clone(),
3460
0
        dst: v3,
3461
0
        src_size: arg2.clone(),
3462
0
    };
3463
0
    let v5 = C::emit(ctx, &v4);
3464
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3465
0
    // Rule at src/isa/x64/inst.isle line 1994.
3466
0
    return v6;
3467
0
}
3468
3469
// Generated as internal constructor for term gpr_to_xmm_vex.
3470
0
pub fn constructor_gpr_to_xmm_vex<C: Context>(
3471
0
    ctx: &mut C,
3472
0
    arg0: &AvxOpcode,
3473
0
    arg1: &GprMem,
3474
0
    arg2: &OperandSize,
3475
0
) -> Xmm {
3476
0
    let v3 = C::temp_writable_xmm(ctx);
3477
0
    let v4 = MInst::GprToXmmVex {
3478
0
        op: arg0.clone(),
3479
0
        src: arg1.clone(),
3480
0
        dst: v3,
3481
0
        src_size: arg2.clone(),
3482
0
    };
3483
0
    let v5 = C::emit(ctx, &v4);
3484
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3485
0
    // Rule at src/isa/x64/inst.isle line 2001.
3486
0
    return v6;
3487
0
}
3488
3489
// Generated as internal constructor for term xmm_to_gpr.
3490
0
pub fn constructor_xmm_to_gpr<C: Context>(
3491
0
    ctx: &mut C,
3492
0
    arg0: &SseOpcode,
3493
0
    arg1: Xmm,
3494
0
    arg2: &OperandSize,
3495
0
) -> Gpr {
3496
0
    let v3 = C::temp_writable_gpr(ctx);
3497
0
    let v4 = MInst::XmmToGpr {
3498
0
        op: arg0.clone(),
3499
0
        src: arg1,
3500
0
        dst: v3,
3501
0
        dst_size: arg2.clone(),
3502
0
    };
3503
0
    let v5 = C::emit(ctx, &v4);
3504
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3505
0
    // Rule at src/isa/x64/inst.isle line 2008.
3506
0
    return v6;
3507
0
}
3508
3509
// Generated as internal constructor for term xmm_to_gpr_vex.
3510
0
pub fn constructor_xmm_to_gpr_vex<C: Context>(
3511
0
    ctx: &mut C,
3512
0
    arg0: &AvxOpcode,
3513
0
    arg1: Xmm,
3514
0
    arg2: &OperandSize,
3515
0
) -> Gpr {
3516
0
    let v3 = C::temp_writable_gpr(ctx);
3517
0
    let v4 = MInst::XmmToGprVex {
3518
0
        op: arg0.clone(),
3519
0
        src: arg1,
3520
0
        dst: v3,
3521
0
        dst_size: arg2.clone(),
3522
0
    };
3523
0
    let v5 = C::emit(ctx, &v4);
3524
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3525
0
    // Rule at src/isa/x64/inst.isle line 2015.
3526
0
    return v6;
3527
0
}
3528
3529
// Generated as internal constructor for term xmm_min_max_seq.
3530
0
pub fn constructor_xmm_min_max_seq<C: Context>(
3531
0
    ctx: &mut C,
3532
0
    arg0: Type,
3533
0
    arg1: bool,
3534
0
    arg2: Xmm,
3535
0
    arg3: Xmm,
3536
0
) -> Xmm {
3537
0
    let v4 = C::temp_writable_xmm(ctx);
3538
0
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3539
0
    let v6 = MInst::XmmMinMaxSeq {
3540
0
        size: v5.clone(),
3541
0
        is_min: arg1,
3542
0
        lhs: arg2,
3543
0
        rhs: arg3,
3544
0
        dst: v4,
3545
0
    };
3546
0
    let v7 = C::emit(ctx, &v6);
3547
0
    let v8 = C::writable_xmm_to_xmm(ctx, v4);
3548
0
    // Rule at src/isa/x64/inst.isle line 2022.
3549
0
    return v8;
3550
0
}
3551
3552
// Generated as internal constructor for term xmm_rmir_vex.
3553
0
pub fn constructor_xmm_rmir_vex<C: Context>(
3554
0
    ctx: &mut C,
3555
0
    arg0: &AvxOpcode,
3556
0
    arg1: Xmm,
3557
0
    arg2: &XmmMemImm,
3558
0
) -> Xmm {
3559
0
    let v3 = C::temp_writable_xmm(ctx);
3560
0
    let v4 = MInst::XmmRmiRVex {
3561
0
        op: arg0.clone(),
3562
0
        src1: arg1,
3563
0
        src2: arg2.clone(),
3564
0
        dst: v3,
3565
0
    };
3566
0
    let v5 = C::emit(ctx, &v4);
3567
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3568
0
    // Rule at src/isa/x64/inst.isle line 2030.
3569
0
    return v6;
3570
0
}
3571
3572
// Generated as internal constructor for term xmm_rmr_imm_vex.
3573
0
pub fn constructor_xmm_rmr_imm_vex<C: Context>(
3574
0
    ctx: &mut C,
3575
0
    arg0: &AvxOpcode,
3576
0
    arg1: Xmm,
3577
0
    arg2: &XmmMem,
3578
0
    arg3: u8,
3579
0
) -> Xmm {
3580
0
    let v4 = C::temp_writable_xmm(ctx);
3581
0
    let v5 = MInst::XmmRmRImmVex {
3582
0
        op: arg0.clone(),
3583
0
        src1: arg1,
3584
0
        src2: arg2.clone(),
3585
0
        dst: v4,
3586
0
        imm: arg3,
3587
0
    };
3588
0
    let v6 = C::emit(ctx, &v5);
3589
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3590
0
    // Rule at src/isa/x64/inst.isle line 2037.
3591
0
    return v7;
3592
0
}
3593
3594
// Generated as internal constructor for term xmm_rmr_vex3.
3595
0
pub fn constructor_xmm_rmr_vex3<C: Context>(
3596
0
    ctx: &mut C,
3597
0
    arg0: &AvxOpcode,
3598
0
    arg1: Xmm,
3599
0
    arg2: Xmm,
3600
0
    arg3: &XmmMem,
3601
0
) -> Xmm {
3602
0
    let v4 = C::temp_writable_xmm(ctx);
3603
0
    let v5 = MInst::XmmRmRVex3 {
3604
0
        op: arg0.clone(),
3605
0
        src1: arg1,
3606
0
        src2: arg2,
3607
0
        src3: arg3.clone(),
3608
0
        dst: v4,
3609
0
    };
3610
0
    let v6 = C::emit(ctx, &v5);
3611
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3612
0
    // Rule at src/isa/x64/inst.isle line 2044.
3613
0
    return v7;
3614
0
}
3615
3616
// Generated as internal constructor for term mul_hi.
3617
0
pub fn constructor_mul_hi<C: Context>(
3618
0
    ctx: &mut C,
3619
0
    arg0: Type,
3620
0
    arg1: bool,
3621
0
    arg2: Gpr,
3622
0
    arg3: &GprMem,
3623
0
) -> ValueRegs {
3624
0
    let v4 = C::temp_writable_gpr(ctx);
3625
0
    let v5 = C::temp_writable_gpr(ctx);
3626
0
    let v6 = &C::raw_operand_size_of_type(ctx, arg0);
3627
0
    let v7 = MInst::MulHi {
3628
0
        size: v6.clone(),
3629
0
        signed: arg1,
3630
0
        src1: arg2,
3631
0
        src2: arg3.clone(),
3632
0
        dst_lo: v4,
3633
0
        dst_hi: v5,
3634
0
    };
3635
0
    let v8 = C::emit(ctx, &v7);
3636
0
    let v9 = C::writable_gpr_to_gpr(ctx, v4);
3637
0
    let v10 = C::writable_gpr_to_gpr(ctx, v5);
3638
0
    let v11 = constructor_value_gprs(ctx, v9, v10);
3639
0
    // Rule at src/isa/x64/inst.isle line 2053.
3640
0
    return v11;
3641
0
}
3642
3643
// Generated as internal constructor for term unary_rm_r.
3644
627
pub fn constructor_unary_rm_r<C: Context>(
3645
627
    ctx: &mut C,
3646
627
    arg0: &UnaryRmROpcode,
3647
627
    arg1: Gpr,
3648
627
    arg2: &OperandSize,
3649
627
) -> Gpr {
3650
627
    let v3 = C::temp_writable_gpr(ctx);
3651
627
    let v4 = &C::gpr_to_gpr_mem(ctx, arg1);
3652
627
    let v5 = MInst::UnaryRmR {
3653
627
        size: arg2.clone(),
3654
627
        op: arg0.clone(),
3655
627
        src: v4.clone(),
3656
627
        dst: v3,
3657
627
    };
3658
627
    let v6 = C::emit(ctx, &v5);
3659
627
    let v7 = C::writable_gpr_to_gpr(ctx, v3);
3660
627
    // Rule at src/isa/x64/inst.isle line 2067.
3661
627
    return v7;
3662
627
}
3663
3664
// Generated as internal constructor for term unary_rm_r_vex.
3665
58
pub fn constructor_unary_rm_r_vex<C: Context>(
3666
58
    ctx: &mut C,
3667
58
    arg0: &UnaryRmRVexOpcode,
3668
58
    arg1: &GprMem,
3669
58
    arg2: &OperandSize,
3670
58
) -> Gpr {
3671
58
    let v3 = C::temp_writable_gpr(ctx);
3672
58
    let v4 = MInst::UnaryRmRVex {
3673
58
        size: arg2.clone(),
3674
58
        op: arg0.clone(),
3675
58
        src: arg1.clone(),
3676
58
        dst: v3,
3677
58
    };
3678
58
    let v5 = C::emit(ctx, &v4);
3679
58
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3680
58
    // Rule at src/isa/x64/inst.isle line 2074.
3681
58
    return v6;
3682
58
}
3683
3684
// Generated as internal constructor for term unary_rm_r_imm_vex.
3685
957
pub fn constructor_unary_rm_r_imm_vex<C: Context>(
3686
957
    ctx: &mut C,
3687
957
    arg0: &UnaryRmRImmVexOpcode,
3688
957
    arg1: &GprMem,
3689
957
    arg2: &OperandSize,
3690
957
    arg3: u8,
3691
957
) -> Gpr {
3692
957
    let v4 = C::temp_writable_gpr(ctx);
3693
957
    let v5 = MInst::UnaryRmRImmVex {
3694
957
        size: arg2.clone(),
3695
957
        op: arg0.clone(),
3696
957
        src: arg1.clone(),
3697
957
        dst: v4,
3698
957
        imm: arg3,
3699
957
    };
3700
957
    let v6 = C::emit(ctx, &v5);
3701
957
    let v7 = C::writable_gpr_to_gpr(ctx, v4);
3702
957
    // Rule at src/isa/x64/inst.isle line 2081.
3703
957
    return v7;
3704
957
}
3705
3706
// Generated as internal constructor for term cvt_int_to_float.
3707
0
pub fn constructor_cvt_int_to_float<C: Context>(
3708
0
    ctx: &mut C,
3709
0
    arg0: &SseOpcode,
3710
0
    arg1: Xmm,
3711
0
    arg2: &GprMem,
3712
0
    arg3: &OperandSize,
3713
0
) -> Xmm {
3714
0
    let v4 = C::temp_writable_xmm(ctx);
3715
0
    let v5 = MInst::CvtIntToFloat {
3716
0
        op: arg0.clone(),
3717
0
        src1: arg1,
3718
0
        src2: arg2.clone(),
3719
0
        dst: v4,
3720
0
        src2_size: arg3.clone(),
3721
0
    };
3722
0
    let v6 = C::emit(ctx, &v5);
3723
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3724
0
    // Rule at src/isa/x64/inst.isle line 2087.
3725
0
    return v7;
3726
0
}
3727
3728
// Generated as internal constructor for term cvt_int_to_float_vex.
3729
0
pub fn constructor_cvt_int_to_float_vex<C: Context>(
3730
0
    ctx: &mut C,
3731
0
    arg0: &AvxOpcode,
3732
0
    arg1: Xmm,
3733
0
    arg2: &GprMem,
3734
0
    arg3: &OperandSize,
3735
0
) -> Xmm {
3736
0
    let v4 = C::temp_writable_xmm(ctx);
3737
0
    let v5 = MInst::CvtIntToFloatVex {
3738
0
        op: arg0.clone(),
3739
0
        src1: arg1,
3740
0
        src2: arg2.clone(),
3741
0
        dst: v4,
3742
0
        src2_size: arg3.clone(),
3743
0
    };
3744
0
    let v6 = C::emit(ctx, &v5);
3745
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3746
0
    // Rule at src/isa/x64/inst.isle line 2093.
3747
0
    return v7;
3748
0
}
3749
3750
// Generated as internal constructor for term cvt_u64_to_float_seq.
3751
0
pub fn constructor_cvt_u64_to_float_seq<C: Context>(
3752
0
    ctx: &mut C,
3753
0
    arg0: Type,
3754
0
    arg1: Gpr,
3755
0
) -> Xmm {
3756
0
    let v2 = &C::raw_operand_size_of_type(ctx, arg0);
3757
0
    let v3 = C::temp_writable_xmm(ctx);
3758
0
    let v4 = C::temp_writable_gpr(ctx);
3759
0
    let v5 = C::temp_writable_gpr(ctx);
3760
0
    let v6 = MInst::CvtUint64ToFloatSeq {
3761
0
        dst_size: v2.clone(),
3762
0
        src: arg1,
3763
0
        dst: v3,
3764
0
        tmp_gpr1: v4,
3765
0
        tmp_gpr2: v5,
3766
0
    };
3767
0
    let v7 = C::emit(ctx, &v6);
3768
0
    let v8 = C::writable_xmm_to_xmm(ctx, v3);
3769
0
    // Rule at src/isa/x64/inst.isle line 2099.
3770
0
    return v8;
3771
0
}
3772
3773
// Generated as internal constructor for term cvt_float_to_uint_seq.
3774
0
pub fn constructor_cvt_float_to_uint_seq<C: Context>(
3775
0
    ctx: &mut C,
3776
0
    arg0: Type,
3777
0
    arg1: Value,
3778
0
    arg2: bool,
3779
0
) -> Gpr {
3780
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
3781
0
    let v2 = C::value_type(ctx, arg1);
3782
0
    let v5 = &C::raw_operand_size_of_type(ctx, v2);
3783
0
    let v6 = C::temp_writable_gpr(ctx);
3784
0
    let v7 = C::temp_writable_xmm(ctx);
3785
0
    let v8 = C::temp_writable_xmm(ctx);
3786
0
    let v9 = C::temp_writable_gpr(ctx);
3787
0
    let v10 = constructor_put_in_xmm(ctx, arg1);
3788
0
    let v11 = MInst::CvtFloatToUintSeq {
3789
0
        dst_size: v4.clone(),
3790
0
        src_size: v5.clone(),
3791
0
        is_saturating: arg2,
3792
0
        src: v10,
3793
0
        dst: v6,
3794
0
        tmp_gpr: v9,
3795
0
        tmp_xmm: v7,
3796
0
        tmp_xmm2: v8,
3797
0
    };
3798
0
    let v12 = C::emit(ctx, &v11);
3799
0
    let v13 = C::writable_gpr_to_gpr(ctx, v6);
3800
0
    // Rule at src/isa/x64/inst.isle line 2108.
3801
0
    return v13;
3802
0
}
3803
3804
// Generated as internal constructor for term cvt_float_to_sint_seq.
3805
0
pub fn constructor_cvt_float_to_sint_seq<C: Context>(
3806
0
    ctx: &mut C,
3807
0
    arg0: Type,
3808
0
    arg1: Value,
3809
0
    arg2: bool,
3810
0
) -> Gpr {
3811
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
3812
0
    let v2 = C::value_type(ctx, arg1);
3813
0
    let v5 = &C::raw_operand_size_of_type(ctx, v2);
3814
0
    let v6 = C::temp_writable_gpr(ctx);
3815
0
    let v7 = C::temp_writable_xmm(ctx);
3816
0
    let v8 = C::temp_writable_gpr(ctx);
3817
0
    let v9 = constructor_put_in_xmm(ctx, arg1);
3818
0
    let v10 = MInst::CvtFloatToSintSeq {
3819
0
        dst_size: v4.clone(),
3820
0
        src_size: v5.clone(),
3821
0
        is_saturating: arg2,
3822
0
        src: v9,
3823
0
        dst: v6,
3824
0
        tmp_gpr: v8,
3825
0
        tmp_xmm: v7,
3826
0
    };
3827
0
    let v11 = C::emit(ctx, &v10);
3828
0
    let v12 = C::writable_gpr_to_gpr(ctx, v6);
3829
0
    // Rule at src/isa/x64/inst.isle line 2120.
3830
0
    return v12;
3831
0
}
3832
3833
// Generated as internal constructor for term mov_from_preg.
3834
21.2k
pub fn constructor_mov_from_preg<C: Context>(
3835
21.2k
    ctx: &mut C,
3836
21.2k
    arg0: PReg,
3837
21.2k
) -> Reg {
3838
21.2k
    let v1 = C::temp_writable_gpr(ctx);
3839
21.2k
    let v2 = MInst::MovFromPReg {
3840
21.2k
        src: arg0,
3841
21.2k
        dst: v1,
3842
21.2k
    };
3843
21.2k
    let v3 = C::emit(ctx, &v2);
3844
21.2k
    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
3845
21.2k
    // Rule at src/isa/x64/inst.isle line 2132.
3846
21.2k
    return v4;
3847
21.2k
}
3848
3849
// Generated as internal constructor for term extend_to_gpr.
3850
828k
pub fn constructor_extend_to_gpr<C: Context>(
3851
828k
    ctx: &mut C,
3852
828k
    arg0: Value,
3853
828k
    arg1: Type,
3854
828k
    arg2: &ExtendKind,
3855
828k
) -> Gpr {
3856
828k
    let v1 = C::value_type(ctx, arg0);
3857
828k
    if v1 == arg1 {
3858
15.6k
        let v4 = constructor_put_in_gpr(ctx, arg0);
3859
15.6k
        // Rule at src/isa/x64/inst.isle line 2156.
3860
15.6k
        return v4;
3861
812k
    }
3862
812k
    if v1 == I32 {
3863
794k
        if arg1 == I64 {
3864
794k
            if let &ExtendKind::Zero = arg2 {
3865
794k
                let v5 = constructor_value32_zeros_upper32(ctx, arg0);
3866
794k
                if v5 == true {
3867
624k
                    let v4 = constructor_put_in_gpr(ctx, arg0);
3868
624k
                    // Rule at src/isa/x64/inst.isle line 2164.
3869
624k
                    return v4;
3870
169k
                }
3871
6
            }
3872
0
        }
3873
18.7k
    }
3874
188k
    let v7 = &C::operand_size_of_type_32_64(ctx, arg1);
3875
188k
    let v8 = constructor_operand_size_bits(ctx, v7);
3876
188k
    let v6 = C::ty_bits_u16(ctx, v1);
3877
188k
    let v9 = &C::ext_mode(ctx, v6, v8);
3878
188k
    let v10 = &constructor_put_in_gpr_mem(ctx, arg0);
3879
188k
    let v11 = constructor_extend(ctx, arg2, arg1, v9, v10);
3880
188k
    // Rule at src/isa/x64/inst.isle line 2168.
3881
188k
    return v11;
3882
828k
}
3883
3884
// Generated as internal constructor for term extend.
3885
188k
pub fn constructor_extend<C: Context>(
3886
188k
    ctx: &mut C,
3887
188k
    arg0: &ExtendKind,
3888
188k
    arg1: Type,
3889
188k
    arg2: &ExtMode,
3890
188k
    arg3: &GprMem,
3891
188k
) -> Gpr {
3892
188k
    match arg0 {
3893
        &ExtendKind::Sign => {
3894
144
            let v5 = constructor_x64_movsx(ctx, arg2, arg3);
3895
144
            // Rule at src/isa/x64/inst.isle line 2188.
3896
144
            return v5;
3897
        }
3898
        &ExtendKind::Zero => {
3899
188k
            let v4 = constructor_x64_movzx(ctx, arg2, arg3);
3900
188k
            // Rule at src/isa/x64/inst.isle line 2184.
3901
188k
            return v4;
3902
        }
3903
0
        _ => {}
3904
0
    }
3905
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "extend", "src/isa/x64/inst.isle line 2181")
3906
188k
}
3907
3908
// Generated as internal constructor for term value32_zeros_upper32.
3909
794k
pub fn constructor_value32_zeros_upper32<C: Context>(
3910
794k
    ctx: &mut C,
3911
794k
    arg0: Value,
3912
794k
) -> bool {
3913
794k
    let v1 = C::def_inst(ctx, arg0);
3914
794k
    if let Some(
v2720k
) = v1 {
3915
720k
        let v3 = &C::inst_data(ctx, v2);
3916
720k
        match v3 {
3917
            &InstructionData::Binary {
3918
626k
                opcode: ref v4,
3919
626k
                args: ref v5,
3920
626k
            } => {
3921
626k
                match v4 {
3922
                    &Opcode::Iadd => {
3923
                        // Rule at src/isa/x64/inst.isle line 2195.
3924
597k
                        return true;
3925
                    }
3926
                    &Opcode::Isub => {
3927
                        // Rule at src/isa/x64/inst.isle line 2196.
3928
25.0k
                        return true;
3929
                    }
3930
                    &Opcode::Imul => {
3931
                        // Rule at src/isa/x64/inst.isle line 2197.
3932
3
                        return true;
3933
                    }
3934
                    &Opcode::Band => {
3935
                        // Rule at src/isa/x64/inst.isle line 2198.
3936
1.38k
                        return true;
3937
                    }
3938
                    &Opcode::Bor => {
3939
                        // Rule at src/isa/x64/inst.isle line 2199.
3940
749
                        return true;
3941
                    }
3942
                    &Opcode::Bxor => {
3943
                        // Rule at src/isa/x64/inst.isle line 2200.
3944
129
                        return true;
3945
                    }
3946
                    &Opcode::Ishl => {
3947
                        // Rule at src/isa/x64/inst.isle line 2201.
3948
15
                        return true;
3949
                    }
3950
                    &Opcode::Ushr => {
3951
                        // Rule at src/isa/x64/inst.isle line 2202.
3952
319
                        return true;
3953
                    }
3954
1.41k
                    _ => {}
3955
                }
3956
            }
3957
            &InstructionData::Load {
3958
73.1k
                opcode: ref v10,
3959
73.1k
                arg: v11,
3960
73.1k
                flags: v12,
3961
73.1k
                offset: v13,
3962
73.1k
            } => {
3963
73.1k
                if let &Opcode::Uload32 = v10 {
3964
                    // Rule at src/isa/x64/inst.isle line 2203.
3965
0
                    return true;
3966
73.1k
                }
3967
            }
3968
21.6k
            _ => {}
3969
        }
3970
73.1k
    }
3971
    // Rule at src/isa/x64/inst.isle line 2204.
3972
169k
    return false;
3973
794k
}
3974
3975
// Generated as internal constructor for term vec_int_type.
3976
0
pub fn constructor_vec_int_type<C: Context>(
3977
0
    ctx: &mut C,
3978
0
    arg0: Type,
3979
0
) -> Type {
3980
0
    let v1 = C::multi_lane(ctx, arg0);
3981
0
    if let Some(v2) = v1 {
3982
0
        match v2.0 {
3983
            0x8 => {
3984
0
                if v2.1 == 0x10 {
3985
                    // Rule at src/isa/x64/inst.isle line 2210.
3986
0
                    return I8X16;
3987
0
                }
3988
            }
3989
            0x10 => {
3990
0
                if v2.1 == 0x8 {
3991
                    // Rule at src/isa/x64/inst.isle line 2211.
3992
0
                    return I16X8;
3993
0
                }
3994
            }
3995
            0x20 => {
3996
0
                if v2.1 == 0x4 {
3997
                    // Rule at src/isa/x64/inst.isle line 2212.
3998
0
                    return I32X4;
3999
0
                }
4000
            }
4001
            0x40 => {
4002
0
                if v2.1 == 0x2 {
4003
                    // Rule at src/isa/x64/inst.isle line 2213.
4004
0
                    return I64X2;
4005
0
                }
4006
            }
4007
0
            _ => {}
4008
        }
4009
0
    }
4010
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "vec_int_type", "src/isa/x64/inst.isle line 2209")
4011
0
}
4012
4013
// Generated as internal constructor for term x64_xor_vector.
4014
0
pub fn constructor_x64_xor_vector<C: Context>(
4015
0
    ctx: &mut C,
4016
0
    arg0: Type,
4017
0
    arg1: Xmm,
4018
0
    arg2: &XmmMem,
4019
0
) -> Xmm {
4020
0
    match arg0 {
4021
        F32 => {
4022
0
            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
4023
0
            // Rule at src/isa/x64/inst.isle line 2217.
4024
0
            return v3;
4025
        }
4026
        F64 => {
4027
0
            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
4028
0
            // Rule at src/isa/x64/inst.isle line 2218.
4029
0
            return v4;
4030
        }
4031
        F32X4 => {
4032
0
            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
4033
0
            // Rule at src/isa/x64/inst.isle line 2219.
4034
0
            return v3;
4035
        }
4036
        F64X2 => {
4037
0
            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
4038
0
            // Rule at src/isa/x64/inst.isle line 2220.
4039
0
            return v4;
4040
        }
4041
0
        _ => {}
4042
0
    }
4043
0
    let v5 = C::multi_lane(ctx, arg0);
4044
0
    if let Some(v6) = v5 {
4045
0
        let v9 = constructor_x64_pxor(ctx, arg1, arg2);
4046
0
        // Rule at src/isa/x64/inst.isle line 2221.
4047
0
        return v9;
4048
0
    }
4049
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_xor_vector", "src/isa/x64/inst.isle line 2216")
4050
0
}
4051
4052
// Generated as internal constructor for term vector_all_ones.
4053
0
pub fn constructor_vector_all_ones<C: Context>(
4054
0
    ctx: &mut C,
4055
0
) -> Xmm {
4056
0
    let v0 = constructor_xmm_uninit_value(ctx);
4057
0
    let v1 = &C::xmm_to_xmm_mem(ctx, v0);
4058
0
    let v2 = constructor_x64_pcmpeqd(ctx, v0, v1);
4059
0
    // Rule at src/isa/x64/inst.isle line 2233.
4060
0
    return v2;
4061
0
}
4062
4063
// Generated as internal constructor for term mov_rmi_to_xmm.
4064
0
pub fn constructor_mov_rmi_to_xmm<C: Context>(
4065
0
    ctx: &mut C,
4066
0
    arg0: &RegMemImm,
4067
0
) -> XmmMemImm {
4068
0
    match arg0 {
4069
        &RegMemImm::Reg {
4070
0
            reg: v4,
4071
0
        } => {
4072
0
            let v5 = &C::reg_to_gpr_mem(ctx, v4);
4073
0
            let v6 = constructor_x64_movd_to_xmm(ctx, v5);
4074
0
            let v7 = &C::xmm_to_xmm_mem_imm(ctx, v6);
4075
0
            // Rule at src/isa/x64/inst.isle line 2241.
4076
0
            return v7.clone();
4077
        }
4078
        &RegMemImm::Mem {
4079
0
            addr: ref v1,
4080
0
        } => {
4081
0
            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
4082
0
            // Rule at src/isa/x64/inst.isle line 2239.
4083
0
            return v2.clone();
4084
        }
4085
        &RegMemImm::Imm {
4086
0
            simm32: v3,
4087
0
        } => {
4088
0
            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
4089
0
            // Rule at src/isa/x64/inst.isle line 2240.
4090
0
            return v2.clone();
4091
        }
4092
0
        _ => {}
4093
0
    }
4094
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "mov_rmi_to_xmm", "src/isa/x64/inst.isle line 2238")
4095
0
}
4096
4097
// Generated as internal constructor for term x64_load.
4098
2.46k
pub fn constructor_x64_load<C: Context>(
4099
2.46k
    ctx: &mut C,
4100
2.46k
    arg0: Type,
4101
2.46k
    arg1: &SyntheticAmode,
4102
2.46k
    arg2: &ExtKind,
4103
2.46k
) -> Reg {
4104
2.46k
    match arg0 {
4105
        I64 => {
4106
2.46k
            let v11 = constructor_mov64_mr(ctx, arg1);
4107
2.46k
            // Rule at src/isa/x64/inst.isle line 2260.
4108
2.46k
            return v11;
4109
        }
4110
        F32 => {
4111
0
            let v12 = constructor_x64_movss_load(ctx, arg1);
4112
0
            let v13 = C::xmm_to_reg(ctx, v12);
4113
0
            // Rule at src/isa/x64/inst.isle line 2263.
4114
0
            return v13;
4115
        }
4116
        F64 => {
4117
0
            let v14 = constructor_x64_movsd_load(ctx, arg1);
4118
0
            let v15 = C::xmm_to_reg(ctx, v14);
4119
0
            // Rule at src/isa/x64/inst.isle line 2266.
4120
0
            return v15;
4121
        }
4122
        F32X4 => {
4123
0
            let v16 = constructor_x64_movups_load(ctx, arg1);
4124
0
            let v17 = C::xmm_to_reg(ctx, v16);
4125
0
            // Rule at src/isa/x64/inst.isle line 2269.
4126
0
            return v17;
4127
        }
4128
        F64X2 => {
4129
0
            let v18 = constructor_x64_movupd_load(ctx, arg1);
4130
0
            let v19 = C::xmm_to_reg(ctx, v18);
4131
0
            // Rule at src/isa/x64/inst.isle line 2272.
4132
0
            return v19;
4133
        }
4134
0
        _ => {}
4135
0
    }
4136
0
    let v1 = C::fits_in_32(ctx, arg0);
4137
0
    if let Some(v2) = v1 {
4138
0
        if let &ExtKind::SignExtend = arg2 {
4139
0
            let v5 = C::ty_bytes(ctx, v2);
4140
0
            let v7 = &C::ext_mode(ctx, v5, 0x8);
4141
0
            let v8 = &constructor_synthetic_amode_to_gpr_mem(ctx, arg1);
4142
0
            let v9 = constructor_x64_movsx(ctx, v7, v8);
4143
0
            let v10 = C::gpr_to_reg(ctx, v9);
4144
0
            // Rule at src/isa/x64/inst.isle line 2256.
4145
0
            return v10;
4146
0
        }
4147
0
    }
4148
0
    let v20 = C::multi_lane(ctx, arg0);
4149
0
    if let Some(v21) = v20 {
4150
0
        let v24 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg1);
4151
0
        let v25 = constructor_x64_movdqu_load(ctx, v24);
4152
0
        let v26 = C::xmm_to_reg(ctx, v25);
4153
0
        // Rule at src/isa/x64/inst.isle line 2275.
4154
0
        return v26;
4155
0
    }
4156
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_load", "src/isa/x64/inst.isle line 2254")
4157
2.46k
}
4158
4159
// Generated as internal constructor for term x64_mov.
4160
528k
pub fn constructor_x64_mov<C: Context>(
4161
528k
    ctx: &mut C,
4162
528k
    arg0: &Amode,
4163
528k
) -> Reg {
4164
528k
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
4165
528k
    let v2 = constructor_mov64_mr(ctx, v1);
4166
528k
    // Rule at src/isa/x64/inst.isle line 2279.
4167
528k
    return v2;
4168
528k
}
4169
4170
// Generated as internal constructor for term x64_movzx.
4171
866k
pub fn constructor_x64_movzx<C: Context>(
4172
866k
    ctx: &mut C,
4173
866k
    arg0: &ExtMode,
4174
866k
    arg1: &GprMem,
4175
866k
) -> Gpr {
4176
866k
    let v2 = C::temp_writable_gpr(ctx);
4177
866k
    let v3 = MInst::MovzxRmR {
4178
866k
        ext_mode: arg0.clone(),
4179
866k
        src: arg1.clone(),
4180
866k
        dst: v2,
4181
866k
    };
4182
866k
    let v4 = C::emit(ctx, &v3);
4183
866k
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
4184
866k
    // Rule at src/isa/x64/inst.isle line 2283.
4185
866k
    return v5;
4186
866k
}
4187
4188
// Generated as internal constructor for term x64_movsx.
4189
895
pub fn constructor_x64_movsx<C: Context>(
4190
895
    ctx: &mut C,
4191
895
    arg0: &ExtMode,
4192
895
    arg1: &GprMem,
4193
895
) -> Gpr {
4194
895
    let v2 = C::temp_writable_gpr(ctx);
4195
895
    let v3 = MInst::MovsxRmR {
4196
895
        ext_mode: arg0.clone(),
4197
895
        src: arg1.clone(),
4198
895
        dst: v2,
4199
895
    };
4200
895
    let v4 = C::emit(ctx, &v3);
4201
895
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
4202
895
    // Rule at src/isa/x64/inst.isle line 2289.
4203
895
    return v5;
4204
895
}
4205
4206
// Generated as internal constructor for term x64_movss_load.
4207
0
pub fn constructor_x64_movss_load<C: Context>(
4208
0
    ctx: &mut C,
4209
0
    arg0: &SyntheticAmode,
4210
0
) -> Xmm {
4211
0
    let v4 = C::use_avx(ctx);
4212
0
    if v4 == true {
4213
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4214
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovss, v2);
4215
0
        // Rule at src/isa/x64/inst.isle line 2297.
4216
0
        return v6;
4217
0
    }
4218
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4219
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movss, v2);
4220
0
    // Rule at src/isa/x64/inst.isle line 2295.
4221
0
    return v3;
4222
0
}
4223
4224
// Generated as internal constructor for term x64_movss_store.
4225
0
pub fn constructor_x64_movss_store<C: Context>(
4226
0
    ctx: &mut C,
4227
0
    arg0: &SyntheticAmode,
4228
0
    arg1: Xmm,
4229
0
) -> SideEffectNoResult {
4230
0
    let v4 = C::use_avx(ctx);
4231
0
    if v4 == true {
4232
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovss, arg0, arg1);
4233
0
        // Rule at src/isa/x64/inst.isle line 2304.
4234
0
        return v6.clone();
4235
0
    }
4236
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movss, arg0, arg1);
4237
0
    // Rule at src/isa/x64/inst.isle line 2302.
4238
0
    return v3.clone();
4239
0
}
4240
4241
// Generated as internal constructor for term x64_movsd_load.
4242
0
pub fn constructor_x64_movsd_load<C: Context>(
4243
0
    ctx: &mut C,
4244
0
    arg0: &SyntheticAmode,
4245
0
) -> Xmm {
4246
0
    let v4 = C::use_avx(ctx);
4247
0
    if v4 == true {
4248
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4249
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovsd, v2);
4250
0
        // Rule at src/isa/x64/inst.isle line 2311.
4251
0
        return v6;
4252
0
    }
4253
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4254
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movsd, v2);
4255
0
    // Rule at src/isa/x64/inst.isle line 2309.
4256
0
    return v3;
4257
0
}
4258
4259
// Generated as internal constructor for term x64_movsd_store.
4260
1
pub fn constructor_x64_movsd_store<C: Context>(
4261
1
    ctx: &mut C,
4262
1
    arg0: &SyntheticAmode,
4263
1
    arg1: Xmm,
4264
1
) -> SideEffectNoResult {
4265
1
    let v4 = C::use_avx(ctx);
4266
1
    if v4 == true {
4267
1
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovsd, arg0, arg1);
4268
1
        // Rule at src/isa/x64/inst.isle line 2318.
4269
1
        return v6.clone();
4270
0
    }
4271
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movsd, arg0, arg1);
4272
0
    // Rule at src/isa/x64/inst.isle line 2316.
4273
0
    return v3.clone();
4274
1
}
4275
4276
// Generated as internal constructor for term x64_movups_load.
4277
0
pub fn constructor_x64_movups_load<C: Context>(
4278
0
    ctx: &mut C,
4279
0
    arg0: &SyntheticAmode,
4280
0
) -> Xmm {
4281
0
    let v4 = C::use_avx(ctx);
4282
0
    if v4 == true {
4283
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4284
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovups, v2);
4285
0
        // Rule at src/isa/x64/inst.isle line 2325.
4286
0
        return v6;
4287
0
    }
4288
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4289
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movups, v2);
4290
0
    // Rule at src/isa/x64/inst.isle line 2323.
4291
0
    return v3;
4292
0
}
4293
4294
// Generated as internal constructor for term x64_movups_store.
4295
0
pub fn constructor_x64_movups_store<C: Context>(
4296
0
    ctx: &mut C,
4297
0
    arg0: &SyntheticAmode,
4298
0
    arg1: Xmm,
4299
0
) -> SideEffectNoResult {
4300
0
    let v4 = C::use_avx(ctx);
4301
0
    if v4 == true {
4302
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovups, arg0, arg1);
4303
0
        // Rule at src/isa/x64/inst.isle line 2332.
4304
0
        return v6.clone();
4305
0
    }
4306
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movups, arg0, arg1);
4307
0
    // Rule at src/isa/x64/inst.isle line 2330.
4308
0
    return v3.clone();
4309
0
}
4310
4311
// Generated as internal constructor for term x64_movupd_load.
4312
0
pub fn constructor_x64_movupd_load<C: Context>(
4313
0
    ctx: &mut C,
4314
0
    arg0: &SyntheticAmode,
4315
0
) -> Xmm {
4316
0
    let v4 = C::use_avx(ctx);
4317
0
    if v4 == true {
4318
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4319
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovupd, v2);
4320
0
        // Rule at src/isa/x64/inst.isle line 2339.
4321
0
        return v6;
4322
0
    }
4323
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4324
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movupd, v2);
4325
0
    // Rule at src/isa/x64/inst.isle line 2337.
4326
0
    return v3;
4327
0
}
4328
4329
// Generated as internal constructor for term x64_movupd_store.
4330
0
pub fn constructor_x64_movupd_store<C: Context>(
4331
0
    ctx: &mut C,
4332
0
    arg0: &SyntheticAmode,
4333
0
    arg1: Xmm,
4334
0
) -> SideEffectNoResult {
4335
0
    let v4 = C::use_avx(ctx);
4336
0
    if v4 == true {
4337
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovupd, arg0, arg1);
4338
0
        // Rule at src/isa/x64/inst.isle line 2346.
4339
0
        return v6.clone();
4340
0
    }
4341
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movupd, arg0, arg1);
4342
0
    // Rule at src/isa/x64/inst.isle line 2344.
4343
0
    return v3.clone();
4344
0
}
4345
4346
// Generated as internal constructor for term x64_movd_to_gpr.
4347
0
pub fn constructor_x64_movd_to_gpr<C: Context>(
4348
0
    ctx: &mut C,
4349
0
    arg0: Xmm,
4350
0
) -> Gpr {
4351
0
    let v4 = C::use_avx(ctx);
4352
0
    if v4 == true {
4353
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
4354
0
        // Rule at src/isa/x64/inst.isle line 2354.
4355
0
        return v6;
4356
0
    }
4357
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
4358
0
    // Rule at src/isa/x64/inst.isle line 2352.
4359
0
    return v3;
4360
0
}
4361
4362
// Generated as internal constructor for term x64_movd_to_xmm.
4363
0
pub fn constructor_x64_movd_to_xmm<C: Context>(
4364
0
    ctx: &mut C,
4365
0
    arg0: &GprMem,
4366
0
) -> Xmm {
4367
0
    let v4 = C::use_avx(ctx);
4368
0
    if v4 == true {
4369
0
        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
4370
0
        // Rule at src/isa/x64/inst.isle line 2362.
4371
0
        return v6;
4372
0
    }
4373
0
    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
4374
0
    // Rule at src/isa/x64/inst.isle line 2360.
4375
0
    return v3;
4376
0
}
4377
4378
// Generated as internal constructor for term x64_movq_to_xmm.
4379
0
pub fn constructor_x64_movq_to_xmm<C: Context>(
4380
0
    ctx: &mut C,
4381
0
    arg0: &GprMem,
4382
0
) -> Xmm {
4383
0
    let v4 = C::use_avx(ctx);
4384
0
    if v4 == true {
4385
0
        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
4386
0
        // Rule at src/isa/x64/inst.isle line 2370.
4387
0
        return v6;
4388
0
    }
4389
0
    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
4390
0
    // Rule at src/isa/x64/inst.isle line 2368.
4391
0
    return v3;
4392
0
}
4393
4394
// Generated as internal constructor for term x64_movq_to_gpr.
4395
0
pub fn constructor_x64_movq_to_gpr<C: Context>(
4396
0
    ctx: &mut C,
4397
0
    arg0: Xmm,
4398
0
) -> Gpr {
4399
0
    let v4 = C::use_avx(ctx);
4400
0
    if v4 == true {
4401
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
4402
0
        // Rule at src/isa/x64/inst.isle line 2378.
4403
0
        return v6;
4404
0
    }
4405
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
4406
0
    // Rule at src/isa/x64/inst.isle line 2376.
4407
0
    return v3;
4408
0
}
4409
4410
// Generated as internal constructor for term x64_movdqu_load.
4411
0
pub fn constructor_x64_movdqu_load<C: Context>(
4412
0
    ctx: &mut C,
4413
0
    arg0: &XmmMem,
4414
0
) -> Xmm {
4415
0
    let v3 = C::use_avx(ctx);
4416
0
    if v3 == true {
4417
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovdqu, arg0);
4418
0
        // Rule at src/isa/x64/inst.isle line 2385.
4419
0
        return v5;
4420
0
    }
4421
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movdqu, arg0);
4422
0
    // Rule at src/isa/x64/inst.isle line 2383.
4423
0
    return v2;
4424
0
}
4425
4426
// Generated as internal constructor for term x64_movdqu_store.
4427
0
pub fn constructor_x64_movdqu_store<C: Context>(
4428
0
    ctx: &mut C,
4429
0
    arg0: &SyntheticAmode,
4430
0
    arg1: Xmm,
4431
0
) -> SideEffectNoResult {
4432
0
    let v4 = C::use_avx(ctx);
4433
0
    if v4 == true {
4434
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovdqu, arg0, arg1);
4435
0
        // Rule at src/isa/x64/inst.isle line 2392.
4436
0
        return v6.clone();
4437
0
    }
4438
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movdqu, arg0, arg1);
4439
0
    // Rule at src/isa/x64/inst.isle line 2390.
4440
0
    return v3.clone();
4441
0
}
4442
4443
// Generated as internal constructor for term x64_pmovsxbw.
4444
0
pub fn constructor_x64_pmovsxbw<C: Context>(
4445
0
    ctx: &mut C,
4446
0
    arg0: &XmmMem,
4447
0
) -> Xmm {
4448
0
    let v3 = C::use_avx(ctx);
4449
0
    if v3 == true {
4450
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxbw, arg0);
4451
0
        // Rule at src/isa/x64/inst.isle line 2399.
4452
0
        return v5;
4453
0
    }
4454
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxbw, arg0);
4455
0
    // Rule at src/isa/x64/inst.isle line 2397.
4456
0
    return v2;
4457
0
}
4458
4459
// Generated as internal constructor for term x64_pmovzxbw.
4460
0
pub fn constructor_x64_pmovzxbw<C: Context>(
4461
0
    ctx: &mut C,
4462
0
    arg0: &XmmMem,
4463
0
) -> Xmm {
4464
0
    let v3 = C::use_avx(ctx);
4465
0
    if v3 == true {
4466
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxbw, arg0);
4467
0
        // Rule at src/isa/x64/inst.isle line 2406.
4468
0
        return v5;
4469
0
    }
4470
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxbw, arg0);
4471
0
    // Rule at src/isa/x64/inst.isle line 2404.
4472
0
    return v2;
4473
0
}
4474
4475
// Generated as internal constructor for term x64_pmovsxwd.
4476
0
pub fn constructor_x64_pmovsxwd<C: Context>(
4477
0
    ctx: &mut C,
4478
0
    arg0: &XmmMem,
4479
0
) -> Xmm {
4480
0
    let v3 = C::use_avx(ctx);
4481
0
    if v3 == true {
4482
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxwd, arg0);
4483
0
        // Rule at src/isa/x64/inst.isle line 2413.
4484
0
        return v5;
4485
0
    }
4486
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxwd, arg0);
4487
0
    // Rule at src/isa/x64/inst.isle line 2411.
4488
0
    return v2;
4489
0
}
4490
4491
// Generated as internal constructor for term x64_pmovzxwd.
4492
0
pub fn constructor_x64_pmovzxwd<C: Context>(
4493
0
    ctx: &mut C,
4494
0
    arg0: &XmmMem,
4495
0
) -> Xmm {
4496
0
    let v3 = C::use_avx(ctx);
4497
0
    if v3 == true {
4498
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxwd, arg0);
4499
0
        // Rule at src/isa/x64/inst.isle line 2420.
4500
0
        return v5;
4501
0
    }
4502
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxwd, arg0);
4503
0
    // Rule at src/isa/x64/inst.isle line 2418.
4504
0
    return v2;
4505
0
}
4506
4507
// Generated as internal constructor for term x64_pmovsxdq.
4508
0
pub fn constructor_x64_pmovsxdq<C: Context>(
4509
0
    ctx: &mut C,
4510
0
    arg0: &XmmMem,
4511
0
) -> Xmm {
4512
0
    let v3 = C::use_avx(ctx);
4513
0
    if v3 == true {
4514
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxdq, arg0);
4515
0
        // Rule at src/isa/x64/inst.isle line 2427.
4516
0
        return v5;
4517
0
    }
4518
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxdq, arg0);
4519
0
    // Rule at src/isa/x64/inst.isle line 2425.
4520
0
    return v2;
4521
0
}
4522
4523
// Generated as internal constructor for term x64_pmovzxdq.
4524
0
pub fn constructor_x64_pmovzxdq<C: Context>(
4525
0
    ctx: &mut C,
4526
0
    arg0: &XmmMem,
4527
0
) -> Xmm {
4528
0
    let v3 = C::use_avx(ctx);
4529
0
    if v3 == true {
4530
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxdq, arg0);
4531
0
        // Rule at src/isa/x64/inst.isle line 2434.
4532
0
        return v5;
4533
0
    }
4534
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxdq, arg0);
4535
0
    // Rule at src/isa/x64/inst.isle line 2432.
4536
0
    return v2;
4537
0
}
4538
4539
// Generated as internal constructor for term x64_movrm.
4540
730k
pub fn constructor_x64_movrm<C: Context>(
4541
730k
    ctx: &mut C,
4542
730k
    arg0: Type,
4543
730k
    arg1: &SyntheticAmode,
4544
730k
    arg2: Gpr,
4545
730k
) -> SideEffectNoResult {
4546
730k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
4547
730k
    let v4 = MInst::MovRM {
4548
730k
        size: v3.clone(),
4549
730k
        src: arg2,
4550
730k
        dst: arg1.clone(),
4551
730k
    };
4552
730k
    let v5 = SideEffectNoResult::Inst {
4553
730k
        inst: v4,
4554
730k
    };
4555
730k
    // Rule at src/isa/x64/inst.isle line 2439.
4556
730k
    return v5;
4557
730k
}
4558
4559
// Generated as internal constructor for term x64_movimm_m.
4560
259k
pub fn constructor_x64_movimm_m<C: Context>(
4561
259k
    ctx: &mut C,
4562
259k
    arg0: Type,
4563
259k
    arg1: &SyntheticAmode,
4564
259k
    arg2: i32,
4565
259k
) -> SideEffectNoResult {
4566
259k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
4567
259k
    let v4 = MInst::MovImmM {
4568
259k
        size: v3.clone(),
4569
259k
        simm32: arg2,
4570
259k
        dst: arg1.clone(),
4571
259k
    };
4572
259k
    let v5 = SideEffectNoResult::Inst {
4573
259k
        inst: v4,
4574
259k
    };
4575
259k
    // Rule at src/isa/x64/inst.isle line 2444.
4576
259k
    return v5;
4577
259k
}
4578
4579
// Generated as internal constructor for term xmm_movrm.
4580
0
pub fn constructor_xmm_movrm<C: Context>(
4581
0
    ctx: &mut C,
4582
0
    arg0: &SseOpcode,
4583
0
    arg1: &SyntheticAmode,
4584
0
    arg2: Xmm,
4585
0
) -> SideEffectNoResult {
4586
0
    let v3 = MInst::XmmMovRM {
4587
0
        op: arg0.clone(),
4588
0
        src: arg2,
4589
0
        dst: arg1.clone(),
4590
0
    };
4591
0
    let v4 = SideEffectNoResult::Inst {
4592
0
        inst: v3,
4593
0
    };
4594
0
    // Rule at src/isa/x64/inst.isle line 2449.
4595
0
    return v4;
4596
0
}
4597
4598
// Generated as internal constructor for term xmm_movrm_imm.
4599
0
pub fn constructor_xmm_movrm_imm<C: Context>(
4600
0
    ctx: &mut C,
4601
0
    arg0: &SseOpcode,
4602
0
    arg1: &SyntheticAmode,
4603
0
    arg2: Xmm,
4604
0
    arg3: u8,
4605
0
) -> SideEffectNoResult {
4606
0
    let v4 = MInst::XmmMovRMImm {
4607
0
        op: arg0.clone(),
4608
0
        src: arg2,
4609
0
        dst: arg1.clone(),
4610
0
        imm: arg3,
4611
0
    };
4612
0
    let v5 = SideEffectNoResult::Inst {
4613
0
        inst: v4,
4614
0
    };
4615
0
    // Rule at src/isa/x64/inst.isle line 2453.
4616
0
    return v5;
4617
0
}
4618
4619
// Generated as internal constructor for term xmm_movrm_vex.
4620
1
pub fn constructor_xmm_movrm_vex<C: Context>(
4621
1
    ctx: &mut C,
4622
1
    arg0: &AvxOpcode,
4623
1
    arg1: &SyntheticAmode,
4624
1
    arg2: Xmm,
4625
1
) -> SideEffectNoResult {
4626
1
    let v3 = MInst::XmmMovRMVex {
4627
1
        op: arg0.clone(),
4628
1
        src: arg2,
4629
1
        dst: arg1.clone(),
4630
1
    };
4631
1
    let v4 = SideEffectNoResult::Inst {
4632
1
        inst: v3,
4633
1
    };
4634
1
    // Rule at src/isa/x64/inst.isle line 2457.
4635
1
    return v4;
4636
1
}
4637
4638
// Generated as internal constructor for term xmm_movrm_imm_vex.
4639
0
pub fn constructor_xmm_movrm_imm_vex<C: Context>(
4640
0
    ctx: &mut C,
4641
0
    arg0: &AvxOpcode,
4642
0
    arg1: &SyntheticAmode,
4643
0
    arg2: Xmm,
4644
0
    arg3: u8,
4645
0
) -> SideEffectNoResult {
4646
0
    let v4 = MInst::XmmMovRMImmVex {
4647
0
        op: arg0.clone(),
4648
0
        src: arg2,
4649
0
        dst: arg1.clone(),
4650
0
        imm: arg3,
4651
0
    };
4652
0
    let v5 = SideEffectNoResult::Inst {
4653
0
        inst: v4,
4654
0
    };
4655
0
    // Rule at src/isa/x64/inst.isle line 2461.
4656
0
    return v5;
4657
0
}
4658
4659
// Generated as internal constructor for term x64_xmm_load_const.
4660
0
pub fn constructor_x64_xmm_load_const<C: Context>(
4661
0
    ctx: &mut C,
4662
0
    arg0: Type,
4663
0
    arg1: VCodeConstant,
4664
0
) -> Xmm {
4665
0
    let v2 = &C::const_to_synthetic_amode(ctx, arg1);
4666
0
    let v4 = constructor_x64_load(ctx, arg0, v2, &ExtKind::None);
4667
0
    let v5 = C::xmm_new(ctx, v4);
4668
0
    // Rule at src/isa/x64/inst.isle line 2466.
4669
0
    return v5;
4670
0
}
4671
4672
// Generated as internal constructor for term x64_add.
4673
15.5k
pub fn constructor_x64_add<C: Context>(
4674
15.5k
    ctx: &mut C,
4675
15.5k
    arg0: Type,
4676
15.5k
    arg1: Gpr,
4677
15.5k
    arg2: &GprMemImm,
4678
15.5k
) -> Gpr {
4679
15.5k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
4680
15.5k
    // Rule at src/isa/x64/inst.isle line 2477.
4681
15.5k
    return v4;
4682
15.5k
}
4683
4684
// Generated as internal constructor for term x64_add_with_flags_paired.
4685
0
pub fn constructor_x64_add_with_flags_paired<C: Context>(
4686
0
    ctx: &mut C,
4687
0
    arg0: Type,
4688
0
    arg1: Gpr,
4689
0
    arg2: &GprMemImm,
4690
0
) -> ProducesFlags {
4691
0
    let v3 = C::temp_writable_gpr(ctx);
4692
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4693
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4694
0
    let v6 = MInst::AluRmiR {
4695
0
        size: v4.clone(),
4696
0
        op: AluRmiROpcode::Add,
4697
0
        src1: arg1,
4698
0
        src2: arg2.clone(),
4699
0
        dst: v3,
4700
0
    };
4701
0
    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4702
0
        inst: v6,
4703
0
        result: v7,
4704
0
    };
4705
0
    // Rule at src/isa/x64/inst.isle line 2485.
4706
0
    return v8;
4707
0
}
4708
4709
// Generated as internal constructor for term x64_alurmi_with_flags_paired.
4710
0
pub fn constructor_x64_alurmi_with_flags_paired<C: Context>(
4711
0
    ctx: &mut C,
4712
0
    arg0: &AluRmiROpcode,
4713
0
    arg1: Type,
4714
0
    arg2: Gpr,
4715
0
    arg3: &GprMemImm,
4716
0
) -> ProducesFlags {
4717
0
    let v2 = C::fits_in_64(ctx, arg1);
4718
0
    if let Some(v3) = v2 {
4719
0
        let v6 = C::temp_writable_gpr(ctx);
4720
0
        let v7 = &C::raw_operand_size_of_type(ctx, v3);
4721
0
        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
4722
0
        let v8 = MInst::AluRmiR {
4723
0
            size: v7.clone(),
4724
0
            op: arg0.clone(),
4725
0
            src1: arg2,
4726
0
            src2: arg3.clone(),
4727
0
            dst: v6,
4728
0
        };
4729
0
        let v10 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4730
0
            inst: v8,
4731
0
            result: v9,
4732
0
        };
4733
0
        // Rule at src/isa/x64/inst.isle line 2496.
4734
0
        return v10;
4735
0
    }
4736
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_alurmi_with_flags_paired", "src/isa/x64/inst.isle line 2495")
4737
0
}
4738
4739
// Generated as internal constructor for term x64_alurmi_with_flags_chained.
4740
0
pub fn constructor_x64_alurmi_with_flags_chained<C: Context>(
4741
0
    ctx: &mut C,
4742
0
    arg0: &AluRmiROpcode,
4743
0
    arg1: Type,
4744
0
    arg2: Gpr,
4745
0
    arg3: &GprMemImm,
4746
0
) -> ConsumesAndProducesFlags {
4747
0
    let v2 = C::fits_in_64(ctx, arg1);
4748
0
    if let Some(v3) = v2 {
4749
0
        let v6 = C::temp_writable_gpr(ctx);
4750
0
        let v7 = &C::raw_operand_size_of_type(ctx, v3);
4751
0
        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
4752
0
        let v8 = MInst::AluRmiR {
4753
0
            size: v7.clone(),
4754
0
            op: arg0.clone(),
4755
0
            src1: arg2,
4756
0
            src2: arg3.clone(),
4757
0
            dst: v6,
4758
0
        };
4759
0
        let v10 = ConsumesAndProducesFlags::ReturnsReg {
4760
0
            inst: v8,
4761
0
            result: v9,
4762
0
        };
4763
0
        // Rule at src/isa/x64/inst.isle line 2508.
4764
0
        return v10;
4765
0
    }
4766
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_alurmi_with_flags_chained", "src/isa/x64/inst.isle line 2507")
4767
0
}
4768
4769
// Generated as internal constructor for term x64_adc_paired.
4770
0
pub fn constructor_x64_adc_paired<C: Context>(
4771
0
    ctx: &mut C,
4772
0
    arg0: Type,
4773
0
    arg1: Gpr,
4774
0
    arg2: &GprMemImm,
4775
0
) -> ConsumesFlags {
4776
0
    let v3 = C::temp_writable_gpr(ctx);
4777
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4778
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4779
0
    let v6 = MInst::AluRmiR {
4780
0
        size: v4.clone(),
4781
0
        op: AluRmiROpcode::Adc,
4782
0
        src1: arg1,
4783
0
        src2: arg2.clone(),
4784
0
        dst: v3,
4785
0
    };
4786
0
    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4787
0
        inst: v6,
4788
0
        result: v7,
4789
0
    };
4790
0
    // Rule at src/isa/x64/inst.isle line 2520.
4791
0
    return v8;
4792
0
}
4793
4794
// Generated as internal constructor for term x64_sub.
4795
67.8k
pub fn constructor_x64_sub<C: Context>(
4796
67.8k
    ctx: &mut C,
4797
67.8k
    arg0: Type,
4798
67.8k
    arg1: Gpr,
4799
67.8k
    arg2: &GprMemImm,
4800
67.8k
) -> Gpr {
4801
67.8k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
4802
67.8k
    // Rule at src/isa/x64/inst.isle line 2532.
4803
67.8k
    return v4;
4804
67.8k
}
4805
4806
// Generated as internal constructor for term x64_sub_with_flags_paired.
4807
0
pub fn constructor_x64_sub_with_flags_paired<C: Context>(
4808
0
    ctx: &mut C,
4809
0
    arg0: Type,
4810
0
    arg1: Gpr,
4811
0
    arg2: &GprMemImm,
4812
0
) -> ProducesFlags {
4813
0
    let v3 = C::temp_writable_gpr(ctx);
4814
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4815
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4816
0
    let v6 = MInst::AluRmiR {
4817
0
        size: v4.clone(),
4818
0
        op: AluRmiROpcode::Sub,
4819
0
        src1: arg1,
4820
0
        src2: arg2.clone(),
4821
0
        dst: v3,
4822
0
    };
4823
0
    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4824
0
        inst: v6,
4825
0
        result: v7,
4826
0
    };
4827
0
    // Rule at src/isa/x64/inst.isle line 2540.
4828
0
    return v8;
4829
0
}
4830
4831
// Generated as internal constructor for term x64_sbb_paired.
4832
0
pub fn constructor_x64_sbb_paired<C: Context>(
4833
0
    ctx: &mut C,
4834
0
    arg0: Type,
4835
0
    arg1: Gpr,
4836
0
    arg2: &GprMemImm,
4837
0
) -> ConsumesFlags {
4838
0
    let v3 = C::temp_writable_gpr(ctx);
4839
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4840
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4841
0
    let v6 = MInst::AluRmiR {
4842
0
        size: v4.clone(),
4843
0
        op: AluRmiROpcode::Sbb,
4844
0
        src1: arg1,
4845
0
        src2: arg2.clone(),
4846
0
        dst: v3,
4847
0
    };
4848
0
    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4849
0
        inst: v6,
4850
0
        result: v7,
4851
0
    };
4852
0
    // Rule at src/isa/x64/inst.isle line 2552.
4853
0
    return v8;
4854
0
}
4855
4856
// Generated as internal constructor for term x64_mul.
4857
58.7k
pub fn constructor_x64_mul<C: Context>(
4858
58.7k
    ctx: &mut C,
4859
58.7k
    arg0: Type,
4860
58.7k
    arg1: Gpr,
4861
58.7k
    arg2: &GprMemImm,
4862
58.7k
) -> Gpr {
4863
58.7k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Mul, arg1, arg2);
4864
58.7k
    // Rule at src/isa/x64/inst.isle line 2564.
4865
58.7k
    return v4;
4866
58.7k
}
4867
4868
// Generated as internal constructor for term x64_umullo.
4869
0
pub fn constructor_x64_umullo<C: Context>(
4870
0
    ctx: &mut C,
4871
0
    arg0: Type,
4872
0
    arg1: Gpr,
4873
0
    arg2: &GprMem,
4874
0
) -> Gpr {
4875
0
    let v3 = C::temp_writable_gpr(ctx);
4876
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
4877
0
    let v5 = MInst::UMulLo {
4878
0
        size: v4.clone(),
4879
0
        src1: arg1,
4880
0
        src2: arg2.clone(),
4881
0
        dst: v3,
4882
0
    };
4883
0
    let v6 = C::emit(ctx, &v5);
4884
0
    let v7 = C::writable_gpr_to_gpr(ctx, v3);
4885
0
    // Rule at src/isa/x64/inst.isle line 2572.
4886
0
    return v7;
4887
0
}
4888
4889
// Generated as internal constructor for term x64_umullo_with_flags_paired.
4890
0
pub fn constructor_x64_umullo_with_flags_paired<C: Context>(
4891
0
    ctx: &mut C,
4892
0
    arg0: Type,
4893
0
    arg1: Gpr,
4894
0
    arg2: &GprMem,
4895
0
) -> ProducesFlags {
4896
0
    let v3 = C::temp_writable_gpr(ctx);
4897
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
4898
0
    let v6 = constructor_writable_gpr_to_r_reg(ctx, v3);
4899
0
    let v5 = MInst::UMulLo {
4900
0
        size: v4.clone(),
4901
0
        src1: arg1,
4902
0
        src2: arg2.clone(),
4903
0
        dst: v3,
4904
0
    };
4905
0
    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4906
0
        inst: v5,
4907
0
        result: v6,
4908
0
    };
4909
0
    // Rule at src/isa/x64/inst.isle line 2579.
4910
0
    return v7;
4911
0
}
4912
4913
// Generated as internal constructor for term x64_and.
4914
67.9k
pub fn constructor_x64_and<C: Context>(
4915
67.9k
    ctx: &mut C,
4916
67.9k
    arg0: Type,
4917
67.9k
    arg1: Gpr,
4918
67.9k
    arg2: &GprMemImm,
4919
67.9k
) -> Gpr {
4920
67.9k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
4921
67.9k
    // Rule at src/isa/x64/inst.isle line 2590.
4922
67.9k
    return v4;
4923
67.9k
}
4924
4925
// Generated as internal constructor for term x64_and_with_flags_paired.
4926
0
pub fn constructor_x64_and_with_flags_paired<C: Context>(
4927
0
    ctx: &mut C,
4928
0
    arg0: Type,
4929
0
    arg1: Gpr,
4930
0
    arg2: &GprMemImm,
4931
0
) -> ProducesFlags {
4932
0
    let v3 = C::temp_writable_gpr(ctx);
4933
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4934
0
    let v6 = MInst::AluRmiR {
4935
0
        size: v4.clone(),
4936
0
        op: AluRmiROpcode::And,
4937
0
        src1: arg1,
4938
0
        src2: arg2.clone(),
4939
0
        dst: v3,
4940
0
    };
4941
0
    let v7 = ProducesFlags::ProducesFlagsSideEffect {
4942
0
        inst: v6,
4943
0
    };
4944
0
    // Rule at src/isa/x64/inst.isle line 2597.
4945
0
    return v7;
4946
0
}
4947
4948
// Generated as internal constructor for term x64_or.
4949
21.1k
pub fn constructor_x64_or<C: Context>(
4950
21.1k
    ctx: &mut C,
4951
21.1k
    arg0: Type,
4952
21.1k
    arg1: Gpr,
4953
21.1k
    arg2: &GprMemImm,
4954
21.1k
) -> Gpr {
4955
21.1k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
4956
21.1k
    // Rule at src/isa/x64/inst.isle line 2608.
4957
21.1k
    return v4;
4958
21.1k
}
4959
4960
// Generated as internal constructor for term x64_xor.
4961
3.33k
pub fn constructor_x64_xor<C: Context>(
4962
3.33k
    ctx: &mut C,
4963
3.33k
    arg0: Type,
4964
3.33k
    arg1: Gpr,
4965
3.33k
    arg2: &GprMemImm,
4966
3.33k
) -> Gpr {
4967
3.33k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
4968
3.33k
    // Rule at src/isa/x64/inst.isle line 2616.
4969
3.33k
    return v4;
4970
3.33k
}
4971
4972
// Generated as internal constructor for term x64_andn.
4973
277
pub fn constructor_x64_andn<C: Context>(
4974
277
    ctx: &mut C,
4975
277
    arg0: Type,
4976
277
    arg1: Gpr,
4977
277
    arg2: &GprMem,
4978
277
) -> Gpr {
4979
277
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Andn, arg1, arg2);
4980
277
    // Rule at src/isa/x64/inst.isle line 2623.
4981
277
    return v4;
4982
277
}
4983
4984
// Generated as internal constructor for term imm_i64.
4985
0
pub fn constructor_imm_i64<C: Context>(
4986
0
    ctx: &mut C,
4987
0
    arg0: Type,
4988
0
    arg1: i64,
4989
0
) -> Reg {
4990
0
    let v2 = C::i64_as_u64(ctx, arg1);
4991
0
    let v3 = constructor_imm(ctx, arg0, v2);
4992
0
    // Rule at src/isa/x64/inst.isle line 2630.
4993
0
    return v3;
4994
0
}
4995
4996
// Generated as internal constructor for term imm.
4997
828k
pub fn constructor_imm<C: Context>(
4998
828k
    ctx: &mut C,
4999
828k
    arg0: Type,
5000
828k
    arg1: u64,
5001
828k
) -> Reg {
5002
828k
    match arg0 {
5003
        I64 => {
5004
77.1k
            let v20 = C::nonzero_u64_fits_in_u32(ctx, arg1);
5005
77.1k
            if let Some(
v216.97k
) = v20 {
5006
6.97k
                let v5 = C::temp_writable_gpr(ctx);
5007
6.97k
                let v23 = MInst::Imm {
5008
6.97k
                    dst_size: OperandSize::Size32,
5009
6.97k
                    simm64: v21,
5010
6.97k
                    dst: v5,
5011
6.97k
                };
5012
6.97k
                let v24 = C::emit(ctx, &v23);
5013
6.97k
                let v25 = constructor_writable_gpr_to_r_reg(ctx, v5);
5014
6.97k
                // Rule at src/isa/x64/inst.isle line 2661.
5015
6.97k
                return v25;
5016
70.1k
            }
5017
        }
5018
        F32 => {
5019
0
            let v4 = C::u64_is_zero(ctx, arg1);
5020
0
            match v4 {
5021
                true => {
5022
0
                    let v35 = constructor_xmm_zero(ctx, arg0);
5023
0
                    let v36 = C::xmm_to_reg(ctx, v35);
5024
0
                    // Rule at src/isa/x64/inst.isle line 2679.
5025
0
                    return v36;
5026
                }
5027
                false => {
5028
0
                    let v11 = constructor_imm(ctx, I32, arg1);
5029
0
                    let v12 = &C::reg_to_gpr_mem(ctx, v11);
5030
0
                    let v13 = constructor_x64_movd_to_xmm(ctx, v12);
5031
0
                    let v14 = C::xmm_to_reg(ctx, v13);
5032
0
                    // Rule at src/isa/x64/inst.isle line 2652.
5033
0
                    return v14;
5034
                }
5035
                _ => {}
5036
            }
5037
        }
5038
        F64 => {
5039
0
            let v4 = C::u64_is_zero(ctx, arg1);
5040
0
            match v4 {
5041
                true => {
5042
0
                    let v35 = constructor_xmm_zero(ctx, arg0);
5043
0
                    let v36 = C::xmm_to_reg(ctx, v35);
5044
0
                    // Rule at src/isa/x64/inst.isle line 2684.
5045
0
                    return v36;
5046
                }
5047
                false => {
5048
0
                    let v16 = constructor_imm(ctx, I64, arg1);
5049
0
                    let v17 = &C::reg_to_gpr_mem(ctx, v16);
5050
0
                    let v18 = constructor_x64_movq_to_xmm(ctx, v17);
5051
0
                    let v19 = C::xmm_to_reg(ctx, v18);
5052
0
                    // Rule at src/isa/x64/inst.isle line 2656.
5053
0
                    return v19;
5054
                }
5055
                _ => {}
5056
            }
5057
        }
5058
751k
        _ => {}
5059
    }
5060
821k
    let v1 = C::fits_in_64(ctx, arg0);
5061
821k
    if let Some(v2) = v1 {
5062
821k
        let v4 = C::u64_is_zero(ctx, arg1);
5063
821k
        match v4 {
5064
            true => {
5065
100k
                let v5 = C::temp_writable_gpr(ctx);
5066
100k
                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
5067
100k
                let v27 = MInst::AluConstOp {
5068
100k
                    op: AluRmiROpcode::Xor,
5069
100k
                    size: v6.clone(),
5070
100k
                    dst: v5,
5071
100k
                };
5072
100k
                let v28 = C::emit(ctx, &v27);
5073
100k
                let v29 = C::writable_gpr_to_gpr(ctx, v5);
5074
100k
                let v30 = C::gpr_to_reg(ctx, v29);
5075
100k
                // Rule at src/isa/x64/inst.isle line 2667.
5076
100k
                return v30;
5077
            }
5078
            false => {
5079
720k
                let v5 = C::temp_writable_gpr(ctx);
5080
720k
                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
5081
720k
                let v7 = MInst::Imm {
5082
720k
                    dst_size: v6.clone(),
5083
720k
                    simm64: arg1,
5084
720k
                    dst: v5,
5085
720k
                };
5086
720k
                let v8 = C::emit(ctx, &v7);
5087
720k
                let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
5088
720k
                // Rule at src/isa/x64/inst.isle line 2645.
5089
720k
                return v9;
5090
            }
5091
            _ => {}
5092
        }
5093
0
    }
5094
0
    if arg1 == 0x0 {
5095
0
        let v31 = C::multi_lane(ctx, arg0);
5096
0
        if let Some(v32) = v31 {
5097
0
            let v35 = constructor_xmm_zero(ctx, arg0);
5098
0
            let v36 = C::xmm_to_reg(ctx, v35);
5099
0
            // Rule at src/isa/x64/inst.isle line 2675.
5100
0
            return v36;
5101
0
        }
5102
0
    }
5103
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "imm", "src/isa/x64/inst.isle line 2642")
5104
828k
}
5105
5106
// Generated as internal constructor for term xmm_zero.
5107
0
pub fn constructor_xmm_zero<C: Context>(
5108
0
    ctx: &mut C,
5109
0
    arg0: Type,
5110
0
) -> Xmm {
5111
0
    let v1 = constructor_xmm_uninit_value(ctx);
5112
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
5113
0
    let v3 = constructor_x64_xor_vector(ctx, arg0, v1, v2);
5114
0
    // Rule at src/isa/x64/inst.isle line 2689.
5115
0
    return v3;
5116
0
}
5117
5118
// Generated as internal constructor for term shift_r.
5119
38.9k
pub fn constructor_shift_r<C: Context>(
5120
38.9k
    ctx: &mut C,
5121
38.9k
    arg0: Type,
5122
38.9k
    arg1: &ShiftKind,
5123
38.9k
    arg2: Gpr,
5124
38.9k
    arg3: &Imm8Gpr,
5125
38.9k
) -> Gpr {
5126
38.9k
    let v4 = C::temp_writable_gpr(ctx);
5127
38.9k
    let v5 = &C::raw_operand_size_of_type(ctx, arg0);
5128
38.9k
    let v6 = MInst::ShiftR {
5129
38.9k
        size: v5.clone(),
5130
38.9k
        kind: arg1.clone(),
5131
38.9k
        src: arg2,
5132
38.9k
        num_bits: arg3.clone(),
5133
38.9k
        dst: v4,
5134
38.9k
    };
5135
38.9k
    let v7 = C::emit(ctx, &v6);
5136
38.9k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
5137
38.9k
    // Rule at src/isa/x64/inst.isle line 2695.
5138
38.9k
    return v8;
5139
38.9k
}
5140
5141
// Generated as internal constructor for term x64_rotl.
5142
1.00k
pub fn constructor_x64_rotl<C: Context>(
5143
1.00k
    ctx: &mut C,
5144
1.00k
    arg0: Type,
5145
1.00k
    arg1: Gpr,
5146
1.00k
    arg2: &Imm8Gpr,
5147
1.00k
) -> Gpr {
5148
1.00k
    let v5 = C::ty_32_or_64(ctx, arg0);
5149
1.00k
    if let Some(v6) = v5 {
5150
1.00k
        let v7 = C::imm8_from_imm8_gpr(ctx, arg2);
5151
1.00k
        if let Some(
v8931
) = v7 {
5152
931
            let v9 = C::use_bmi2(ctx);
5153
931
            if v9 == true {
5154
931
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5155
931
                let v11 = C::ty_bits(ctx, v6);
5156
931
                let v12 = C::u8_sub(ctx, v11, v8);
5157
931
                let v13 = constructor_x64_rorx(ctx, v6, v10, v12);
5158
931
                // Rule at src/isa/x64/inst.isle line 2707.
5159
931
                return v13;
5160
0
            }
5161
71
        }
5162
0
    }
5163
71
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateLeft, arg1, arg2);
5164
71
    // Rule at src/isa/x64/inst.isle line 2705.
5165
71
    return v4;
5166
1.00k
}
5167
5168
// Generated as internal constructor for term x64_rotr.
5169
26
pub fn constructor_x64_rotr<C: Context>(
5170
26
    ctx: &mut C,
5171
26
    arg0: Type,
5172
26
    arg1: Gpr,
5173
26
    arg2: &Imm8Gpr,
5174
26
) -> Gpr {
5175
26
    let v5 = C::ty_32_or_64(ctx, arg0);
5176
26
    if let Some(v6) = v5 {
5177
26
        let v7 = C::imm8_from_imm8_gpr(ctx, arg2);
5178
26
        if let Some(v8) = v7 {
5179
26
            let v9 = C::use_bmi2(ctx);
5180
26
            if v9 == true {
5181
26
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5182
26
                let v11 = constructor_x64_rorx(ctx, v6, v10, v8);
5183
26
                // Rule at src/isa/x64/inst.isle line 2715.
5184
26
                return v11;
5185
0
            }
5186
0
        }
5187
0
    }
5188
0
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateRight, arg1, arg2);
5189
0
    // Rule at src/isa/x64/inst.isle line 2713.
5190
0
    return v4;
5191
26
}
5192
5193
// Generated as internal constructor for term x64_shl.
5194
24.2k
pub fn constructor_x64_shl<C: Context>(
5195
24.2k
    ctx: &mut C,
5196
24.2k
    arg0: Type,
5197
24.2k
    arg1: Gpr,
5198
24.2k
    arg2: &Imm8Gpr,
5199
24.2k
) -> Gpr {
5200
24.2k
    let v5 = C::ty_32_or_64(ctx, arg0);
5201
24.2k
    if let Some(v6) = v5 {
5202
24.2k
        let v7 = C::gpr_from_imm8_gpr(ctx, arg2);
5203
24.2k
        if let Some(
v8452
) = v7 {
5204
452
            let v9 = C::use_bmi2(ctx);
5205
452
            if v9 == true {
5206
452
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5207
452
                let v11 = constructor_x64_shlx(ctx, v6, v10, v8);
5208
452
                // Rule at src/isa/x64/inst.isle line 2727.
5209
452
                return v11;
5210
0
            }
5211
23.7k
        }
5212
0
    }
5213
23.7k
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftLeft, arg1, arg2);
5214
23.7k
    // Rule at src/isa/x64/inst.isle line 2721.
5215
23.7k
    return v4;
5216
24.2k
}
5217
5218
// Generated as internal constructor for term x64_shr.
5219
15.3k
pub fn constructor_x64_shr<C: Context>(
5220
15.3k
    ctx: &mut C,
5221
15.3k
    arg0: Type,
5222
15.3k
    arg1: Gpr,
5223
15.3k
    arg2: &Imm8Gpr,
5224
15.3k
) -> Gpr {
5225
15.3k
    let v5 = C::ty_32_or_64(ctx, arg0);
5226
15.3k
    if let Some(v6) = v5 {
5227
15.3k
        let v7 = C::gpr_from_imm8_gpr(ctx, arg2);
5228
15.3k
        if let Some(
v8536
) = v7 {
5229
536
            let v9 = C::use_bmi2(ctx);
5230
536
            if v9 == true {
5231
536
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5232
536
                let v11 = constructor_x64_shrx(ctx, v6, v10, v8);
5233
536
                // Rule at src/isa/x64/inst.isle line 2736.
5234
536
                return v11;
5235
0
            }
5236
14.8k
        }
5237
0
    }
5238
14.8k
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightLogical, arg1, arg2);
5239
14.8k
    // Rule at src/isa/x64/inst.isle line 2733.
5240
14.8k
    return v4;
5241
15.3k
}
5242
5243
// Generated as internal constructor for term x64_sar.
5244
301
pub fn constructor_x64_sar<C: Context>(
5245
301
    ctx: &mut C,
5246
301
    arg0: Type,
5247
301
    arg1: Gpr,
5248
301
    arg2: &Imm8Gpr,
5249
301
) -> Gpr {
5250
301
    let v5 = C::ty_32_or_64(ctx, arg0);
5251
301
    if let Some(v6) = v5 {
5252
301
        let v7 = C::gpr_from_imm8_gpr(ctx, arg2);
5253
301
        if let Some(
v80
) = v7 {
5254
0
            let v9 = C::use_bmi2(ctx);
5255
0
            if v9 == true {
5256
0
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5257
0
                let v11 = constructor_x64_sarx(ctx, v6, v10, v8);
5258
0
                // Rule at src/isa/x64/inst.isle line 2745.
5259
0
                return v11;
5260
0
            }
5261
301
        }
5262
0
    }
5263
301
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightArithmetic, arg1, arg2);
5264
301
    // Rule at src/isa/x64/inst.isle line 2742.
5265
301
    return v4;
5266
301
}
5267
5268
// Generated as internal constructor for term x64_bzhi.
5269
0
pub fn constructor_x64_bzhi<C: Context>(
5270
0
    ctx: &mut C,
5271
0
    arg0: Type,
5272
0
    arg1: &GprMem,
5273
0
    arg2: Gpr,
5274
0
) -> Gpr {
5275
0
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Bzhi, arg2, arg1);
5276
0
    // Rule at src/isa/x64/inst.isle line 2754.
5277
0
    return v4;
5278
0
}
5279
5280
// Generated as internal constructor for term x64_bswap.
5281
0
pub fn constructor_x64_bswap<C: Context>(
5282
0
    ctx: &mut C,
5283
0
    arg0: Type,
5284
0
    arg1: Gpr,
5285
0
) -> Gpr {
5286
0
    let v2 = C::temp_writable_gpr(ctx);
5287
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
5288
0
    let v4 = MInst::Bswap {
5289
0
        size: v3.clone(),
5290
0
        src: arg1,
5291
0
        dst: v2,
5292
0
    };
5293
0
    let v5 = C::emit(ctx, &v4);
5294
0
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
5295
0
    // Rule at src/isa/x64/inst.isle line 2761.
5296
0
    return v6;
5297
0
}
5298
5299
// Generated as internal constructor for term cmp_rmi_r.
5300
544k
pub fn constructor_cmp_rmi_r<C: Context>(
5301
544k
    ctx: &mut C,
5302
544k
    arg0: &OperandSize,
5303
544k
    arg1: &CmpOpcode,
5304
544k
    arg2: &GprMemImm,
5305
544k
    arg3: Gpr,
5306
544k
) -> ProducesFlags {
5307
544k
    let v4 = MInst::CmpRmiR {
5308
544k
        size: arg0.clone(),
5309
544k
        opcode: arg1.clone(),
5310
544k
        src: arg2.clone(),
5311
544k
        dst: arg3,
5312
544k
    };
5313
544k
    let v5 = ProducesFlags::ProducesFlagsSideEffect {
5314
544k
        inst: v4,
5315
544k
    };
5316
544k
    // Rule at src/isa/x64/inst.isle line 2769.
5317
544k
    return v5;
5318
544k
}
5319
5320
// Generated as internal constructor for term x64_cmp.
5321
302k
pub fn constructor_x64_cmp<C: Context>(
5322
302k
    ctx: &mut C,
5323
302k
    arg0: &OperandSize,
5324
302k
    arg1: &GprMemImm,
5325
302k
    arg2: Gpr,
5326
302k
) -> ProducesFlags {
5327
302k
    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, arg1, arg2);
5328
302k
    // Rule at src/isa/x64/inst.isle line 2778.
5329
302k
    return v4.clone();
5330
302k
}
5331
5332
// Generated as internal constructor for term x64_cmp_imm.
5333
0
pub fn constructor_x64_cmp_imm<C: Context>(
5334
0
    ctx: &mut C,
5335
0
    arg0: &OperandSize,
5336
0
    arg1: u32,
5337
0
    arg2: Gpr,
5338
0
) -> ProducesFlags {
5339
0
    let v4 = RegMemImm::Imm {
5340
0
        simm32: arg1,
5341
0
    };
5342
0
    let v5 = &C::gpr_mem_imm_new(ctx, &v4);
5343
0
    let v6 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, v5, arg2);
5344
0
    // Rule at src/isa/x64/inst.isle line 2783.
5345
0
    return v6.clone();
5346
0
}
5347
5348
// Generated as internal constructor for term xmm_cmp_rm_r.
5349
0
pub fn constructor_xmm_cmp_rm_r<C: Context>(
5350
0
    ctx: &mut C,
5351
0
    arg0: &SseOpcode,
5352
0
    arg1: &XmmMemAligned,
5353
0
    arg2: Xmm,
5354
0
) -> ProducesFlags {
5355
0
    let v3 = MInst::XmmCmpRmR {
5356
0
        op: arg0.clone(),
5357
0
        src: arg1.clone(),
5358
0
        dst: arg2,
5359
0
    };
5360
0
    let v4 = ProducesFlags::ProducesFlagsSideEffect {
5361
0
        inst: v3,
5362
0
    };
5363
0
    // Rule at src/isa/x64/inst.isle line 2788.
5364
0
    return v4;
5365
0
}
5366
5367
// Generated as internal constructor for term x64_ucomis.
5368
0
pub fn constructor_x64_ucomis<C: Context>(
5369
0
    ctx: &mut C,
5370
0
    arg0: Value,
5371
0
    arg1: Value,
5372
0
) -> ProducesFlags {
5373
0
    let v1 = C::value_type(ctx, arg0);
5374
0
    match v1 {
5375
        F32 => {
5376
0
            let v4 = constructor_put_in_xmm(ctx, arg0);
5377
0
            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
5378
0
            let v6 = constructor_put_in_xmm(ctx, arg1);
5379
0
            let v7 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomiss, v5, v6);
5380
0
            // Rule at src/isa/x64/inst.isle line 2794.
5381
0
            return v7.clone();
5382
        }
5383
        F64 => {
5384
0
            let v4 = constructor_put_in_xmm(ctx, arg0);
5385
0
            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
5386
0
            let v6 = constructor_put_in_xmm(ctx, arg1);
5387
0
            let v9 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomisd, v5, v6);
5388
0
            // Rule at src/isa/x64/inst.isle line 2798.
5389
0
            return v9.clone();
5390
        }
5391
0
        _ => {}
5392
0
    }
5393
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_ucomis", "src/isa/x64/inst.isle line 2793")
5394
0
}
5395
5396
// Generated as internal constructor for term x64_test.
5397
241k
pub fn constructor_x64_test<C: Context>(
5398
241k
    ctx: &mut C,
5399
241k
    arg0: &OperandSize,
5400
241k
    arg1: &GprMemImm,
5401
241k
    arg2: Gpr,
5402
241k
) -> ProducesFlags {
5403
241k
    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Test, arg1, arg2);
5404
241k
    // Rule at src/isa/x64/inst.isle line 2803.
5405
241k
    return v4.clone();
5406
241k
}
5407
5408
// Generated as internal constructor for term x64_ptest.
5409
0
pub fn constructor_x64_ptest<C: Context>(
5410
0
    ctx: &mut C,
5411
0
    arg0: &XmmMem,
5412
0
    arg1: Xmm,
5413
0
) -> ProducesFlags {
5414
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
5415
0
    let v4 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ptest, v3, arg1);
5416
0
    // Rule at src/isa/x64/inst.isle line 2808.
5417
0
    return v4.clone();
5418
0
}
5419
5420
// Generated as internal constructor for term cmove.
5421
74.3k
pub fn constructor_cmove<C: Context>(
5422
74.3k
    ctx: &mut C,
5423
74.3k
    arg0: Type,
5424
74.3k
    arg1: &CC,
5425
74.3k
    arg2: &GprMem,
5426
74.3k
    arg3: Gpr,
5427
74.3k
) -> ConsumesFlags {
5428
74.3k
    let v4 = C::temp_writable_gpr(ctx);
5429
74.3k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
5430
74.3k
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v4);
5431
74.3k
    let v6 = MInst::Cmove {
5432
74.3k
        size: v5.clone(),
5433
74.3k
        cc: arg1.clone(),
5434
74.3k
        consequent: arg2.clone(),
5435
74.3k
        alternative: arg3,
5436
74.3k
        dst: v4,
5437
74.3k
    };
5438
74.3k
    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
5439
74.3k
        inst: v6,
5440
74.3k
        result: v7,
5441
74.3k
    };
5442
74.3k
    // Rule at src/isa/x64/inst.isle line 2815.
5443
74.3k
    return v8;
5444
74.3k
}
5445
5446
// Generated as internal constructor for term cmove_xmm.
5447
0
pub fn constructor_cmove_xmm<C: Context>(
5448
0
    ctx: &mut C,
5449
0
    arg0: Type,
5450
0
    arg1: &CC,
5451
0
    arg2: &XmmMemAligned,
5452
0
    arg3: Xmm,
5453
0
) -> ConsumesFlags {
5454
0
    let v4 = C::temp_writable_xmm(ctx);
5455
0
    let v6 = constructor_writable_xmm_to_r_reg(ctx, v4);
5456
0
    let v5 = MInst::XmmCmove {
5457
0
        ty: arg0,
5458
0
        cc: arg1.clone(),
5459
0
        consequent: arg2.clone(),
5460
0
        alternative: arg3,
5461
0
        dst: v4,
5462
0
    };
5463
0
    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
5464
0
        inst: v5,
5465
0
        result: v6,
5466
0
    };
5467
0
    // Rule at src/isa/x64/inst.isle line 2823.
5468
0
    return v7;
5469
0
}
5470
5471
// Generated as internal constructor for term cmove_from_values.
5472
24.2k
pub fn constructor_cmove_from_values<C: Context>(
5473
24.2k
    ctx: &mut C,
5474
24.2k
    arg0: Type,
5475
24.2k
    arg1: &CC,
5476
24.2k
    arg2: Value,
5477
24.2k
    arg3: Value,
5478
24.2k
) -> ConsumesFlags {
5479
24.2k
    let v1 = &C::type_register_class(ctx, arg0);
5480
24.2k
    if let Some(v2) = v1 {
5481
24.2k
        match v2 {
5482
            &RegisterClass::Gpr {
5483
24.2k
                single_register: v3,
5484
24.2k
            } => {
5485
24.2k
                match v3 {
5486
                    true => {
5487
24.2k
                        let v26 = &constructor_put_in_gpr_mem(ctx, arg2);
5488
24.2k
                        let v27 = constructor_put_in_gpr(ctx, arg3);
5489
24.2k
                        let v28 = &constructor_cmove(ctx, arg0, arg1, v26, v27);
5490
24.2k
                        // Rule at src/isa/x64/inst.isle line 2854.
5491
24.2k
                        return v28.clone();
5492
                    }
5493
                    false => {
5494
0
                        if arg0 == I128 {
5495
0
                            let v7 = C::put_in_regs(ctx, arg2);
5496
0
                            let v8 = C::put_in_regs(ctx, arg3);
5497
0
                            let v9 = C::temp_writable_gpr(ctx);
5498
0
                            let v10 = C::temp_writable_gpr(ctx);
5499
0
                            let v13 = constructor_value_regs_get_gpr(ctx, v7, 0x0);
5500
0
                            let v14 = &C::gpr_to_gpr_mem(ctx, v13);
5501
0
                            let v15 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
5502
0
                            let v18 = constructor_value_regs_get_gpr(ctx, v7, 0x1);
5503
0
                            let v19 = &C::gpr_to_gpr_mem(ctx, v18);
5504
0
                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
5505
0
                            let v22 = constructor_writable_gpr_to_r_reg(ctx, v9);
5506
0
                            let v23 = constructor_writable_gpr_to_r_reg(ctx, v10);
5507
0
                            let v24 = C::value_regs(ctx, v22, v23);
5508
0
                            let v16 = MInst::Cmove {
5509
0
                                size: OperandSize::Size64,
5510
0
                                cc: arg1.clone(),
5511
0
                                consequent: v14.clone(),
5512
0
                                alternative: v15,
5513
0
                                dst: v9,
5514
0
                            };
5515
0
                            let v21 = MInst::Cmove {
5516
0
                                size: OperandSize::Size64,
5517
0
                                cc: arg1.clone(),
5518
0
                                consequent: v19.clone(),
5519
0
                                alternative: v20,
5520
0
                                dst: v10,
5521
0
                            };
5522
0
                            let v25 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
5523
0
                                inst1: v16,
5524
0
                                inst2: v21,
5525
0
                                result: v24,
5526
0
                            };
5527
0
                            // Rule at src/isa/x64/inst.isle line 2833.
5528
0
                            return v25;
5529
0
                        }
5530
                    }
5531
                    _ => {}
5532
                }
5533
            }
5534
            &RegisterClass::Xmm => {
5535
0
                let v29 = &constructor_put_in_xmm_mem_aligned(ctx, arg2);
5536
0
                let v30 = constructor_put_in_xmm(ctx, arg3);
5537
0
                let v31 = &constructor_cmove_xmm(ctx, arg0, arg1, v29, v30);
5538
0
                // Rule at src/isa/x64/inst.isle line 2857.
5539
0
                return v31.clone();
5540
            }
5541
0
            _ => {}
5542
        }
5543
0
    }
5544
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmove_from_values", "src/isa/x64/inst.isle line 2832")
5545
24.2k
}
5546
5547
// Generated as internal constructor for term cmove_or.
5548
0
pub fn constructor_cmove_or<C: Context>(
5549
0
    ctx: &mut C,
5550
0
    arg0: Type,
5551
0
    arg1: &CC,
5552
0
    arg2: &CC,
5553
0
    arg3: &GprMem,
5554
0
    arg4: Gpr,
5555
0
) -> ConsumesFlags {
5556
0
    let v5 = C::temp_writable_gpr(ctx);
5557
0
    let v6 = C::temp_writable_gpr(ctx);
5558
0
    let v7 = &C::operand_size_of_type_32_64(ctx, arg0);
5559
0
    let v9 = C::writable_gpr_to_gpr(ctx, v6);
5560
0
    let v11 = constructor_writable_gpr_to_value_regs(ctx, v5);
5561
0
    let v8 = MInst::Cmove {
5562
0
        size: v7.clone(),
5563
0
        cc: arg1.clone(),
5564
0
        consequent: arg3.clone(),
5565
0
        alternative: arg4,
5566
0
        dst: v6,
5567
0
    };
5568
0
    let v10 = MInst::Cmove {
5569
0
        size: v7.clone(),
5570
0
        cc: arg2.clone(),
5571
0
        consequent: arg3.clone(),
5572
0
        alternative: v9,
5573
0
        dst: v5,
5574
0
    };
5575
0
    let v12 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
5576
0
        inst1: v8,
5577
0
        inst2: v10,
5578
0
        result: v11,
5579
0
    };
5580
0
    // Rule at src/isa/x64/inst.isle line 2864.
5581
0
    return v12;
5582
0
}
5583
5584
// Generated as internal constructor for term cmove_or_xmm.
5585
0
pub fn constructor_cmove_or_xmm<C: Context>(
5586
0
    ctx: &mut C,
5587
0
    arg0: Type,
5588
0
    arg1: &CC,
5589
0
    arg2: &CC,
5590
0
    arg3: &XmmMemAligned,
5591
0
    arg4: Xmm,
5592
0
) -> ConsumesFlags {
5593
0
    let v5 = C::temp_writable_xmm(ctx);
5594
0
    let v6 = C::temp_writable_xmm(ctx);
5595
0
    let v8 = C::writable_xmm_to_xmm(ctx, v6);
5596
0
    let v10 = constructor_writable_xmm_to_value_regs(ctx, v5);
5597
0
    let v7 = MInst::XmmCmove {
5598
0
        ty: arg0,
5599
0
        cc: arg1.clone(),
5600
0
        consequent: arg3.clone(),
5601
0
        alternative: arg4,
5602
0
        dst: v6,
5603
0
    };
5604
0
    let v9 = MInst::XmmCmove {
5605
0
        ty: arg0,
5606
0
        cc: arg2.clone(),
5607
0
        consequent: arg3.clone(),
5608
0
        alternative: v8,
5609
0
        dst: v5,
5610
0
    };
5611
0
    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
5612
0
        inst1: v7,
5613
0
        inst2: v9,
5614
0
        result: v10,
5615
0
    };
5616
0
    // Rule at src/isa/x64/inst.isle line 2876.
5617
0
    return v11;
5618
0
}
5619
5620
// Generated as internal constructor for term cmove_or_from_values.
5621
0
pub fn constructor_cmove_or_from_values<C: Context>(
5622
0
    ctx: &mut C,
5623
0
    arg0: Type,
5624
0
    arg1: &CC,
5625
0
    arg2: &CC,
5626
0
    arg3: Value,
5627
0
    arg4: Value,
5628
0
) -> ConsumesFlags {
5629
0
    let v1 = &C::type_register_class(ctx, arg0);
5630
0
    if let Some(v2) = v1 {
5631
0
        match v2 {
5632
            &RegisterClass::Gpr {
5633
0
                single_register: v3,
5634
0
            } => {
5635
0
                match v3 {
5636
                    true => {
5637
0
                        let v37 = &constructor_put_in_gpr_mem(ctx, arg3);
5638
0
                        let v38 = constructor_put_in_gpr(ctx, arg4);
5639
0
                        let v39 = &constructor_cmove_or(ctx, arg0, arg1, arg2, v37, v38);
5640
0
                        // Rule at src/isa/x64/inst.isle line 2909.
5641
0
                        return v39.clone();
5642
                    }
5643
                    false => {
5644
0
                        if arg0 == I128 {
5645
0
                            let v8 = C::put_in_regs(ctx, arg3);
5646
0
                            let v9 = C::put_in_regs(ctx, arg4);
5647
0
                            let v10 = C::temp_writable_gpr(ctx);
5648
0
                            let v11 = C::temp_writable_gpr(ctx);
5649
0
                            let v12 = C::temp_writable_gpr(ctx);
5650
0
                            let v13 = C::temp_writable_gpr(ctx);
5651
0
                            let v16 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
5652
0
                            let v17 = &C::gpr_to_gpr_mem(ctx, v16);
5653
0
                            let v18 = constructor_value_regs_get_gpr(ctx, v9, 0x0);
5654
0
                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
5655
0
                            let v21 = &C::gpr_to_gpr_mem(ctx, v20);
5656
0
                            let v22 = C::writable_gpr_to_gpr(ctx, v12);
5657
0
                            let v25 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
5658
0
                            let v26 = &C::gpr_to_gpr_mem(ctx, v25);
5659
0
                            let v27 = constructor_value_regs_get_gpr(ctx, v9, 0x1);
5660
0
                            let v29 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
5661
0
                            let v30 = &C::gpr_to_gpr_mem(ctx, v29);
5662
0
                            let v31 = C::writable_gpr_to_gpr(ctx, v13);
5663
0
                            let v33 = constructor_writable_gpr_to_r_reg(ctx, v10);
5664
0
                            let v34 = constructor_writable_gpr_to_r_reg(ctx, v11);
5665
0
                            let v35 = C::value_regs(ctx, v33, v34);
5666
0
                            let v19 = MInst::Cmove {
5667
0
                                size: OperandSize::Size64,
5668
0
                                cc: arg1.clone(),
5669
0
                                consequent: v17.clone(),
5670
0
                                alternative: v18,
5671
0
                                dst: v12,
5672
0
                            };
5673
0
                            let v23 = MInst::Cmove {
5674
0
                                size: OperandSize::Size64,
5675
0
                                cc: arg2.clone(),
5676
0
                                consequent: v21.clone(),
5677
0
                                alternative: v22,
5678
0
                                dst: v10,
5679
0
                            };
5680
0
                            let v28 = MInst::Cmove {
5681
0
                                size: OperandSize::Size64,
5682
0
                                cc: arg1.clone(),
5683
0
                                consequent: v26.clone(),
5684
0
                                alternative: v27,
5685
0
                                dst: v13,
5686
0
                            };
5687
0
                            let v32 = MInst::Cmove {
5688
0
                                size: OperandSize::Size64,
5689
0
                                cc: arg2.clone(),
5690
0
                                consequent: v30.clone(),
5691
0
                                alternative: v31,
5692
0
                                dst: v11,
5693
0
                            };
5694
0
                            let v36 = ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
5695
0
                                inst1: v19,
5696
0
                                inst2: v23,
5697
0
                                inst3: v28,
5698
0
                                inst4: v32,
5699
0
                                result: v35,
5700
0
                            };
5701
0
                            // Rule at src/isa/x64/inst.isle line 2890.
5702
0
                            return v36;
5703
0
                        }
5704
                    }
5705
                    _ => {}
5706
                }
5707
            }
5708
            &RegisterClass::Xmm => {
5709
0
                let v40 = &constructor_put_in_xmm_mem_aligned(ctx, arg3);
5710
0
                let v41 = constructor_put_in_xmm(ctx, arg4);
5711
0
                let v42 = &constructor_cmove_or_xmm(ctx, arg0, arg1, arg2, v40, v41);
5712
0
                // Rule at src/isa/x64/inst.isle line 2912.
5713
0
                return v42.clone();
5714
            }
5715
0
            _ => {}
5716
        }
5717
0
    }
5718
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmove_or_from_values", "src/isa/x64/inst.isle line 2889")
5719
0
}
5720
5721
// Generated as internal constructor for term x64_setcc.
5722
17.6k
pub fn constructor_x64_setcc<C: Context>(
5723
17.6k
    ctx: &mut C,
5724
17.6k
    arg0: &CC,
5725
17.6k
) -> ConsumesFlags {
5726
17.6k
    let v1 = C::temp_writable_gpr(ctx);
5727
17.6k
    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
5728
17.6k
    let v2 = MInst::Setcc {
5729
17.6k
        cc: arg0.clone(),
5730
17.6k
        dst: v1,
5731
17.6k
    };
5732
17.6k
    let v4 = ConsumesFlags::ConsumesFlagsReturnsReg {
5733
17.6k
        inst: v2,
5734
17.6k
        result: v3,
5735
17.6k
    };
5736
17.6k
    // Rule at src/isa/x64/inst.isle line 2917.
5737
17.6k
    return v4;
5738
17.6k
}
5739
5740
// Generated as internal constructor for term x64_setcc_paired.
5741
0
pub fn constructor_x64_setcc_paired<C: Context>(
5742
0
    ctx: &mut C,
5743
0
    arg0: &CC,
5744
0
) -> ConsumesFlags {
5745
0
    let v1 = C::temp_writable_gpr(ctx);
5746
0
    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
5747
0
    let v2 = MInst::Setcc {
5748
0
        cc: arg0.clone(),
5749
0
        dst: v1,
5750
0
    };
5751
0
    let v4 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
5752
0
        inst: v2,
5753
0
        result: v3,
5754
0
    };
5755
0
    // Rule at src/isa/x64/inst.isle line 2926.
5756
0
    return v4;
5757
0
}
5758
5759
// Generated as internal constructor for term x64_paddb.
5760
0
pub fn constructor_x64_paddb<C: Context>(
5761
0
    ctx: &mut C,
5762
0
    arg0: Xmm,
5763
0
    arg1: &XmmMem,
5764
0
) -> Xmm {
5765
0
    let v5 = C::use_avx(ctx);
5766
0
    if v5 == true {
5767
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5768
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddb, arg0, v7);
5769
0
        // Rule at src/isa/x64/inst.isle line 2936.
5770
0
        return v8;
5771
0
    }
5772
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5773
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddb, arg0, v3);
5774
0
    // Rule at src/isa/x64/inst.isle line 2934.
5775
0
    return v4;
5776
0
}
5777
5778
// Generated as internal constructor for term x64_paddw.
5779
0
pub fn constructor_x64_paddw<C: Context>(
5780
0
    ctx: &mut C,
5781
0
    arg0: Xmm,
5782
0
    arg1: &XmmMem,
5783
0
) -> Xmm {
5784
0
    let v5 = C::use_avx(ctx);
5785
0
    if v5 == true {
5786
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5787
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddw, arg0, v7);
5788
0
        // Rule at src/isa/x64/inst.isle line 2944.
5789
0
        return v8;
5790
0
    }
5791
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5792
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddw, arg0, v3);
5793
0
    // Rule at src/isa/x64/inst.isle line 2942.
5794
0
    return v4;
5795
0
}
5796
5797
// Generated as internal constructor for term x64_paddd.
5798
0
pub fn constructor_x64_paddd<C: Context>(
5799
0
    ctx: &mut C,
5800
0
    arg0: Xmm,
5801
0
    arg1: &XmmMem,
5802
0
) -> Xmm {
5803
0
    let v5 = C::use_avx(ctx);
5804
0
    if v5 == true {
5805
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5806
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddd, arg0, v7);
5807
0
        // Rule at src/isa/x64/inst.isle line 2952.
5808
0
        return v8;
5809
0
    }
5810
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5811
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddd, arg0, v3);
5812
0
    // Rule at src/isa/x64/inst.isle line 2950.
5813
0
    return v4;
5814
0
}
5815
5816
// Generated as internal constructor for term x64_paddq.
5817
0
pub fn constructor_x64_paddq<C: Context>(
5818
0
    ctx: &mut C,
5819
0
    arg0: Xmm,
5820
0
    arg1: &XmmMem,
5821
0
) -> Xmm {
5822
0
    let v5 = C::use_avx(ctx);
5823
0
    if v5 == true {
5824
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5825
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddq, arg0, v7);
5826
0
        // Rule at src/isa/x64/inst.isle line 2960.
5827
0
        return v8;
5828
0
    }
5829
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5830
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddq, arg0, v3);
5831
0
    // Rule at src/isa/x64/inst.isle line 2958.
5832
0
    return v4;
5833
0
}
5834
5835
// Generated as internal constructor for term x64_paddsb.
5836
0
pub fn constructor_x64_paddsb<C: Context>(
5837
0
    ctx: &mut C,
5838
0
    arg0: Xmm,
5839
0
    arg1: &XmmMem,
5840
0
) -> Xmm {
5841
0
    let v5 = C::use_avx(ctx);
5842
0
    if v5 == true {
5843
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5844
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsb, arg0, v7);
5845
0
        // Rule at src/isa/x64/inst.isle line 2968.
5846
0
        return v8;
5847
0
    }
5848
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5849
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsb, arg0, v3);
5850
0
    // Rule at src/isa/x64/inst.isle line 2966.
5851
0
    return v4;
5852
0
}
5853
5854
// Generated as internal constructor for term x64_paddsw.
5855
0
pub fn constructor_x64_paddsw<C: Context>(
5856
0
    ctx: &mut C,
5857
0
    arg0: Xmm,
5858
0
    arg1: &XmmMem,
5859
0
) -> Xmm {
5860
0
    let v5 = C::use_avx(ctx);
5861
0
    if v5 == true {
5862
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5863
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsw, arg0, v7);
5864
0
        // Rule at src/isa/x64/inst.isle line 2976.
5865
0
        return v8;
5866
0
    }
5867
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5868
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsw, arg0, v3);
5869
0
    // Rule at src/isa/x64/inst.isle line 2974.
5870
0
    return v4;
5871
0
}
5872
5873
// Generated as internal constructor for term x64_phaddw.
5874
0
pub fn constructor_x64_phaddw<C: Context>(
5875
0
    ctx: &mut C,
5876
0
    arg0: Xmm,
5877
0
    arg1: &XmmMem,
5878
0
) -> Xmm {
5879
0
    let v5 = C::use_avx(ctx);
5880
0
    if v5 == true {
5881
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5882
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddw, arg0, v7);
5883
0
        // Rule at src/isa/x64/inst.isle line 2984.
5884
0
        return v8;
5885
0
    }
5886
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5887
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddw, arg0, v3);
5888
0
    // Rule at src/isa/x64/inst.isle line 2982.
5889
0
    return v4;
5890
0
}
5891
5892
// Generated as internal constructor for term x64_phaddd.
5893
0
pub fn constructor_x64_phaddd<C: Context>(
5894
0
    ctx: &mut C,
5895
0
    arg0: Xmm,
5896
0
    arg1: &XmmMem,
5897
0
) -> Xmm {
5898
0
    let v5 = C::use_avx(ctx);
5899
0
    if v5 == true {
5900
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5901
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddd, arg0, v7);
5902
0
        // Rule at src/isa/x64/inst.isle line 2992.
5903
0
        return v8;
5904
0
    }
5905
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5906
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddd, arg0, v3);
5907
0
    // Rule at src/isa/x64/inst.isle line 2990.
5908
0
    return v4;
5909
0
}
5910
5911
// Generated as internal constructor for term x64_paddusb.
5912
0
pub fn constructor_x64_paddusb<C: Context>(
5913
0
    ctx: &mut C,
5914
0
    arg0: Xmm,
5915
0
    arg1: &XmmMem,
5916
0
) -> Xmm {
5917
0
    let v5 = C::use_avx(ctx);
5918
0
    if v5 == true {
5919
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5920
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusb, arg0, v7);
5921
0
        // Rule at src/isa/x64/inst.isle line 3000.
5922
0
        return v8;
5923
0
    }
5924
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5925
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusb, arg0, v3);
5926
0
    // Rule at src/isa/x64/inst.isle line 2998.
5927
0
    return v4;
5928
0
}
5929
5930
// Generated as internal constructor for term x64_paddusw.
5931
0
pub fn constructor_x64_paddusw<C: Context>(
5932
0
    ctx: &mut C,
5933
0
    arg0: Xmm,
5934
0
    arg1: &XmmMem,
5935
0
) -> Xmm {
5936
0
    let v5 = C::use_avx(ctx);
5937
0
    if v5 == true {
5938
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5939
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusw, arg0, v7);
5940
0
        // Rule at src/isa/x64/inst.isle line 3008.
5941
0
        return v8;
5942
0
    }
5943
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5944
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusw, arg0, v3);
5945
0
    // Rule at src/isa/x64/inst.isle line 3006.
5946
0
    return v4;
5947
0
}
5948
5949
// Generated as internal constructor for term x64_psubb.
5950
0
pub fn constructor_x64_psubb<C: Context>(
5951
0
    ctx: &mut C,
5952
0
    arg0: Xmm,
5953
0
    arg1: &XmmMem,
5954
0
) -> Xmm {
5955
0
    let v5 = C::use_avx(ctx);
5956
0
    if v5 == true {
5957
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5958
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubb, arg0, v7);
5959
0
        // Rule at src/isa/x64/inst.isle line 3016.
5960
0
        return v8;
5961
0
    }
5962
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5963
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubb, arg0, v3);
5964
0
    // Rule at src/isa/x64/inst.isle line 3014.
5965
0
    return v4;
5966
0
}
5967
5968
// Generated as internal constructor for term x64_psubw.
5969
0
pub fn constructor_x64_psubw<C: Context>(
5970
0
    ctx: &mut C,
5971
0
    arg0: Xmm,
5972
0
    arg1: &XmmMem,
5973
0
) -> Xmm {
5974
0
    let v5 = C::use_avx(ctx);
5975
0
    if v5 == true {
5976
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5977
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubw, arg0, v7);
5978
0
        // Rule at src/isa/x64/inst.isle line 3024.
5979
0
        return v8;
5980
0
    }
5981
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5982
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubw, arg0, v3);
5983
0
    // Rule at src/isa/x64/inst.isle line 3022.
5984
0
    return v4;
5985
0
}
5986
5987
// Generated as internal constructor for term x64_psubd.
5988
0
pub fn constructor_x64_psubd<C: Context>(
5989
0
    ctx: &mut C,
5990
0
    arg0: Xmm,
5991
0
    arg1: &XmmMem,
5992
0
) -> Xmm {
5993
0
    let v5 = C::use_avx(ctx);
5994
0
    if v5 == true {
5995
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5996
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubd, arg0, v7);
5997
0
        // Rule at src/isa/x64/inst.isle line 3032.
5998
0
        return v8;
5999
0
    }
6000
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6001
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubd, arg0, v3);
6002
0
    // Rule at src/isa/x64/inst.isle line 3030.
6003
0
    return v4;
6004
0
}
6005
6006
// Generated as internal constructor for term x64_psubq.
6007
0
pub fn constructor_x64_psubq<C: Context>(
6008
0
    ctx: &mut C,
6009
0
    arg0: Xmm,
6010
0
    arg1: &XmmMem,
6011
0
) -> Xmm {
6012
0
    let v5 = C::use_avx(ctx);
6013
0
    if v5 == true {
6014
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6015
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubq, arg0, v7);
6016
0
        // Rule at src/isa/x64/inst.isle line 3040.
6017
0
        return v8;
6018
0
    }
6019
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6020
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubq, arg0, v3);
6021
0
    // Rule at src/isa/x64/inst.isle line 3038.
6022
0
    return v4;
6023
0
}
6024
6025
// Generated as internal constructor for term x64_psubsb.
6026
0
pub fn constructor_x64_psubsb<C: Context>(
6027
0
    ctx: &mut C,
6028
0
    arg0: Xmm,
6029
0
    arg1: &XmmMem,
6030
0
) -> Xmm {
6031
0
    let v5 = C::use_avx(ctx);
6032
0
    if v5 == true {
6033
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6034
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsb, arg0, v7);
6035
0
        // Rule at src/isa/x64/inst.isle line 3048.
6036
0
        return v8;
6037
0
    }
6038
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6039
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsb, arg0, v3);
6040
0
    // Rule at src/isa/x64/inst.isle line 3046.
6041
0
    return v4;
6042
0
}
6043
6044
// Generated as internal constructor for term x64_psubsw.
6045
0
pub fn constructor_x64_psubsw<C: Context>(
6046
0
    ctx: &mut C,
6047
0
    arg0: Xmm,
6048
0
    arg1: &XmmMem,
6049
0
) -> Xmm {
6050
0
    let v5 = C::use_avx(ctx);
6051
0
    if v5 == true {
6052
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6053
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsw, arg0, v7);
6054
0
        // Rule at src/isa/x64/inst.isle line 3056.
6055
0
        return v8;
6056
0
    }
6057
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6058
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsw, arg0, v3);
6059
0
    // Rule at src/isa/x64/inst.isle line 3054.
6060
0
    return v4;
6061
0
}
6062
6063
// Generated as internal constructor for term x64_psubusb.
6064
0
pub fn constructor_x64_psubusb<C: Context>(
6065
0
    ctx: &mut C,
6066
0
    arg0: Xmm,
6067
0
    arg1: &XmmMem,
6068
0
) -> Xmm {
6069
0
    let v5 = C::use_avx(ctx);
6070
0
    if v5 == true {
6071
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6072
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusb, arg0, v7);
6073
0
        // Rule at src/isa/x64/inst.isle line 3064.
6074
0
        return v8;
6075
0
    }
6076
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6077
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusb, arg0, v3);
6078
0
    // Rule at src/isa/x64/inst.isle line 3062.
6079
0
    return v4;
6080
0
}
6081
6082
// Generated as internal constructor for term x64_psubusw.
6083
0
pub fn constructor_x64_psubusw<C: Context>(
6084
0
    ctx: &mut C,
6085
0
    arg0: Xmm,
6086
0
    arg1: &XmmMem,
6087
0
) -> Xmm {
6088
0
    let v5 = C::use_avx(ctx);
6089
0
    if v5 == true {
6090
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6091
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusw, arg0, v7);
6092
0
        // Rule at src/isa/x64/inst.isle line 3072.
6093
0
        return v8;
6094
0
    }
6095
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6096
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusw, arg0, v3);
6097
0
    // Rule at src/isa/x64/inst.isle line 3070.
6098
0
    return v4;
6099
0
}
6100
6101
// Generated as internal constructor for term x64_pavgb.
6102
0
pub fn constructor_x64_pavgb<C: Context>(
6103
0
    ctx: &mut C,
6104
0
    arg0: Xmm,
6105
0
    arg1: &XmmMem,
6106
0
) -> Xmm {
6107
0
    let v5 = C::use_avx(ctx);
6108
0
    if v5 == true {
6109
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6110
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgb, arg0, v7);
6111
0
        // Rule at src/isa/x64/inst.isle line 3080.
6112
0
        return v8;
6113
0
    }
6114
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6115
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgb, arg0, v3);
6116
0
    // Rule at src/isa/x64/inst.isle line 3078.
6117
0
    return v4;
6118
0
}
6119
6120
// Generated as internal constructor for term x64_pavgw.
6121
0
pub fn constructor_x64_pavgw<C: Context>(
6122
0
    ctx: &mut C,
6123
0
    arg0: Xmm,
6124
0
    arg1: &XmmMem,
6125
0
) -> Xmm {
6126
0
    let v5 = C::use_avx(ctx);
6127
0
    if v5 == true {
6128
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6129
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgw, arg0, v7);
6130
0
        // Rule at src/isa/x64/inst.isle line 3088.
6131
0
        return v8;
6132
0
    }
6133
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6134
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgw, arg0, v3);
6135
0
    // Rule at src/isa/x64/inst.isle line 3086.
6136
0
    return v4;
6137
0
}
6138
6139
// Generated as internal constructor for term x64_pand.
6140
0
pub fn constructor_x64_pand<C: Context>(
6141
0
    ctx: &mut C,
6142
0
    arg0: Xmm,
6143
0
    arg1: &XmmMem,
6144
0
) -> Xmm {
6145
0
    let v5 = C::use_avx(ctx);
6146
0
    if v5 == true {
6147
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6148
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpand, arg0, v7);
6149
0
        // Rule at src/isa/x64/inst.isle line 3096.
6150
0
        return v8;
6151
0
    }
6152
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6153
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pand, arg0, v3);
6154
0
    // Rule at src/isa/x64/inst.isle line 3094.
6155
0
    return v4;
6156
0
}
6157
6158
// Generated as internal constructor for term x64_andps.
6159
0
pub fn constructor_x64_andps<C: Context>(
6160
0
    ctx: &mut C,
6161
0
    arg0: Xmm,
6162
0
    arg1: &XmmMem,
6163
0
) -> Xmm {
6164
0
    let v5 = C::use_avx(ctx);
6165
0
    if v5 == true {
6166
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6167
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandps, arg0, v7);
6168
0
        // Rule at src/isa/x64/inst.isle line 3104.
6169
0
        return v8;
6170
0
    }
6171
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6172
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andps, arg0, v3);
6173
0
    // Rule at src/isa/x64/inst.isle line 3102.
6174
0
    return v4;
6175
0
}
6176
6177
// Generated as internal constructor for term x64_andpd.
6178
0
pub fn constructor_x64_andpd<C: Context>(
6179
0
    ctx: &mut C,
6180
0
    arg0: Xmm,
6181
0
    arg1: &XmmMem,
6182
0
) -> Xmm {
6183
0
    let v5 = C::use_avx(ctx);
6184
0
    if v5 == true {
6185
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6186
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandpd, arg0, v7);
6187
0
        // Rule at src/isa/x64/inst.isle line 3112.
6188
0
        return v8;
6189
0
    }
6190
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6191
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andpd, arg0, v3);
6192
0
    // Rule at src/isa/x64/inst.isle line 3110.
6193
0
    return v4;
6194
0
}
6195
6196
// Generated as internal constructor for term x64_por.
6197
0
pub fn constructor_x64_por<C: Context>(
6198
0
    ctx: &mut C,
6199
0
    arg0: Xmm,
6200
0
    arg1: &XmmMem,
6201
0
) -> Xmm {
6202
0
    let v5 = C::use_avx(ctx);
6203
0
    if v5 == true {
6204
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6205
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpor, arg0, v7);
6206
0
        // Rule at src/isa/x64/inst.isle line 3120.
6207
0
        return v8;
6208
0
    }
6209
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6210
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Por, arg0, v3);
6211
0
    // Rule at src/isa/x64/inst.isle line 3118.
6212
0
    return v4;
6213
0
}
6214
6215
// Generated as internal constructor for term x64_orps.
6216
0
pub fn constructor_x64_orps<C: Context>(
6217
0
    ctx: &mut C,
6218
0
    arg0: Xmm,
6219
0
    arg1: &XmmMem,
6220
0
) -> Xmm {
6221
0
    let v5 = C::use_avx(ctx);
6222
0
    if v5 == true {
6223
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6224
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorps, arg0, v7);
6225
0
        // Rule at src/isa/x64/inst.isle line 3128.
6226
0
        return v8;
6227
0
    }
6228
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6229
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orps, arg0, v3);
6230
0
    // Rule at src/isa/x64/inst.isle line 3126.
6231
0
    return v4;
6232
0
}
6233
6234
// Generated as internal constructor for term x64_orpd.
6235
0
pub fn constructor_x64_orpd<C: Context>(
6236
0
    ctx: &mut C,
6237
0
    arg0: Xmm,
6238
0
    arg1: &XmmMem,
6239
0
) -> Xmm {
6240
0
    let v5 = C::use_avx(ctx);
6241
0
    if v5 == true {
6242
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6243
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorpd, arg0, v7);
6244
0
        // Rule at src/isa/x64/inst.isle line 3136.
6245
0
        return v8;
6246
0
    }
6247
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6248
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orpd, arg0, v3);
6249
0
    // Rule at src/isa/x64/inst.isle line 3134.
6250
0
    return v4;
6251
0
}
6252
6253
// Generated as internal constructor for term x64_pxor.
6254
0
pub fn constructor_x64_pxor<C: Context>(
6255
0
    ctx: &mut C,
6256
0
    arg0: Xmm,
6257
0
    arg1: &XmmMem,
6258
0
) -> Xmm {
6259
0
    let v5 = C::use_avx(ctx);
6260
0
    if v5 == true {
6261
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6262
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpxor, arg0, v7);
6263
0
        // Rule at src/isa/x64/inst.isle line 3144.
6264
0
        return v8;
6265
0
    }
6266
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6267
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pxor, arg0, v3);
6268
0
    // Rule at src/isa/x64/inst.isle line 3142.
6269
0
    return v4;
6270
0
}
6271
6272
// Generated as internal constructor for term x64_xorps.
6273
0
pub fn constructor_x64_xorps<C: Context>(
6274
0
    ctx: &mut C,
6275
0
    arg0: Xmm,
6276
0
    arg1: &XmmMem,
6277
0
) -> Xmm {
6278
0
    let v5 = C::use_avx(ctx);
6279
0
    if v5 == true {
6280
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6281
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorps, arg0, v7);
6282
0
        // Rule at src/isa/x64/inst.isle line 3152.
6283
0
        return v8;
6284
0
    }
6285
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6286
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorps, arg0, v3);
6287
0
    // Rule at src/isa/x64/inst.isle line 3150.
6288
0
    return v4;
6289
0
}
6290
6291
// Generated as internal constructor for term x64_xorpd.
6292
0
pub fn constructor_x64_xorpd<C: Context>(
6293
0
    ctx: &mut C,
6294
0
    arg0: Xmm,
6295
0
    arg1: &XmmMem,
6296
0
) -> Xmm {
6297
0
    let v5 = C::use_avx(ctx);
6298
0
    if v5 == true {
6299
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6300
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorpd, arg0, v7);
6301
0
        // Rule at src/isa/x64/inst.isle line 3160.
6302
0
        return v8;
6303
0
    }
6304
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6305
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorpd, arg0, v3);
6306
0
    // Rule at src/isa/x64/inst.isle line 3158.
6307
0
    return v4;
6308
0
}
6309
6310
// Generated as internal constructor for term x64_pmullw.
6311
0
pub fn constructor_x64_pmullw<C: Context>(
6312
0
    ctx: &mut C,
6313
0
    arg0: Xmm,
6314
0
    arg1: &XmmMem,
6315
0
) -> Xmm {
6316
0
    let v5 = C::use_avx(ctx);
6317
0
    if v5 == true {
6318
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6319
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmullw, arg0, v7);
6320
0
        // Rule at src/isa/x64/inst.isle line 3168.
6321
0
        return v8;
6322
0
    }
6323
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6324
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmullw, arg0, v3);
6325
0
    // Rule at src/isa/x64/inst.isle line 3166.
6326
0
    return v4;
6327
0
}
6328
6329
// Generated as internal constructor for term x64_pmulld.
6330
0
pub fn constructor_x64_pmulld<C: Context>(
6331
0
    ctx: &mut C,
6332
0
    arg0: Xmm,
6333
0
    arg1: &XmmMem,
6334
0
) -> Xmm {
6335
0
    let v5 = C::use_avx(ctx);
6336
0
    if v5 == true {
6337
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6338
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulld, arg0, v7);
6339
0
        // Rule at src/isa/x64/inst.isle line 3176.
6340
0
        return v8;
6341
0
    }
6342
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6343
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulld, arg0, v3);
6344
0
    // Rule at src/isa/x64/inst.isle line 3174.
6345
0
    return v4;
6346
0
}
6347
6348
// Generated as internal constructor for term x64_pmulhw.
6349
0
pub fn constructor_x64_pmulhw<C: Context>(
6350
0
    ctx: &mut C,
6351
0
    arg0: Xmm,
6352
0
    arg1: &XmmMem,
6353
0
) -> Xmm {
6354
0
    let v5 = C::use_avx(ctx);
6355
0
    if v5 == true {
6356
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6357
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhw, arg0, v7);
6358
0
        // Rule at src/isa/x64/inst.isle line 3184.
6359
0
        return v8;
6360
0
    }
6361
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6362
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhw, arg0, v3);
6363
0
    // Rule at src/isa/x64/inst.isle line 3182.
6364
0
    return v4;
6365
0
}
6366
6367
// Generated as internal constructor for term x64_pmulhrsw.
6368
0
pub fn constructor_x64_pmulhrsw<C: Context>(
6369
0
    ctx: &mut C,
6370
0
    arg0: Xmm,
6371
0
    arg1: &XmmMem,
6372
0
) -> Xmm {
6373
0
    let v5 = C::use_avx(ctx);
6374
0
    if v5 == true {
6375
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6376
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhrsw, arg0, v7);
6377
0
        // Rule at src/isa/x64/inst.isle line 3192.
6378
0
        return v8;
6379
0
    }
6380
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6381
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhrsw, arg0, v3);
6382
0
    // Rule at src/isa/x64/inst.isle line 3190.
6383
0
    return v4;
6384
0
}
6385
6386
// Generated as internal constructor for term x64_pmulhuw.
6387
0
pub fn constructor_x64_pmulhuw<C: Context>(
6388
0
    ctx: &mut C,
6389
0
    arg0: Xmm,
6390
0
    arg1: &XmmMem,
6391
0
) -> Xmm {
6392
0
    let v5 = C::use_avx(ctx);
6393
0
    if v5 == true {
6394
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6395
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhuw, arg0, v7);
6396
0
        // Rule at src/isa/x64/inst.isle line 3200.
6397
0
        return v8;
6398
0
    }
6399
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6400
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhuw, arg0, v3);
6401
0
    // Rule at src/isa/x64/inst.isle line 3198.
6402
0
    return v4;
6403
0
}
6404
6405
// Generated as internal constructor for term x64_pmuldq.
6406
0
pub fn constructor_x64_pmuldq<C: Context>(
6407
0
    ctx: &mut C,
6408
0
    arg0: Xmm,
6409
0
    arg1: &XmmMem,
6410
0
) -> Xmm {
6411
0
    let v5 = C::use_avx(ctx);
6412
0
    if v5 == true {
6413
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6414
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuldq, arg0, v7);
6415
0
        // Rule at src/isa/x64/inst.isle line 3208.
6416
0
        return v8;
6417
0
    }
6418
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6419
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuldq, arg0, v3);
6420
0
    // Rule at src/isa/x64/inst.isle line 3206.
6421
0
    return v4;
6422
0
}
6423
6424
// Generated as internal constructor for term x64_pmuludq.
6425
0
pub fn constructor_x64_pmuludq<C: Context>(
6426
0
    ctx: &mut C,
6427
0
    arg0: Xmm,
6428
0
    arg1: &XmmMem,
6429
0
) -> Xmm {
6430
0
    let v5 = C::use_avx(ctx);
6431
0
    if v5 == true {
6432
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6433
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuludq, arg0, v7);
6434
0
        // Rule at src/isa/x64/inst.isle line 3216.
6435
0
        return v8;
6436
0
    }
6437
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6438
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuludq, arg0, v3);
6439
0
    // Rule at src/isa/x64/inst.isle line 3214.
6440
0
    return v4;
6441
0
}
6442
6443
// Generated as internal constructor for term x64_punpckhwd.
6444
0
pub fn constructor_x64_punpckhwd<C: Context>(
6445
0
    ctx: &mut C,
6446
0
    arg0: Xmm,
6447
0
    arg1: &XmmMem,
6448
0
) -> Xmm {
6449
0
    let v5 = C::use_avx(ctx);
6450
0
    if v5 == true {
6451
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6452
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhwd, arg0, v7);
6453
0
        // Rule at src/isa/x64/inst.isle line 3224.
6454
0
        return v8;
6455
0
    }
6456
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6457
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhwd, arg0, v3);
6458
0
    // Rule at src/isa/x64/inst.isle line 3222.
6459
0
    return v4;
6460
0
}
6461
6462
// Generated as internal constructor for term x64_punpcklwd.
6463
0
pub fn constructor_x64_punpcklwd<C: Context>(
6464
0
    ctx: &mut C,
6465
0
    arg0: Xmm,
6466
0
    arg1: &XmmMem,
6467
0
) -> Xmm {
6468
0
    let v5 = C::use_avx(ctx);
6469
0
    if v5 == true {
6470
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6471
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklwd, arg0, v7);
6472
0
        // Rule at src/isa/x64/inst.isle line 3232.
6473
0
        return v8;
6474
0
    }
6475
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6476
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklwd, arg0, v3);
6477
0
    // Rule at src/isa/x64/inst.isle line 3230.
6478
0
    return v4;
6479
0
}
6480
6481
// Generated as internal constructor for term x64_punpckldq.
6482
0
pub fn constructor_x64_punpckldq<C: Context>(
6483
0
    ctx: &mut C,
6484
0
    arg0: Xmm,
6485
0
    arg1: &XmmMem,
6486
0
) -> Xmm {
6487
0
    let v5 = C::use_avx(ctx);
6488
0
    if v5 == true {
6489
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6490
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckldq, arg0, v7);
6491
0
        // Rule at src/isa/x64/inst.isle line 3240.
6492
0
        return v8;
6493
0
    }
6494
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6495
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckldq, arg0, v3);
6496
0
    // Rule at src/isa/x64/inst.isle line 3238.
6497
0
    return v4;
6498
0
}
6499
6500
// Generated as internal constructor for term x64_punpckhdq.
6501
0
pub fn constructor_x64_punpckhdq<C: Context>(
6502
0
    ctx: &mut C,
6503
0
    arg0: Xmm,
6504
0
    arg1: &XmmMem,
6505
0
) -> Xmm {
6506
0
    let v5 = C::use_avx(ctx);
6507
0
    if v5 == true {
6508
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6509
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhdq, arg0, v7);
6510
0
        // Rule at src/isa/x64/inst.isle line 3248.
6511
0
        return v8;
6512
0
    }
6513
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6514
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhdq, arg0, v3);
6515
0
    // Rule at src/isa/x64/inst.isle line 3246.
6516
0
    return v4;
6517
0
}
6518
6519
// Generated as internal constructor for term x64_punpcklqdq.
6520
0
pub fn constructor_x64_punpcklqdq<C: Context>(
6521
0
    ctx: &mut C,
6522
0
    arg0: Xmm,
6523
0
    arg1: &XmmMem,
6524
0
) -> Xmm {
6525
0
    let v5 = C::use_avx(ctx);
6526
0
    if v5 == true {
6527
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6528
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklqdq, arg0, v7);
6529
0
        // Rule at src/isa/x64/inst.isle line 3256.
6530
0
        return v8;
6531
0
    }
6532
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6533
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklqdq, arg0, v3);
6534
0
    // Rule at src/isa/x64/inst.isle line 3254.
6535
0
    return v4;
6536
0
}
6537
6538
// Generated as internal constructor for term x64_punpckhqdq.
6539
0
pub fn constructor_x64_punpckhqdq<C: Context>(
6540
0
    ctx: &mut C,
6541
0
    arg0: Xmm,
6542
0
    arg1: &XmmMem,
6543
0
) -> Xmm {
6544
0
    let v5 = C::use_avx(ctx);
6545
0
    if v5 == true {
6546
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6547
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhqdq, arg0, v7);
6548
0
        // Rule at src/isa/x64/inst.isle line 3264.
6549
0
        return v8;
6550
0
    }
6551
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6552
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhqdq, arg0, v3);
6553
0
    // Rule at src/isa/x64/inst.isle line 3262.
6554
0
    return v4;
6555
0
}
6556
6557
// Generated as internal constructor for term x64_unpcklps.
6558
0
pub fn constructor_x64_unpcklps<C: Context>(
6559
0
    ctx: &mut C,
6560
0
    arg0: Xmm,
6561
0
    arg1: &XmmMem,
6562
0
) -> Xmm {
6563
0
    let v5 = C::use_avx(ctx);
6564
0
    if v5 == true {
6565
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6566
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpcklps, arg0, v7);
6567
0
        // Rule at src/isa/x64/inst.isle line 3272.
6568
0
        return v8;
6569
0
    }
6570
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6571
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpcklps, arg0, v3);
6572
0
    // Rule at src/isa/x64/inst.isle line 3270.
6573
0
    return v4;
6574
0
}
6575
6576
// Generated as internal constructor for term x64_unpckhps.
6577
0
pub fn constructor_x64_unpckhps<C: Context>(
6578
0
    ctx: &mut C,
6579
0
    arg0: Xmm,
6580
0
    arg1: &XmmMem,
6581
0
) -> Xmm {
6582
0
    let v5 = C::use_avx(ctx);
6583
0
    if v5 == true {
6584
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6585
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpckhps, arg0, v7);
6586
0
        // Rule at src/isa/x64/inst.isle line 3280.
6587
0
        return v8;
6588
0
    }
6589
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6590
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpckhps, arg0, v3);
6591
0
    // Rule at src/isa/x64/inst.isle line 3278.
6592
0
    return v4;
6593
0
}
6594
6595
// Generated as internal constructor for term x64_andnps.
6596
0
pub fn constructor_x64_andnps<C: Context>(
6597
0
    ctx: &mut C,
6598
0
    arg0: Xmm,
6599
0
    arg1: &XmmMem,
6600
0
) -> Xmm {
6601
0
    let v5 = C::use_avx(ctx);
6602
0
    if v5 == true {
6603
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6604
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnps, arg0, v7);
6605
0
        // Rule at src/isa/x64/inst.isle line 3288.
6606
0
        return v8;
6607
0
    }
6608
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6609
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnps, arg0, v3);
6610
0
    // Rule at src/isa/x64/inst.isle line 3286.
6611
0
    return v4;
6612
0
}
6613
6614
// Generated as internal constructor for term x64_andnpd.
6615
0
pub fn constructor_x64_andnpd<C: Context>(
6616
0
    ctx: &mut C,
6617
0
    arg0: Xmm,
6618
0
    arg1: &XmmMem,
6619
0
) -> Xmm {
6620
0
    let v5 = C::use_avx(ctx);
6621
0
    if v5 == true {
6622
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6623
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnpd, arg0, v7);
6624
0
        // Rule at src/isa/x64/inst.isle line 3296.
6625
0
        return v8;
6626
0
    }
6627
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6628
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnpd, arg0, v3);
6629
0
    // Rule at src/isa/x64/inst.isle line 3294.
6630
0
    return v4;
6631
0
}
6632
6633
// Generated as internal constructor for term x64_pandn.
6634
0
pub fn constructor_x64_pandn<C: Context>(
6635
0
    ctx: &mut C,
6636
0
    arg0: Xmm,
6637
0
    arg1: &XmmMem,
6638
0
) -> Xmm {
6639
0
    let v5 = C::use_avx(ctx);
6640
0
    if v5 == true {
6641
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6642
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpandn, arg0, v7);
6643
0
        // Rule at src/isa/x64/inst.isle line 3304.
6644
0
        return v8;
6645
0
    }
6646
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6647
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pandn, arg0, v3);
6648
0
    // Rule at src/isa/x64/inst.isle line 3302.
6649
0
    return v4;
6650
0
}
6651
6652
// Generated as internal constructor for term x64_addss.
6653
0
pub fn constructor_x64_addss<C: Context>(
6654
0
    ctx: &mut C,
6655
0
    arg0: Xmm,
6656
0
    arg1: &XmmMem,
6657
0
) -> Xmm {
6658
0
    let v4 = C::use_avx(ctx);
6659
0
    if v4 == true {
6660
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6661
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddss, arg0, v6);
6662
0
        // Rule at src/isa/x64/inst.isle line 3312.
6663
0
        return v7;
6664
0
    }
6665
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addss, arg0, arg1);
6666
0
    // Rule at src/isa/x64/inst.isle line 3310.
6667
0
    return v3;
6668
0
}
6669
6670
// Generated as internal constructor for term x64_addsd.
6671
0
pub fn constructor_x64_addsd<C: Context>(
6672
0
    ctx: &mut C,
6673
0
    arg0: Xmm,
6674
0
    arg1: &XmmMem,
6675
0
) -> Xmm {
6676
0
    let v4 = C::use_avx(ctx);
6677
0
    if v4 == true {
6678
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6679
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddsd, arg0, v6);
6680
0
        // Rule at src/isa/x64/inst.isle line 3320.
6681
0
        return v7;
6682
0
    }
6683
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addsd, arg0, arg1);
6684
0
    // Rule at src/isa/x64/inst.isle line 3318.
6685
0
    return v3;
6686
0
}
6687
6688
// Generated as internal constructor for term x64_addps.
6689
0
pub fn constructor_x64_addps<C: Context>(
6690
0
    ctx: &mut C,
6691
0
    arg0: Xmm,
6692
0
    arg1: &XmmMem,
6693
0
) -> Xmm {
6694
0
    let v5 = C::use_avx(ctx);
6695
0
    if v5 == true {
6696
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6697
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddps, arg0, v7);
6698
0
        // Rule at src/isa/x64/inst.isle line 3328.
6699
0
        return v8;
6700
0
    }
6701
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6702
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addps, arg0, v3);
6703
0
    // Rule at src/isa/x64/inst.isle line 3326.
6704
0
    return v4;
6705
0
}
6706
6707
// Generated as internal constructor for term x64_addpd.
6708
0
pub fn constructor_x64_addpd<C: Context>(
6709
0
    ctx: &mut C,
6710
0
    arg0: Xmm,
6711
0
    arg1: &XmmMem,
6712
0
) -> Xmm {
6713
0
    let v5 = C::use_avx(ctx);
6714
0
    if v5 == true {
6715
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6716
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddpd, arg0, v7);
6717
0
        // Rule at src/isa/x64/inst.isle line 3336.
6718
0
        return v8;
6719
0
    }
6720
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6721
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addpd, arg0, v3);
6722
0
    // Rule at src/isa/x64/inst.isle line 3334.
6723
0
    return v4;
6724
0
}
6725
6726
// Generated as internal constructor for term x64_subss.
6727
0
pub fn constructor_x64_subss<C: Context>(
6728
0
    ctx: &mut C,
6729
0
    arg0: Xmm,
6730
0
    arg1: &XmmMem,
6731
0
) -> Xmm {
6732
0
    let v4 = C::use_avx(ctx);
6733
0
    if v4 == true {
6734
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6735
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubss, arg0, v6);
6736
0
        // Rule at src/isa/x64/inst.isle line 3344.
6737
0
        return v7;
6738
0
    }
6739
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subss, arg0, arg1);
6740
0
    // Rule at src/isa/x64/inst.isle line 3342.
6741
0
    return v3;
6742
0
}
6743
6744
// Generated as internal constructor for term x64_subsd.
6745
0
pub fn constructor_x64_subsd<C: Context>(
6746
0
    ctx: &mut C,
6747
0
    arg0: Xmm,
6748
0
    arg1: &XmmMem,
6749
0
) -> Xmm {
6750
0
    let v4 = C::use_avx(ctx);
6751
0
    if v4 == true {
6752
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6753
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubsd, arg0, v6);
6754
0
        // Rule at src/isa/x64/inst.isle line 3352.
6755
0
        return v7;
6756
0
    }
6757
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subsd, arg0, arg1);
6758
0
    // Rule at src/isa/x64/inst.isle line 3350.
6759
0
    return v3;
6760
0
}
6761
6762
// Generated as internal constructor for term x64_subps.
6763
0
pub fn constructor_x64_subps<C: Context>(
6764
0
    ctx: &mut C,
6765
0
    arg0: Xmm,
6766
0
    arg1: &XmmMem,
6767
0
) -> Xmm {
6768
0
    let v5 = C::use_avx(ctx);
6769
0
    if v5 == true {
6770
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6771
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubps, arg0, v7);
6772
0
        // Rule at src/isa/x64/inst.isle line 3360.
6773
0
        return v8;
6774
0
    }
6775
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6776
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subps, arg0, v3);
6777
0
    // Rule at src/isa/x64/inst.isle line 3358.
6778
0
    return v4;
6779
0
}
6780
6781
// Generated as internal constructor for term x64_subpd.
6782
0
pub fn constructor_x64_subpd<C: Context>(
6783
0
    ctx: &mut C,
6784
0
    arg0: Xmm,
6785
0
    arg1: &XmmMem,
6786
0
) -> Xmm {
6787
0
    let v5 = C::use_avx(ctx);
6788
0
    if v5 == true {
6789
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6790
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubpd, arg0, v7);
6791
0
        // Rule at src/isa/x64/inst.isle line 3368.
6792
0
        return v8;
6793
0
    }
6794
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6795
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subpd, arg0, v3);
6796
0
    // Rule at src/isa/x64/inst.isle line 3366.
6797
0
    return v4;
6798
0
}
6799
6800
// Generated as internal constructor for term x64_mulss.
6801
0
pub fn constructor_x64_mulss<C: Context>(
6802
0
    ctx: &mut C,
6803
0
    arg0: Xmm,
6804
0
    arg1: &XmmMem,
6805
0
) -> Xmm {
6806
0
    let v4 = C::use_avx(ctx);
6807
0
    if v4 == true {
6808
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6809
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulss, arg0, v6);
6810
0
        // Rule at src/isa/x64/inst.isle line 3376.
6811
0
        return v7;
6812
0
    }
6813
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulss, arg0, arg1);
6814
0
    // Rule at src/isa/x64/inst.isle line 3374.
6815
0
    return v3;
6816
0
}
6817
6818
// Generated as internal constructor for term x64_mulsd.
6819
0
pub fn constructor_x64_mulsd<C: Context>(
6820
0
    ctx: &mut C,
6821
0
    arg0: Xmm,
6822
0
    arg1: &XmmMem,
6823
0
) -> Xmm {
6824
0
    let v4 = C::use_avx(ctx);
6825
0
    if v4 == true {
6826
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6827
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulsd, arg0, v6);
6828
0
        // Rule at src/isa/x64/inst.isle line 3384.
6829
0
        return v7;
6830
0
    }
6831
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulsd, arg0, arg1);
6832
0
    // Rule at src/isa/x64/inst.isle line 3382.
6833
0
    return v3;
6834
0
}
6835
6836
// Generated as internal constructor for term x64_mulps.
6837
0
pub fn constructor_x64_mulps<C: Context>(
6838
0
    ctx: &mut C,
6839
0
    arg0: Xmm,
6840
0
    arg1: &XmmMem,
6841
0
) -> Xmm {
6842
0
    let v5 = C::use_avx(ctx);
6843
0
    if v5 == true {
6844
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6845
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulps, arg0, v7);
6846
0
        // Rule at src/isa/x64/inst.isle line 3392.
6847
0
        return v8;
6848
0
    }
6849
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6850
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulps, arg0, v3);
6851
0
    // Rule at src/isa/x64/inst.isle line 3390.
6852
0
    return v4;
6853
0
}
6854
6855
// Generated as internal constructor for term x64_mulpd.
6856
0
pub fn constructor_x64_mulpd<C: Context>(
6857
0
    ctx: &mut C,
6858
0
    arg0: Xmm,
6859
0
    arg1: &XmmMem,
6860
0
) -> Xmm {
6861
0
    let v5 = C::use_avx(ctx);
6862
0
    if v5 == true {
6863
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6864
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulpd, arg0, v7);
6865
0
        // Rule at src/isa/x64/inst.isle line 3400.
6866
0
        return v8;
6867
0
    }
6868
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6869
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulpd, arg0, v3);
6870
0
    // Rule at src/isa/x64/inst.isle line 3398.
6871
0
    return v4;
6872
0
}
6873
6874
// Generated as internal constructor for term x64_divss.
6875
0
pub fn constructor_x64_divss<C: Context>(
6876
0
    ctx: &mut C,
6877
0
    arg0: Xmm,
6878
0
    arg1: &XmmMem,
6879
0
) -> Xmm {
6880
0
    let v4 = C::use_avx(ctx);
6881
0
    if v4 == true {
6882
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6883
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivss, arg0, v6);
6884
0
        // Rule at src/isa/x64/inst.isle line 3408.
6885
0
        return v7;
6886
0
    }
6887
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divss, arg0, arg1);
6888
0
    // Rule at src/isa/x64/inst.isle line 3406.
6889
0
    return v3;
6890
0
}
6891
6892
// Generated as internal constructor for term x64_divsd.
6893
0
pub fn constructor_x64_divsd<C: Context>(
6894
0
    ctx: &mut C,
6895
0
    arg0: Xmm,
6896
0
    arg1: &XmmMem,
6897
0
) -> Xmm {
6898
0
    let v4 = C::use_avx(ctx);
6899
0
    if v4 == true {
6900
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6901
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivsd, arg0, v6);
6902
0
        // Rule at src/isa/x64/inst.isle line 3416.
6903
0
        return v7;
6904
0
    }
6905
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divsd, arg0, arg1);
6906
0
    // Rule at src/isa/x64/inst.isle line 3414.
6907
0
    return v3;
6908
0
}
6909
6910
// Generated as internal constructor for term x64_divps.
6911
0
pub fn constructor_x64_divps<C: Context>(
6912
0
    ctx: &mut C,
6913
0
    arg0: Xmm,
6914
0
    arg1: &XmmMem,
6915
0
) -> Xmm {
6916
0
    let v5 = C::use_avx(ctx);
6917
0
    if v5 == true {
6918
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6919
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivps, arg0, v7);
6920
0
        // Rule at src/isa/x64/inst.isle line 3424.
6921
0
        return v8;
6922
0
    }
6923
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6924
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divps, arg0, v3);
6925
0
    // Rule at src/isa/x64/inst.isle line 3422.
6926
0
    return v4;
6927
0
}
6928
6929
// Generated as internal constructor for term x64_divpd.
6930
0
pub fn constructor_x64_divpd<C: Context>(
6931
0
    ctx: &mut C,
6932
0
    arg0: Xmm,
6933
0
    arg1: &XmmMem,
6934
0
) -> Xmm {
6935
0
    let v5 = C::use_avx(ctx);
6936
0
    if v5 == true {
6937
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6938
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivpd, arg0, v7);
6939
0
        // Rule at src/isa/x64/inst.isle line 3432.
6940
0
        return v8;
6941
0
    }
6942
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6943
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divpd, arg0, v3);
6944
0
    // Rule at src/isa/x64/inst.isle line 3430.
6945
0
    return v4;
6946
0
}
6947
6948
// Generated as internal constructor for term x64_blendvpd.
6949
0
pub fn constructor_x64_blendvpd<C: Context>(
6950
0
    ctx: &mut C,
6951
0
    arg0: Xmm,
6952
0
    arg1: &XmmMem,
6953
0
    arg2: Xmm,
6954
0
) -> Xmm {
6955
0
    let v6 = C::use_avx(ctx);
6956
0
    if v6 == true {
6957
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvpd, arg0, arg1, arg2);
6958
0
        // Rule at src/isa/x64/inst.isle line 3440.
6959
0
        return v8;
6960
0
    }
6961
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6962
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvpd, arg0, v4, arg2);
6963
0
    // Rule at src/isa/x64/inst.isle line 3438.
6964
0
    return v5;
6965
0
}
6966
6967
// Generated as internal constructor for term x64_blendvps.
6968
0
pub fn constructor_x64_blendvps<C: Context>(
6969
0
    ctx: &mut C,
6970
0
    arg0: Xmm,
6971
0
    arg1: &XmmMem,
6972
0
    arg2: Xmm,
6973
0
) -> Xmm {
6974
0
    let v6 = C::use_avx(ctx);
6975
0
    if v6 == true {
6976
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvps, arg0, arg1, arg2);
6977
0
        // Rule at src/isa/x64/inst.isle line 3448.
6978
0
        return v8;
6979
0
    }
6980
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6981
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvps, arg0, v4, arg2);
6982
0
    // Rule at src/isa/x64/inst.isle line 3446.
6983
0
    return v5;
6984
0
}
6985
6986
// Generated as internal constructor for term x64_pblendvb.
6987
0
pub fn constructor_x64_pblendvb<C: Context>(
6988
0
    ctx: &mut C,
6989
0
    arg0: Xmm,
6990
0
    arg1: &XmmMem,
6991
0
    arg2: Xmm,
6992
0
) -> Xmm {
6993
0
    let v6 = C::use_avx(ctx);
6994
0
    if v6 == true {
6995
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vpblendvb, arg0, arg1, arg2);
6996
0
        // Rule at src/isa/x64/inst.isle line 3456.
6997
0
        return v8;
6998
0
    }
6999
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7000
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Pblendvb, arg0, v4, arg2);
7001
0
    // Rule at src/isa/x64/inst.isle line 3454.
7002
0
    return v5;
7003
0
}
7004
7005
// Generated as internal constructor for term x64_pblendw.
7006
0
pub fn constructor_x64_pblendw<C: Context>(
7007
0
    ctx: &mut C,
7008
0
    arg0: Xmm,
7009
0
    arg1: &XmmMem,
7010
0
    arg2: u8,
7011
0
) -> Xmm {
7012
0
    let v8 = C::use_avx(ctx);
7013
0
    if v8 == true {
7014
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpblendw, arg0, arg1, arg2);
7015
0
        // Rule at src/isa/x64/inst.isle line 3464.
7016
0
        return v10;
7017
0
    }
7018
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7019
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7020
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pblendw, v4, v5, arg2, &OperandSize::Size32);
7021
0
    // Rule at src/isa/x64/inst.isle line 3462.
7022
0
    return v7;
7023
0
}
7024
7025
// Generated as internal constructor for term x64_movsd_regmove.
7026
0
pub fn constructor_x64_movsd_regmove<C: Context>(
7027
0
    ctx: &mut C,
7028
0
    arg0: Xmm,
7029
0
    arg1: Xmm,
7030
0
) -> Xmm {
7031
0
    let v5 = C::use_avx(ctx);
7032
0
    if v5 == true {
7033
0
        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
7034
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovsd, arg0, v7);
7035
0
        // Rule at src/isa/x64/inst.isle line 3479.
7036
0
        return v8;
7037
0
    }
7038
0
    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
7039
0
    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movsd, arg0, v3);
7040
0
    // Rule at src/isa/x64/inst.isle line 3477.
7041
0
    return v4;
7042
0
}
7043
7044
// Generated as internal constructor for term x64_movss_regmove.
7045
0
pub fn constructor_x64_movss_regmove<C: Context>(
7046
0
    ctx: &mut C,
7047
0
    arg0: Xmm,
7048
0
    arg1: Xmm,
7049
0
) -> Xmm {
7050
0
    let v5 = C::use_avx(ctx);
7051
0
    if v5 == true {
7052
0
        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
7053
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovss, arg0, v7);
7054
0
        // Rule at src/isa/x64/inst.isle line 3486.
7055
0
        return v8;
7056
0
    }
7057
0
    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
7058
0
    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movss, arg0, v3);
7059
0
    // Rule at src/isa/x64/inst.isle line 3484.
7060
0
    return v4;
7061
0
}
7062
7063
// Generated as internal constructor for term x64_movlhps.
7064
0
pub fn constructor_x64_movlhps<C: Context>(
7065
0
    ctx: &mut C,
7066
0
    arg0: Xmm,
7067
0
    arg1: &XmmMem,
7068
0
) -> Xmm {
7069
0
    let v5 = C::use_avx(ctx);
7070
0
    if v5 == true {
7071
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7072
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovlhps, arg0, v7);
7073
0
        // Rule at src/isa/x64/inst.isle line 3494.
7074
0
        return v8;
7075
0
    }
7076
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7077
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Movlhps, arg0, v3);
7078
0
    // Rule at src/isa/x64/inst.isle line 3492.
7079
0
    return v4;
7080
0
}
7081
7082
// Generated as internal constructor for term x64_pmaxs.
7083
0
pub fn constructor_x64_pmaxs<C: Context>(
7084
0
    ctx: &mut C,
7085
0
    arg0: Type,
7086
0
    arg1: Xmm,
7087
0
    arg2: &XmmMem,
7088
0
) -> Xmm {
7089
0
    match arg0 {
7090
        I8X16 => {
7091
0
            let v3 = constructor_x64_pmaxsb(ctx, arg1, arg2);
7092
0
            // Rule at src/isa/x64/inst.isle line 3500.
7093
0
            return v3;
7094
        }
7095
        I16X8 => {
7096
0
            let v4 = constructor_x64_pmaxsw(ctx, arg1, arg2);
7097
0
            // Rule at src/isa/x64/inst.isle line 3501.
7098
0
            return v4;
7099
        }
7100
        I32X4 => {
7101
0
            let v5 = constructor_x64_pmaxsd(ctx, arg1, arg2);
7102
0
            // Rule at src/isa/x64/inst.isle line 3502.
7103
0
            return v5;
7104
        }
7105
0
        _ => {}
7106
0
    }
7107
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmaxs", "src/isa/x64/inst.isle line 3499")
7108
0
}
7109
7110
// Generated as internal constructor for term x64_pmaxsb.
7111
0
pub fn constructor_x64_pmaxsb<C: Context>(
7112
0
    ctx: &mut C,
7113
0
    arg0: Xmm,
7114
0
    arg1: &XmmMem,
7115
0
) -> Xmm {
7116
0
    let v5 = C::use_avx(ctx);
7117
0
    if v5 == true {
7118
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7119
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsb, arg0, v7);
7120
0
        // Rule at src/isa/x64/inst.isle line 3506.
7121
0
        return v8;
7122
0
    }
7123
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7124
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsb, arg0, v3);
7125
0
    // Rule at src/isa/x64/inst.isle line 3505.
7126
0
    return v4;
7127
0
}
7128
7129
// Generated as internal constructor for term x64_pmaxsw.
7130
0
pub fn constructor_x64_pmaxsw<C: Context>(
7131
0
    ctx: &mut C,
7132
0
    arg0: Xmm,
7133
0
    arg1: &XmmMem,
7134
0
) -> Xmm {
7135
0
    let v5 = C::use_avx(ctx);
7136
0
    if v5 == true {
7137
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7138
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsw, arg0, v7);
7139
0
        // Rule at src/isa/x64/inst.isle line 3511.
7140
0
        return v8;
7141
0
    }
7142
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7143
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsw, arg0, v3);
7144
0
    // Rule at src/isa/x64/inst.isle line 3510.
7145
0
    return v4;
7146
0
}
7147
7148
// Generated as internal constructor for term x64_pmaxsd.
7149
0
pub fn constructor_x64_pmaxsd<C: Context>(
7150
0
    ctx: &mut C,
7151
0
    arg0: Xmm,
7152
0
    arg1: &XmmMem,
7153
0
) -> Xmm {
7154
0
    let v5 = C::use_avx(ctx);
7155
0
    if v5 == true {
7156
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7157
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsd, arg0, v7);
7158
0
        // Rule at src/isa/x64/inst.isle line 3516.
7159
0
        return v8;
7160
0
    }
7161
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7162
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsd, arg0, v3);
7163
0
    // Rule at src/isa/x64/inst.isle line 3515.
7164
0
    return v4;
7165
0
}
7166
7167
// Generated as internal constructor for term x64_pmins.
7168
0
pub fn constructor_x64_pmins<C: Context>(
7169
0
    ctx: &mut C,
7170
0
    arg0: Type,
7171
0
    arg1: Xmm,
7172
0
    arg2: &XmmMem,
7173
0
) -> Xmm {
7174
0
    match arg0 {
7175
        I8X16 => {
7176
0
            let v3 = constructor_x64_pminsb(ctx, arg1, arg2);
7177
0
            // Rule at src/isa/x64/inst.isle line 3522.
7178
0
            return v3;
7179
        }
7180
        I16X8 => {
7181
0
            let v4 = constructor_x64_pminsw(ctx, arg1, arg2);
7182
0
            // Rule at src/isa/x64/inst.isle line 3523.
7183
0
            return v4;
7184
        }
7185
        I32X4 => {
7186
0
            let v5 = constructor_x64_pminsd(ctx, arg1, arg2);
7187
0
            // Rule at src/isa/x64/inst.isle line 3524.
7188
0
            return v5;
7189
        }
7190
0
        _ => {}
7191
0
    }
7192
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmins", "src/isa/x64/inst.isle line 3521")
7193
0
}
7194
7195
// Generated as internal constructor for term x64_pminsb.
7196
0
pub fn constructor_x64_pminsb<C: Context>(
7197
0
    ctx: &mut C,
7198
0
    arg0: Xmm,
7199
0
    arg1: &XmmMem,
7200
0
) -> Xmm {
7201
0
    let v5 = C::use_avx(ctx);
7202
0
    if v5 == true {
7203
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7204
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsb, arg0, v7);
7205
0
        // Rule at src/isa/x64/inst.isle line 3528.
7206
0
        return v8;
7207
0
    }
7208
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7209
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsb, arg0, v3);
7210
0
    // Rule at src/isa/x64/inst.isle line 3527.
7211
0
    return v4;
7212
0
}
7213
7214
// Generated as internal constructor for term x64_pminsw.
7215
0
pub fn constructor_x64_pminsw<C: Context>(
7216
0
    ctx: &mut C,
7217
0
    arg0: Xmm,
7218
0
    arg1: &XmmMem,
7219
0
) -> Xmm {
7220
0
    let v5 = C::use_avx(ctx);
7221
0
    if v5 == true {
7222
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7223
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsw, arg0, v7);
7224
0
        // Rule at src/isa/x64/inst.isle line 3533.
7225
0
        return v8;
7226
0
    }
7227
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7228
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsw, arg0, v3);
7229
0
    // Rule at src/isa/x64/inst.isle line 3532.
7230
0
    return v4;
7231
0
}
7232
7233
// Generated as internal constructor for term x64_pminsd.
7234
0
pub fn constructor_x64_pminsd<C: Context>(
7235
0
    ctx: &mut C,
7236
0
    arg0: Xmm,
7237
0
    arg1: &XmmMem,
7238
0
) -> Xmm {
7239
0
    let v5 = C::use_avx(ctx);
7240
0
    if v5 == true {
7241
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7242
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsd, arg0, v7);
7243
0
        // Rule at src/isa/x64/inst.isle line 3538.
7244
0
        return v8;
7245
0
    }
7246
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7247
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsd, arg0, v3);
7248
0
    // Rule at src/isa/x64/inst.isle line 3537.
7249
0
    return v4;
7250
0
}
7251
7252
// Generated as internal constructor for term x64_pmaxu.
7253
0
pub fn constructor_x64_pmaxu<C: Context>(
7254
0
    ctx: &mut C,
7255
0
    arg0: Type,
7256
0
    arg1: Xmm,
7257
0
    arg2: &XmmMem,
7258
0
) -> Xmm {
7259
0
    match arg0 {
7260
        I8X16 => {
7261
0
            let v3 = constructor_x64_pmaxub(ctx, arg1, arg2);
7262
0
            // Rule at src/isa/x64/inst.isle line 3544.
7263
0
            return v3;
7264
        }
7265
        I16X8 => {
7266
0
            let v4 = constructor_x64_pmaxuw(ctx, arg1, arg2);
7267
0
            // Rule at src/isa/x64/inst.isle line 3545.
7268
0
            return v4;
7269
        }
7270
        I32X4 => {
7271
0
            let v5 = constructor_x64_pmaxud(ctx, arg1, arg2);
7272
0
            // Rule at src/isa/x64/inst.isle line 3546.
7273
0
            return v5;
7274
        }
7275
0
        _ => {}
7276
0
    }
7277
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmaxu", "src/isa/x64/inst.isle line 3543")
7278
0
}
7279
7280
// Generated as internal constructor for term x64_pmaxub.
7281
0
pub fn constructor_x64_pmaxub<C: Context>(
7282
0
    ctx: &mut C,
7283
0
    arg0: Xmm,
7284
0
    arg1: &XmmMem,
7285
0
) -> Xmm {
7286
0
    let v5 = C::use_avx(ctx);
7287
0
    if v5 == true {
7288
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7289
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxub, arg0, v7);
7290
0
        // Rule at src/isa/x64/inst.isle line 3550.
7291
0
        return v8;
7292
0
    }
7293
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7294
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxub, arg0, v3);
7295
0
    // Rule at src/isa/x64/inst.isle line 3549.
7296
0
    return v4;
7297
0
}
7298
7299
// Generated as internal constructor for term x64_pmaxuw.
7300
0
pub fn constructor_x64_pmaxuw<C: Context>(
7301
0
    ctx: &mut C,
7302
0
    arg0: Xmm,
7303
0
    arg1: &XmmMem,
7304
0
) -> Xmm {
7305
0
    let v5 = C::use_avx(ctx);
7306
0
    if v5 == true {
7307
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7308
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxuw, arg0, v7);
7309
0
        // Rule at src/isa/x64/inst.isle line 3555.
7310
0
        return v8;
7311
0
    }
7312
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7313
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxuw, arg0, v3);
7314
0
    // Rule at src/isa/x64/inst.isle line 3554.
7315
0
    return v4;
7316
0
}
7317
7318
// Generated as internal constructor for term x64_pmaxud.
7319
0
pub fn constructor_x64_pmaxud<C: Context>(
7320
0
    ctx: &mut C,
7321
0
    arg0: Xmm,
7322
0
    arg1: &XmmMem,
7323
0
) -> Xmm {
7324
0
    let v5 = C::use_avx(ctx);
7325
0
    if v5 == true {
7326
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7327
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxud, arg0, v7);
7328
0
        // Rule at src/isa/x64/inst.isle line 3560.
7329
0
        return v8;
7330
0
    }
7331
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7332
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxud, arg0, v3);
7333
0
    // Rule at src/isa/x64/inst.isle line 3559.
7334
0
    return v4;
7335
0
}
7336
7337
// Generated as internal constructor for term x64_pminu.
7338
0
pub fn constructor_x64_pminu<C: Context>(
7339
0
    ctx: &mut C,
7340
0
    arg0: Type,
7341
0
    arg1: Xmm,
7342
0
    arg2: &XmmMem,
7343
0
) -> Xmm {
7344
0
    match arg0 {
7345
        I8X16 => {
7346
0
            let v3 = constructor_x64_pminub(ctx, arg1, arg2);
7347
0
            // Rule at src/isa/x64/inst.isle line 3566.
7348
0
            return v3;
7349
        }
7350
        I16X8 => {
7351
0
            let v4 = constructor_x64_pminuw(ctx, arg1, arg2);
7352
0
            // Rule at src/isa/x64/inst.isle line 3567.
7353
0
            return v4;
7354
        }
7355
        I32X4 => {
7356
0
            let v5 = constructor_x64_pminud(ctx, arg1, arg2);
7357
0
            // Rule at src/isa/x64/inst.isle line 3568.
7358
0
            return v5;
7359
        }
7360
0
        _ => {}
7361
0
    }
7362
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pminu", "src/isa/x64/inst.isle line 3565")
7363
0
}
7364
7365
// Generated as internal constructor for term x64_pminub.
7366
0
pub fn constructor_x64_pminub<C: Context>(
7367
0
    ctx: &mut C,
7368
0
    arg0: Xmm,
7369
0
    arg1: &XmmMem,
7370
0
) -> Xmm {
7371
0
    let v5 = C::use_avx(ctx);
7372
0
    if v5 == true {
7373
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7374
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminub, arg0, v7);
7375
0
        // Rule at src/isa/x64/inst.isle line 3572.
7376
0
        return v8;
7377
0
    }
7378
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7379
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminub, arg0, v3);
7380
0
    // Rule at src/isa/x64/inst.isle line 3571.
7381
0
    return v4;
7382
0
}
7383
7384
// Generated as internal constructor for term x64_pminuw.
7385
0
pub fn constructor_x64_pminuw<C: Context>(
7386
0
    ctx: &mut C,
7387
0
    arg0: Xmm,
7388
0
    arg1: &XmmMem,
7389
0
) -> Xmm {
7390
0
    let v5 = C::use_avx(ctx);
7391
0
    if v5 == true {
7392
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7393
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminuw, arg0, v7);
7394
0
        // Rule at src/isa/x64/inst.isle line 3577.
7395
0
        return v8;
7396
0
    }
7397
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7398
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminuw, arg0, v3);
7399
0
    // Rule at src/isa/x64/inst.isle line 3576.
7400
0
    return v4;
7401
0
}
7402
7403
// Generated as internal constructor for term x64_pminud.
7404
0
pub fn constructor_x64_pminud<C: Context>(
7405
0
    ctx: &mut C,
7406
0
    arg0: Xmm,
7407
0
    arg1: &XmmMem,
7408
0
) -> Xmm {
7409
0
    let v5 = C::use_avx(ctx);
7410
0
    if v5 == true {
7411
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7412
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminud, arg0, v7);
7413
0
        // Rule at src/isa/x64/inst.isle line 3582.
7414
0
        return v8;
7415
0
    }
7416
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7417
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminud, arg0, v3);
7418
0
    // Rule at src/isa/x64/inst.isle line 3581.
7419
0
    return v4;
7420
0
}
7421
7422
// Generated as internal constructor for term x64_punpcklbw.
7423
0
pub fn constructor_x64_punpcklbw<C: Context>(
7424
0
    ctx: &mut C,
7425
0
    arg0: Xmm,
7426
0
    arg1: &XmmMem,
7427
0
) -> Xmm {
7428
0
    let v5 = C::use_avx(ctx);
7429
0
    if v5 == true {
7430
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7431
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklbw, arg0, v7);
7432
0
        // Rule at src/isa/x64/inst.isle line 3590.
7433
0
        return v8;
7434
0
    }
7435
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7436
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklbw, arg0, v3);
7437
0
    // Rule at src/isa/x64/inst.isle line 3588.
7438
0
    return v4;
7439
0
}
7440
7441
// Generated as internal constructor for term x64_punpckhbw.
7442
0
pub fn constructor_x64_punpckhbw<C: Context>(
7443
0
    ctx: &mut C,
7444
0
    arg0: Xmm,
7445
0
    arg1: &XmmMem,
7446
0
) -> Xmm {
7447
0
    let v5 = C::use_avx(ctx);
7448
0
    if v5 == true {
7449
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7450
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhbw, arg0, v7);
7451
0
        // Rule at src/isa/x64/inst.isle line 3598.
7452
0
        return v8;
7453
0
    }
7454
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7455
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhbw, arg0, v3);
7456
0
    // Rule at src/isa/x64/inst.isle line 3596.
7457
0
    return v4;
7458
0
}
7459
7460
// Generated as internal constructor for term x64_packsswb.
7461
0
pub fn constructor_x64_packsswb<C: Context>(
7462
0
    ctx: &mut C,
7463
0
    arg0: Xmm,
7464
0
    arg1: &XmmMem,
7465
0
) -> Xmm {
7466
0
    let v5 = C::use_avx(ctx);
7467
0
    if v5 == true {
7468
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7469
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpacksswb, arg0, v7);
7470
0
        // Rule at src/isa/x64/inst.isle line 3606.
7471
0
        return v8;
7472
0
    }
7473
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7474
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packsswb, arg0, v3);
7475
0
    // Rule at src/isa/x64/inst.isle line 3604.
7476
0
    return v4;
7477
0
}
7478
7479
// Generated as internal constructor for term x64_packssdw.
7480
0
pub fn constructor_x64_packssdw<C: Context>(
7481
0
    ctx: &mut C,
7482
0
    arg0: Xmm,
7483
0
    arg1: &XmmMem,
7484
0
) -> Xmm {
7485
0
    let v5 = C::use_avx(ctx);
7486
0
    if v5 == true {
7487
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7488
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackssdw, arg0, v7);
7489
0
        // Rule at src/isa/x64/inst.isle line 3614.
7490
0
        return v8;
7491
0
    }
7492
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7493
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packssdw, arg0, v3);
7494
0
    // Rule at src/isa/x64/inst.isle line 3612.
7495
0
    return v4;
7496
0
}
7497
7498
// Generated as internal constructor for term x64_packuswb.
7499
0
pub fn constructor_x64_packuswb<C: Context>(
7500
0
    ctx: &mut C,
7501
0
    arg0: Xmm,
7502
0
    arg1: &XmmMem,
7503
0
) -> Xmm {
7504
0
    let v5 = C::use_avx(ctx);
7505
0
    if v5 == true {
7506
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7507
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackuswb, arg0, v7);
7508
0
        // Rule at src/isa/x64/inst.isle line 3622.
7509
0
        return v8;
7510
0
    }
7511
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7512
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packuswb, arg0, v3);
7513
0
    // Rule at src/isa/x64/inst.isle line 3620.
7514
0
    return v4;
7515
0
}
7516
7517
// Generated as internal constructor for term x64_packusdw.
7518
0
pub fn constructor_x64_packusdw<C: Context>(
7519
0
    ctx: &mut C,
7520
0
    arg0: Xmm,
7521
0
    arg1: &XmmMem,
7522
0
) -> Xmm {
7523
0
    let v5 = C::use_avx(ctx);
7524
0
    if v5 == true {
7525
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7526
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackusdw, arg0, v7);
7527
0
        // Rule at src/isa/x64/inst.isle line 3630.
7528
0
        return v8;
7529
0
    }
7530
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7531
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packusdw, arg0, v3);
7532
0
    // Rule at src/isa/x64/inst.isle line 3628.
7533
0
    return v4;
7534
0
}
7535
7536
// Generated as internal constructor for term x64_palignr.
7537
0
pub fn constructor_x64_palignr<C: Context>(
7538
0
    ctx: &mut C,
7539
0
    arg0: Xmm,
7540
0
    arg1: &XmmMem,
7541
0
    arg2: u8,
7542
0
) -> Xmm {
7543
0
    let v8 = C::use_avx(ctx);
7544
0
    if v8 == true {
7545
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpalignr, arg0, arg1, arg2);
7546
0
        // Rule at src/isa/x64/inst.isle line 3642.
7547
0
        return v10;
7548
0
    }
7549
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7550
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7551
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Palignr, v4, v5, arg2, &OperandSize::Size32);
7552
0
    // Rule at src/isa/x64/inst.isle line 3636.
7553
0
    return v7;
7554
0
}
7555
7556
// Generated as internal constructor for term x64_cmpp.
7557
0
pub fn constructor_x64_cmpp<C: Context>(
7558
0
    ctx: &mut C,
7559
0
    arg0: Type,
7560
0
    arg1: Xmm,
7561
0
    arg2: &XmmMem,
7562
0
    arg3: &FcmpImm,
7563
0
) -> Xmm {
7564
0
    match arg0 {
7565
        F32X4 => {
7566
0
            let v4 = constructor_x64_cmpps(ctx, arg1, arg2, arg3);
7567
0
            // Rule at src/isa/x64/inst.isle line 3648.
7568
0
            return v4;
7569
        }
7570
        F64X2 => {
7571
0
            let v5 = constructor_x64_cmppd(ctx, arg1, arg2, arg3);
7572
0
            // Rule at src/isa/x64/inst.isle line 3649.
7573
0
            return v5;
7574
        }
7575
0
        _ => {}
7576
0
    }
7577
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_cmpp", "src/isa/x64/inst.isle line 3647")
7578
0
}
7579
7580
// Generated as internal constructor for term x64_cmpps.
7581
0
pub fn constructor_x64_cmpps<C: Context>(
7582
0
    ctx: &mut C,
7583
0
    arg0: Xmm,
7584
0
    arg1: &XmmMem,
7585
0
    arg2: &FcmpImm,
7586
0
) -> Xmm {
7587
0
    let v9 = C::use_avx(ctx);
7588
0
    if v9 == true {
7589
0
        let v11 = C::encode_fcmp_imm(ctx, arg2);
7590
0
        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmpps, arg0, arg1, v11);
7591
0
        // Rule at src/isa/x64/inst.isle line 3658.
7592
0
        return v12;
7593
0
    }
7594
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7595
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7596
0
    let v6 = C::encode_fcmp_imm(ctx, arg2);
7597
0
    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmpps, v4, v5, v6, &OperandSize::Size32);
7598
0
    // Rule at src/isa/x64/inst.isle line 3652.
7599
0
    return v8;
7600
0
}
7601
7602
// Generated as internal constructor for term x64_cmppd.
7603
0
pub fn constructor_x64_cmppd<C: Context>(
7604
0
    ctx: &mut C,
7605
0
    arg0: Xmm,
7606
0
    arg1: &XmmMem,
7607
0
    arg2: &FcmpImm,
7608
0
) -> Xmm {
7609
0
    let v9 = C::use_avx(ctx);
7610
0
    if v9 == true {
7611
0
        let v11 = C::encode_fcmp_imm(ctx, arg2);
7612
0
        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmppd, arg0, arg1, v11);
7613
0
        // Rule at src/isa/x64/inst.isle line 3675.
7614
0
        return v12;
7615
0
    }
7616
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7617
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7618
0
    let v6 = C::encode_fcmp_imm(ctx, arg2);
7619
0
    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmppd, v4, v5, v6, &OperandSize::Size32);
7620
0
    // Rule at src/isa/x64/inst.isle line 3669.
7621
0
    return v8;
7622
0
}
7623
7624
// Generated as internal constructor for term x64_pinsrb.
7625
0
pub fn constructor_x64_pinsrb<C: Context>(
7626
0
    ctx: &mut C,
7627
0
    arg0: Xmm,
7628
0
    arg1: &GprMem,
7629
0
    arg2: u8,
7630
0
) -> Xmm {
7631
0
    let v8 = C::use_avx(ctx);
7632
0
    if v8 == true {
7633
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrb, arg0, arg1, arg2);
7634
0
        // Rule at src/isa/x64/inst.isle line 3690.
7635
0
        return v10;
7636
0
    }
7637
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7638
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7639
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrb, v4, v5, arg2, &OperandSize::Size32);
7640
0
    // Rule at src/isa/x64/inst.isle line 3684.
7641
0
    return v7;
7642
0
}
7643
7644
// Generated as internal constructor for term x64_pinsrw.
7645
0
pub fn constructor_x64_pinsrw<C: Context>(
7646
0
    ctx: &mut C,
7647
0
    arg0: Xmm,
7648
0
    arg1: &GprMem,
7649
0
    arg2: u8,
7650
0
) -> Xmm {
7651
0
    let v8 = C::use_avx(ctx);
7652
0
    if v8 == true {
7653
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrw, arg0, arg1, arg2);
7654
0
        // Rule at src/isa/x64/inst.isle line 3702.
7655
0
        return v10;
7656
0
    }
7657
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7658
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7659
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrw, v4, v5, arg2, &OperandSize::Size32);
7660
0
    // Rule at src/isa/x64/inst.isle line 3696.
7661
0
    return v7;
7662
0
}
7663
7664
// Generated as internal constructor for term x64_pinsrd.
7665
0
pub fn constructor_x64_pinsrd<C: Context>(
7666
0
    ctx: &mut C,
7667
0
    arg0: Xmm,
7668
0
    arg1: &GprMem,
7669
0
    arg2: u8,
7670
0
) -> Xmm {
7671
0
    let v8 = C::use_avx(ctx);
7672
0
    if v8 == true {
7673
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrd, arg0, arg1, arg2);
7674
0
        // Rule at src/isa/x64/inst.isle line 3714.
7675
0
        return v10;
7676
0
    }
7677
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7678
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7679
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size32);
7680
0
    // Rule at src/isa/x64/inst.isle line 3708.
7681
0
    return v7;
7682
0
}
7683
7684
// Generated as internal constructor for term x64_pinsrq.
7685
0
pub fn constructor_x64_pinsrq<C: Context>(
7686
0
    ctx: &mut C,
7687
0
    arg0: Xmm,
7688
0
    arg1: &GprMem,
7689
0
    arg2: u8,
7690
0
) -> Xmm {
7691
0
    let v8 = C::use_avx(ctx);
7692
0
    if v8 == true {
7693
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrq, arg0, arg1, arg2);
7694
0
        // Rule at src/isa/x64/inst.isle line 3726.
7695
0
        return v10;
7696
0
    }
7697
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7698
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7699
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size64);
7700
0
    // Rule at src/isa/x64/inst.isle line 3720.
7701
0
    return v7;
7702
0
}
7703
7704
// Generated as internal constructor for term x64_roundss.
7705
0
pub fn constructor_x64_roundss<C: Context>(
7706
0
    ctx: &mut C,
7707
0
    arg0: &XmmMem,
7708
0
    arg1: &RoundImm,
7709
0
) -> Xmm {
7710
0
    let v6 = C::use_avx(ctx);
7711
0
    if v6 == true {
7712
0
        let v8 = C::encode_round_imm(ctx, arg1);
7713
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundss, arg0, v8);
7714
0
        // Rule at src/isa/x64/inst.isle line 3734.
7715
0
        return v9;
7716
0
    }
7717
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7718
0
    let v4 = C::encode_round_imm(ctx, arg1);
7719
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundss, v3, v4);
7720
0
    // Rule at src/isa/x64/inst.isle line 3732.
7721
0
    return v5;
7722
0
}
7723
7724
// Generated as internal constructor for term x64_roundsd.
7725
0
pub fn constructor_x64_roundsd<C: Context>(
7726
0
    ctx: &mut C,
7727
0
    arg0: &XmmMem,
7728
0
    arg1: &RoundImm,
7729
0
) -> Xmm {
7730
0
    let v6 = C::use_avx(ctx);
7731
0
    if v6 == true {
7732
0
        let v8 = C::encode_round_imm(ctx, arg1);
7733
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundsd, arg0, v8);
7734
0
        // Rule at src/isa/x64/inst.isle line 3742.
7735
0
        return v9;
7736
0
    }
7737
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7738
0
    let v4 = C::encode_round_imm(ctx, arg1);
7739
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundsd, v3, v4);
7740
0
    // Rule at src/isa/x64/inst.isle line 3740.
7741
0
    return v5;
7742
0
}
7743
7744
// Generated as internal constructor for term x64_roundps.
7745
0
pub fn constructor_x64_roundps<C: Context>(
7746
0
    ctx: &mut C,
7747
0
    arg0: &XmmMem,
7748
0
    arg1: &RoundImm,
7749
0
) -> Xmm {
7750
0
    let v6 = C::use_avx(ctx);
7751
0
    if v6 == true {
7752
0
        let v8 = C::encode_round_imm(ctx, arg1);
7753
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundps, arg0, v8);
7754
0
        // Rule at src/isa/x64/inst.isle line 3750.
7755
0
        return v9;
7756
0
    }
7757
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7758
0
    let v4 = C::encode_round_imm(ctx, arg1);
7759
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundps, v3, v4);
7760
0
    // Rule at src/isa/x64/inst.isle line 3748.
7761
0
    return v5;
7762
0
}
7763
7764
// Generated as internal constructor for term x64_roundpd.
7765
0
pub fn constructor_x64_roundpd<C: Context>(
7766
0
    ctx: &mut C,
7767
0
    arg0: &XmmMem,
7768
0
    arg1: &RoundImm,
7769
0
) -> Xmm {
7770
0
    let v6 = C::use_avx(ctx);
7771
0
    if v6 == true {
7772
0
        let v8 = C::encode_round_imm(ctx, arg1);
7773
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundpd, arg0, v8);
7774
0
        // Rule at src/isa/x64/inst.isle line 3758.
7775
0
        return v9;
7776
0
    }
7777
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7778
0
    let v4 = C::encode_round_imm(ctx, arg1);
7779
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundpd, v3, v4);
7780
0
    // Rule at src/isa/x64/inst.isle line 3756.
7781
0
    return v5;
7782
0
}
7783
7784
// Generated as internal constructor for term x64_pmaddwd.
7785
0
pub fn constructor_x64_pmaddwd<C: Context>(
7786
0
    ctx: &mut C,
7787
0
    arg0: Xmm,
7788
0
    arg1: &XmmMem,
7789
0
) -> Xmm {
7790
0
    let v5 = C::use_avx(ctx);
7791
0
    if v5 == true {
7792
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7793
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddwd, arg0, v7);
7794
0
        // Rule at src/isa/x64/inst.isle line 3766.
7795
0
        return v8;
7796
0
    }
7797
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7798
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddwd, arg0, v3);
7799
0
    // Rule at src/isa/x64/inst.isle line 3764.
7800
0
    return v4;
7801
0
}
7802
7803
// Generated as internal constructor for term x64_pmaddubsw.
7804
0
pub fn constructor_x64_pmaddubsw<C: Context>(
7805
0
    ctx: &mut C,
7806
0
    arg0: Xmm,
7807
0
    arg1: &XmmMem,
7808
0
) -> Xmm {
7809
0
    let v5 = C::use_avx(ctx);
7810
0
    if v5 == true {
7811
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7812
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddubsw, arg0, v7);
7813
0
        // Rule at src/isa/x64/inst.isle line 3773.
7814
0
        return v8;
7815
0
    }
7816
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7817
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddubsw, arg0, v3);
7818
0
    // Rule at src/isa/x64/inst.isle line 3771.
7819
0
    return v4;
7820
0
}
7821
7822
// Generated as internal constructor for term x64_insertps.
7823
0
pub fn constructor_x64_insertps<C: Context>(
7824
0
    ctx: &mut C,
7825
0
    arg0: Xmm,
7826
0
    arg1: &XmmMem,
7827
0
    arg2: u8,
7828
0
) -> Xmm {
7829
0
    let v8 = C::use_avx(ctx);
7830
0
    if v8 == true {
7831
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vinsertps, arg0, arg1, arg2);
7832
0
        // Rule at src/isa/x64/inst.isle line 3785.
7833
0
        return v10;
7834
0
    }
7835
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7836
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7837
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Insertps, v4, v5, arg2, &OperandSize::Size32);
7838
0
    // Rule at src/isa/x64/inst.isle line 3779.
7839
0
    return v7;
7840
0
}
7841
7842
// Generated as internal constructor for term x64_pshufd.
7843
0
pub fn constructor_x64_pshufd<C: Context>(
7844
0
    ctx: &mut C,
7845
0
    arg0: &XmmMem,
7846
0
    arg1: u8,
7847
0
) -> Xmm {
7848
0
    let v5 = C::use_avx(ctx);
7849
0
    if v5 == true {
7850
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufd, arg0, arg1);
7851
0
        // Rule at src/isa/x64/inst.isle line 3793.
7852
0
        return v7;
7853
0
    }
7854
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7855
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufd, v3, arg1);
7856
0
    // Rule at src/isa/x64/inst.isle line 3791.
7857
0
    return v4;
7858
0
}
7859
7860
// Generated as internal constructor for term x64_pshufb.
7861
0
pub fn constructor_x64_pshufb<C: Context>(
7862
0
    ctx: &mut C,
7863
0
    arg0: Xmm,
7864
0
    arg1: &XmmMem,
7865
0
) -> Xmm {
7866
0
    let v5 = C::use_avx(ctx);
7867
0
    if v5 == true {
7868
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7869
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpshufb, arg0, v7);
7870
0
        // Rule at src/isa/x64/inst.isle line 3801.
7871
0
        return v8;
7872
0
    }
7873
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7874
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pshufb, arg0, v3);
7875
0
    // Rule at src/isa/x64/inst.isle line 3799.
7876
0
    return v4;
7877
0
}
7878
7879
// Generated as internal constructor for term x64_pshuflw.
7880
0
pub fn constructor_x64_pshuflw<C: Context>(
7881
0
    ctx: &mut C,
7882
0
    arg0: &XmmMem,
7883
0
    arg1: u8,
7884
0
) -> Xmm {
7885
0
    let v5 = C::use_avx(ctx);
7886
0
    if v5 == true {
7887
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshuflw, arg0, arg1);
7888
0
        // Rule at src/isa/x64/inst.isle line 3809.
7889
0
        return v7;
7890
0
    }
7891
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7892
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshuflw, v3, arg1);
7893
0
    // Rule at src/isa/x64/inst.isle line 3807.
7894
0
    return v4;
7895
0
}
7896
7897
// Generated as internal constructor for term x64_pshufhw.
7898
0
pub fn constructor_x64_pshufhw<C: Context>(
7899
0
    ctx: &mut C,
7900
0
    arg0: &XmmMem,
7901
0
    arg1: u8,
7902
0
) -> Xmm {
7903
0
    let v5 = C::use_avx(ctx);
7904
0
    if v5 == true {
7905
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufhw, arg0, arg1);
7906
0
        // Rule at src/isa/x64/inst.isle line 3817.
7907
0
        return v7;
7908
0
    }
7909
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7910
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufhw, v3, arg1);
7911
0
    // Rule at src/isa/x64/inst.isle line 3815.
7912
0
    return v4;
7913
0
}
7914
7915
// Generated as internal constructor for term x64_shufps.
7916
0
pub fn constructor_x64_shufps<C: Context>(
7917
0
    ctx: &mut C,
7918
0
    arg0: Xmm,
7919
0
    arg1: &XmmMem,
7920
0
    arg2: u8,
7921
0
) -> Xmm {
7922
0
    let v8 = C::use_avx(ctx);
7923
0
    if v8 == true {
7924
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vshufps, arg0, arg1, arg2);
7925
0
        // Rule at src/isa/x64/inst.isle line 3829.
7926
0
        return v10;
7927
0
    }
7928
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7929
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7930
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Shufps, v4, v5, arg2, &OperandSize::Size32);
7931
0
    // Rule at src/isa/x64/inst.isle line 3823.
7932
0
    return v7;
7933
0
}
7934
7935
// Generated as internal constructor for term x64_pabsb.
7936
0
pub fn constructor_x64_pabsb<C: Context>(
7937
0
    ctx: &mut C,
7938
0
    arg0: &XmmMem,
7939
0
) -> Xmm {
7940
0
    let v4 = C::use_avx(ctx);
7941
0
    if v4 == true {
7942
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsb, arg0);
7943
0
        // Rule at src/isa/x64/inst.isle line 3837.
7944
0
        return v6;
7945
0
    }
7946
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7947
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsb, v2);
7948
0
    // Rule at src/isa/x64/inst.isle line 3835.
7949
0
    return v3;
7950
0
}
7951
7952
// Generated as internal constructor for term x64_pabsw.
7953
0
pub fn constructor_x64_pabsw<C: Context>(
7954
0
    ctx: &mut C,
7955
0
    arg0: &XmmMem,
7956
0
) -> Xmm {
7957
0
    let v4 = C::use_avx(ctx);
7958
0
    if v4 == true {
7959
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsw, arg0);
7960
0
        // Rule at src/isa/x64/inst.isle line 3845.
7961
0
        return v6;
7962
0
    }
7963
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7964
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsw, v2);
7965
0
    // Rule at src/isa/x64/inst.isle line 3843.
7966
0
    return v3;
7967
0
}
7968
7969
// Generated as internal constructor for term x64_pabsd.
7970
0
pub fn constructor_x64_pabsd<C: Context>(
7971
0
    ctx: &mut C,
7972
0
    arg0: &XmmMem,
7973
0
) -> Xmm {
7974
0
    let v4 = C::use_avx(ctx);
7975
0
    if v4 == true {
7976
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsd, arg0);
7977
0
        // Rule at src/isa/x64/inst.isle line 3853.
7978
0
        return v6;
7979
0
    }
7980
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7981
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsd, v2);
7982
0
    // Rule at src/isa/x64/inst.isle line 3851.
7983
0
    return v3;
7984
0
}
7985
7986
// Generated as internal constructor for term x64_vcvtudq2ps.
7987
0
pub fn constructor_x64_vcvtudq2ps<C: Context>(
7988
0
    ctx: &mut C,
7989
0
    arg0: &XmmMem,
7990
0
) -> Xmm {
7991
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vcvtudq2ps, arg0);
7992
0
    // Rule at src/isa/x64/inst.isle line 3859.
7993
0
    return v2;
7994
0
}
7995
7996
// Generated as internal constructor for term x64_vpabsq.
7997
0
pub fn constructor_x64_vpabsq<C: Context>(
7998
0
    ctx: &mut C,
7999
0
    arg0: &XmmMem,
8000
0
) -> Xmm {
8001
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpabsq, arg0);
8002
0
    // Rule at src/isa/x64/inst.isle line 3864.
8003
0
    return v2;
8004
0
}
8005
8006
// Generated as internal constructor for term x64_vpopcntb.
8007
0
pub fn constructor_x64_vpopcntb<C: Context>(
8008
0
    ctx: &mut C,
8009
0
    arg0: &XmmMem,
8010
0
) -> Xmm {
8011
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpopcntb, arg0);
8012
0
    // Rule at src/isa/x64/inst.isle line 3869.
8013
0
    return v2;
8014
0
}
8015
8016
// Generated as internal constructor for term x64_vpmullq.
8017
0
pub fn constructor_x64_vpmullq<C: Context>(
8018
0
    ctx: &mut C,
8019
0
    arg0: Xmm,
8020
0
    arg1: &XmmMem,
8021
0
) -> Xmm {
8022
0
    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpmullq, arg0, arg1);
8023
0
    // Rule at src/isa/x64/inst.isle line 3876.
8024
0
    return v3;
8025
0
}
8026
8027
// Generated as internal constructor for term x64_vpermi2b.
8028
0
pub fn constructor_x64_vpermi2b<C: Context>(
8029
0
    ctx: &mut C,
8030
0
    arg0: Xmm,
8031
0
    arg1: Xmm,
8032
0
    arg2: &XmmMem,
8033
0
) -> Xmm {
8034
0
    let v3 = C::temp_writable_xmm(ctx);
8035
0
    let v5 = MInst::XmmRmREvex3 {
8036
0
        op: Avx512Opcode::Vpermi2b,
8037
0
        src1: arg0,
8038
0
        src2: arg1,
8039
0
        src3: arg2.clone(),
8040
0
        dst: v3,
8041
0
    };
8042
0
    let v6 = C::emit(ctx, &v5);
8043
0
    let v7 = C::writable_xmm_to_xmm(ctx, v3);
8044
0
    // Rule at src/isa/x64/inst.isle line 3885.
8045
0
    return v7;
8046
0
}
8047
8048
// Generated as internal constructor for term mulhi_u.
8049
0
pub fn constructor_mulhi_u<C: Context>(
8050
0
    ctx: &mut C,
8051
0
    arg0: Type,
8052
0
    arg1: Gpr,
8053
0
    arg2: &GprMem,
8054
0
) -> ValueRegs {
8055
0
    let v4 = constructor_mul_hi(ctx, arg0, false, arg1, arg2);
8056
0
    // Rule at src/isa/x64/inst.isle line 3897.
8057
0
    return v4;
8058
0
}
8059
8060
// Generated as internal constructor for term x64_psllw.
8061
0
pub fn constructor_x64_psllw<C: Context>(
8062
0
    ctx: &mut C,
8063
0
    arg0: Xmm,
8064
0
    arg1: &XmmMemImm,
8065
0
) -> Xmm {
8066
0
    let v5 = C::use_avx(ctx);
8067
0
    if v5 == true {
8068
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllw, arg0, arg1);
8069
0
        // Rule at src/isa/x64/inst.isle line 3904.
8070
0
        return v7;
8071
0
    }
8072
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8073
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllw, arg0, v3);
8074
0
    // Rule at src/isa/x64/inst.isle line 3902.
8075
0
    return v4;
8076
0
}
8077
8078
// Generated as internal constructor for term x64_pslld.
8079
0
pub fn constructor_x64_pslld<C: Context>(
8080
0
    ctx: &mut C,
8081
0
    arg0: Xmm,
8082
0
    arg1: &XmmMemImm,
8083
0
) -> Xmm {
8084
0
    let v5 = C::use_avx(ctx);
8085
0
    if v5 == true {
8086
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpslld, arg0, arg1);
8087
0
        // Rule at src/isa/x64/inst.isle line 3912.
8088
0
        return v7;
8089
0
    }
8090
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8091
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Pslld, arg0, v3);
8092
0
    // Rule at src/isa/x64/inst.isle line 3910.
8093
0
    return v4;
8094
0
}
8095
8096
// Generated as internal constructor for term x64_psllq.
8097
0
pub fn constructor_x64_psllq<C: Context>(
8098
0
    ctx: &mut C,
8099
0
    arg0: Xmm,
8100
0
    arg1: &XmmMemImm,
8101
0
) -> Xmm {
8102
0
    let v5 = C::use_avx(ctx);
8103
0
    if v5 == true {
8104
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllq, arg0, arg1);
8105
0
        // Rule at src/isa/x64/inst.isle line 3920.
8106
0
        return v7;
8107
0
    }
8108
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8109
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllq, arg0, v3);
8110
0
    // Rule at src/isa/x64/inst.isle line 3918.
8111
0
    return v4;
8112
0
}
8113
8114
// Generated as internal constructor for term x64_psrlw.
8115
0
pub fn constructor_x64_psrlw<C: Context>(
8116
0
    ctx: &mut C,
8117
0
    arg0: Xmm,
8118
0
    arg1: &XmmMemImm,
8119
0
) -> Xmm {
8120
0
    let v5 = C::use_avx(ctx);
8121
0
    if v5 == true {
8122
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlw, arg0, arg1);
8123
0
        // Rule at src/isa/x64/inst.isle line 3928.
8124
0
        return v7;
8125
0
    }
8126
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8127
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlw, arg0, v3);
8128
0
    // Rule at src/isa/x64/inst.isle line 3926.
8129
0
    return v4;
8130
0
}
8131
8132
// Generated as internal constructor for term x64_psrld.
8133
0
pub fn constructor_x64_psrld<C: Context>(
8134
0
    ctx: &mut C,
8135
0
    arg0: Xmm,
8136
0
    arg1: &XmmMemImm,
8137
0
) -> Xmm {
8138
0
    let v5 = C::use_avx(ctx);
8139
0
    if v5 == true {
8140
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrld, arg0, arg1);
8141
0
        // Rule at src/isa/x64/inst.isle line 3936.
8142
0
        return v7;
8143
0
    }
8144
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8145
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrld, arg0, v3);
8146
0
    // Rule at src/isa/x64/inst.isle line 3934.
8147
0
    return v4;
8148
0
}
8149
8150
// Generated as internal constructor for term x64_psrlq.
8151
0
pub fn constructor_x64_psrlq<C: Context>(
8152
0
    ctx: &mut C,
8153
0
    arg0: Xmm,
8154
0
    arg1: &XmmMemImm,
8155
0
) -> Xmm {
8156
0
    let v5 = C::use_avx(ctx);
8157
0
    if v5 == true {
8158
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlq, arg0, arg1);
8159
0
        // Rule at src/isa/x64/inst.isle line 3944.
8160
0
        return v7;
8161
0
    }
8162
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8163
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlq, arg0, v3);
8164
0
    // Rule at src/isa/x64/inst.isle line 3942.
8165
0
    return v4;
8166
0
}
8167
8168
// Generated as internal constructor for term x64_psraw.
8169
0
pub fn constructor_x64_psraw<C: Context>(
8170
0
    ctx: &mut C,
8171
0
    arg0: Xmm,
8172
0
    arg1: &XmmMemImm,
8173
0
) -> Xmm {
8174
0
    let v5 = C::use_avx(ctx);
8175
0
    if v5 == true {
8176
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsraw, arg0, arg1);
8177
0
        // Rule at src/isa/x64/inst.isle line 3952.
8178
0
        return v7;
8179
0
    }
8180
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8181
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psraw, arg0, v3);
8182
0
    // Rule at src/isa/x64/inst.isle line 3950.
8183
0
    return v4;
8184
0
}
8185
8186
// Generated as internal constructor for term x64_psrad.
8187
0
pub fn constructor_x64_psrad<C: Context>(
8188
0
    ctx: &mut C,
8189
0
    arg0: Xmm,
8190
0
    arg1: &XmmMemImm,
8191
0
) -> Xmm {
8192
0
    let v5 = C::use_avx(ctx);
8193
0
    if v5 == true {
8194
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrad, arg0, arg1);
8195
0
        // Rule at src/isa/x64/inst.isle line 3960.
8196
0
        return v7;
8197
0
    }
8198
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8199
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrad, arg0, v3);
8200
0
    // Rule at src/isa/x64/inst.isle line 3958.
8201
0
    return v4;
8202
0
}
8203
8204
// Generated as internal constructor for term x64_vpsraq.
8205
0
pub fn constructor_x64_vpsraq<C: Context>(
8206
0
    ctx: &mut C,
8207
0
    arg0: Xmm,
8208
0
    arg1: &XmmMem,
8209
0
) -> Xmm {
8210
0
    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpsraq, arg0, arg1);
8211
0
    // Rule at src/isa/x64/inst.isle line 3966.
8212
0
    return v3;
8213
0
}
8214
8215
// Generated as internal constructor for term x64_vpsraq_imm.
8216
0
pub fn constructor_x64_vpsraq_imm<C: Context>(
8217
0
    ctx: &mut C,
8218
0
    arg0: &XmmMem,
8219
0
    arg1: u8,
8220
0
) -> Xmm {
8221
0
    let v3 = constructor_xmm_unary_rm_r_imm_evex(ctx, &Avx512Opcode::VpsraqImm, arg0, arg1);
8222
0
    // Rule at src/isa/x64/inst.isle line 3971.
8223
0
    return v3;
8224
0
}
8225
8226
// Generated as internal constructor for term x64_pextrb.
8227
0
pub fn constructor_x64_pextrb<C: Context>(
8228
0
    ctx: &mut C,
8229
0
    arg0: Xmm,
8230
0
    arg1: u8,
8231
0
) -> Gpr {
8232
0
    let v4 = C::use_avx(ctx);
8233
0
    if v4 == true {
8234
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1);
8235
0
        // Rule at src/isa/x64/inst.isle line 3978.
8236
0
        return v6;
8237
0
    }
8238
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrb, arg0, arg1);
8239
0
    // Rule at src/isa/x64/inst.isle line 3976.
8240
0
    return v3;
8241
0
}
8242
8243
// Generated as internal constructor for term x64_pextrb_store.
8244
0
pub fn constructor_x64_pextrb_store<C: Context>(
8245
0
    ctx: &mut C,
8246
0
    arg0: &SyntheticAmode,
8247
0
    arg1: Xmm,
8248
0
    arg2: u8,
8249
0
) -> SideEffectNoResult {
8250
0
    let v5 = C::use_avx(ctx);
8251
0
    if v5 == true {
8252
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1, arg2);
8253
0
        // Rule at src/isa/x64/inst.isle line 3985.
8254
0
        return v7.clone();
8255
0
    }
8256
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrb, arg0, arg1, arg2);
8257
0
    // Rule at src/isa/x64/inst.isle line 3983.
8258
0
    return v4.clone();
8259
0
}
8260
8261
// Generated as internal constructor for term x64_pextrw.
8262
0
pub fn constructor_x64_pextrw<C: Context>(
8263
0
    ctx: &mut C,
8264
0
    arg0: Xmm,
8265
0
    arg1: u8,
8266
0
) -> Gpr {
8267
0
    let v4 = C::use_avx(ctx);
8268
0
    if v4 == true {
8269
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1);
8270
0
        // Rule at src/isa/x64/inst.isle line 3993.
8271
0
        return v6;
8272
0
    }
8273
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrw, arg0, arg1);
8274
0
    // Rule at src/isa/x64/inst.isle line 3991.
8275
0
    return v3;
8276
0
}
8277
8278
// Generated as internal constructor for term x64_pextrw_store.
8279
0
pub fn constructor_x64_pextrw_store<C: Context>(
8280
0
    ctx: &mut C,
8281
0
    arg0: &SyntheticAmode,
8282
0
    arg1: Xmm,
8283
0
    arg2: u8,
8284
0
) -> SideEffectNoResult {
8285
0
    let v5 = C::use_avx(ctx);
8286
0
    if v5 == true {
8287
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1, arg2);
8288
0
        // Rule at src/isa/x64/inst.isle line 4000.
8289
0
        return v7.clone();
8290
0
    }
8291
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrw, arg0, arg1, arg2);
8292
0
    // Rule at src/isa/x64/inst.isle line 3998.
8293
0
    return v4.clone();
8294
0
}
8295
8296
// Generated as internal constructor for term x64_pextrd.
8297
0
pub fn constructor_x64_pextrd<C: Context>(
8298
0
    ctx: &mut C,
8299
0
    arg0: Xmm,
8300
0
    arg1: u8,
8301
0
) -> Gpr {
8302
0
    let v4 = C::use_avx(ctx);
8303
0
    if v4 == true {
8304
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1);
8305
0
        // Rule at src/isa/x64/inst.isle line 4008.
8306
0
        return v6;
8307
0
    }
8308
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrd, arg0, arg1);
8309
0
    // Rule at src/isa/x64/inst.isle line 4006.
8310
0
    return v3;
8311
0
}
8312
8313
// Generated as internal constructor for term x64_pextrd_store.
8314
0
pub fn constructor_x64_pextrd_store<C: Context>(
8315
0
    ctx: &mut C,
8316
0
    arg0: &SyntheticAmode,
8317
0
    arg1: Xmm,
8318
0
    arg2: u8,
8319
0
) -> SideEffectNoResult {
8320
0
    let v5 = C::use_avx(ctx);
8321
0
    if v5 == true {
8322
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1, arg2);
8323
0
        // Rule at src/isa/x64/inst.isle line 4015.
8324
0
        return v7.clone();
8325
0
    }
8326
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrd, arg0, arg1, arg2);
8327
0
    // Rule at src/isa/x64/inst.isle line 4013.
8328
0
    return v4.clone();
8329
0
}
8330
8331
// Generated as internal constructor for term x64_pextrq.
8332
0
pub fn constructor_x64_pextrq<C: Context>(
8333
0
    ctx: &mut C,
8334
0
    arg0: Xmm,
8335
0
    arg1: u8,
8336
0
) -> Gpr {
8337
0
    let v4 = C::use_avx(ctx);
8338
0
    if v4 == true {
8339
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1);
8340
0
        // Rule at src/isa/x64/inst.isle line 4023.
8341
0
        return v6;
8342
0
    }
8343
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrq, arg0, arg1);
8344
0
    // Rule at src/isa/x64/inst.isle line 4021.
8345
0
    return v3;
8346
0
}
8347
8348
// Generated as internal constructor for term x64_pextrq_store.
8349
0
pub fn constructor_x64_pextrq_store<C: Context>(
8350
0
    ctx: &mut C,
8351
0
    arg0: &SyntheticAmode,
8352
0
    arg1: Xmm,
8353
0
    arg2: u8,
8354
0
) -> SideEffectNoResult {
8355
0
    let v5 = C::use_avx(ctx);
8356
0
    if v5 == true {
8357
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1, arg2);
8358
0
        // Rule at src/isa/x64/inst.isle line 4030.
8359
0
        return v7.clone();
8360
0
    }
8361
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrq, arg0, arg1, arg2);
8362
0
    // Rule at src/isa/x64/inst.isle line 4028.
8363
0
    return v4.clone();
8364
0
}
8365
8366
// Generated as internal constructor for term x64_pmovmskb.
8367
0
pub fn constructor_x64_pmovmskb<C: Context>(
8368
0
    ctx: &mut C,
8369
0
    arg0: &OperandSize,
8370
0
    arg1: Xmm,
8371
0
) -> Gpr {
8372
0
    let v4 = C::use_avx(ctx);
8373
0
    if v4 == true {
8374
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vpmovmskb, arg1, arg0);
8375
0
        // Rule at src/isa/x64/inst.isle line 4038.
8376
0
        return v6;
8377
0
    }
8378
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Pmovmskb, arg1, arg0);
8379
0
    // Rule at src/isa/x64/inst.isle line 4036.
8380
0
    return v3;
8381
0
}
8382
8383
// Generated as internal constructor for term x64_movmskps.
8384
0
pub fn constructor_x64_movmskps<C: Context>(
8385
0
    ctx: &mut C,
8386
0
    arg0: &OperandSize,
8387
0
    arg1: Xmm,
8388
0
) -> Gpr {
8389
0
    let v4 = C::use_avx(ctx);
8390
0
    if v4 == true {
8391
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskps, arg1, arg0);
8392
0
        // Rule at src/isa/x64/inst.isle line 4046.
8393
0
        return v6;
8394
0
    }
8395
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskps, arg1, arg0);
8396
0
    // Rule at src/isa/x64/inst.isle line 4044.
8397
0
    return v3;
8398
0
}
8399
8400
// Generated as internal constructor for term x64_movmskpd.
8401
0
pub fn constructor_x64_movmskpd<C: Context>(
8402
0
    ctx: &mut C,
8403
0
    arg0: &OperandSize,
8404
0
    arg1: Xmm,
8405
0
) -> Gpr {
8406
0
    let v4 = C::use_avx(ctx);
8407
0
    if v4 == true {
8408
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskpd, arg1, arg0);
8409
0
        // Rule at src/isa/x64/inst.isle line 4054.
8410
0
        return v6;
8411
0
    }
8412
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskpd, arg1, arg0);
8413
0
    // Rule at src/isa/x64/inst.isle line 4052.
8414
0
    return v3;
8415
0
}
8416
8417
// Generated as internal constructor for term x64_not.
8418
1.32k
pub fn constructor_x64_not<C: Context>(
8419
1.32k
    ctx: &mut C,
8420
1.32k
    arg0: Type,
8421
1.32k
    arg1: Gpr,
8422
1.32k
) -> Gpr {
8423
1.32k
    let v2 = C::temp_writable_gpr(ctx);
8424
1.32k
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8425
1.32k
    let v4 = MInst::Not {
8426
1.32k
        size: v3.clone(),
8427
1.32k
        src: arg1,
8428
1.32k
        dst: v2,
8429
1.32k
    };
8430
1.32k
    let v5 = C::emit(ctx, &v4);
8431
1.32k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8432
1.32k
    // Rule at src/isa/x64/inst.isle line 4060.
8433
1.32k
    return v6;
8434
1.32k
}
8435
8436
// Generated as internal constructor for term x64_neg.
8437
2.17k
pub fn constructor_x64_neg<C: Context>(
8438
2.17k
    ctx: &mut C,
8439
2.17k
    arg0: Type,
8440
2.17k
    arg1: Gpr,
8441
2.17k
) -> Gpr {
8442
2.17k
    let v2 = C::temp_writable_gpr(ctx);
8443
2.17k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8444
2.17k
    let v4 = MInst::Neg {
8445
2.17k
        size: v3.clone(),
8446
2.17k
        src: arg1,
8447
2.17k
        dst: v2,
8448
2.17k
    };
8449
2.17k
    let v5 = C::emit(ctx, &v4);
8450
2.17k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8451
2.17k
    // Rule at src/isa/x64/inst.isle line 4068.
8452
2.17k
    return v6;
8453
2.17k
}
8454
8455
// Generated as internal constructor for term x64_neg_paired.
8456
0
pub fn constructor_x64_neg_paired<C: Context>(
8457
0
    ctx: &mut C,
8458
0
    arg0: Type,
8459
0
    arg1: Gpr,
8460
0
) -> ProducesFlags {
8461
0
    let v2 = C::temp_writable_gpr(ctx);
8462
0
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8463
0
    let v5 = constructor_writable_gpr_to_r_reg(ctx, v2);
8464
0
    let v4 = MInst::Neg {
8465
0
        size: v3.clone(),
8466
0
        src: arg1,
8467
0
        dst: v2,
8468
0
    };
8469
0
    let v6 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
8470
0
        inst: v4,
8471
0
        result: v5,
8472
0
    };
8473
0
    // Rule at src/isa/x64/inst.isle line 4076.
8474
0
    return v6;
8475
0
}
8476
8477
// Generated as internal constructor for term x64_lea.
8478
1.04M
pub fn constructor_x64_lea<C: Context>(
8479
1.04M
    ctx: &mut C,
8480
1.04M
    arg0: Type,
8481
1.04M
    arg1: &SyntheticAmode,
8482
1.04M
) -> Gpr {
8483
1.04M
    let v2 = C::temp_writable_gpr(ctx);
8484
1.04M
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8485
1.04M
    let v4 = MInst::LoadEffectiveAddress {
8486
1.04M
        addr: arg1.clone(),
8487
1.04M
        dst: v2,
8488
1.04M
        size: v3.clone(),
8489
1.04M
    };
8490
1.04M
    let v5 = C::emit(ctx, &v4);
8491
1.04M
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8492
1.04M
    // Rule at src/isa/x64/inst.isle line 4083.
8493
1.04M
    return v6;
8494
1.04M
}
8495
8496
// Generated as internal constructor for term x64_ud2.
8497
157k
pub fn constructor_x64_ud2<C: Context>(
8498
157k
    ctx: &mut C,
8499
157k
    arg0: &TrapCode,
8500
157k
) -> SideEffectNoResult {
8501
157k
    let v1 = MInst::Ud2 {
8502
157k
        trap_code: arg0.clone(),
8503
157k
    };
8504
157k
    let v2 = SideEffectNoResult::Inst {
8505
157k
        inst: v1,
8506
157k
    };
8507
157k
    // Rule at src/isa/x64/inst.isle line 4090.
8508
157k
    return v2;
8509
157k
}
8510
8511
// Generated as internal constructor for term x64_hlt.
8512
0
pub fn constructor_x64_hlt<C: Context>(
8513
0
    ctx: &mut C,
8514
0
) -> SideEffectNoResult {
8515
0
    let v1 = SideEffectNoResult::Inst {
8516
0
        inst: MInst::Hlt,
8517
0
    };
8518
0
    // Rule at src/isa/x64/inst.isle line 4095.
8519
0
    return v1;
8520
0
}
8521
8522
// Generated as internal constructor for term x64_lzcnt.
8523
392
pub fn constructor_x64_lzcnt<C: Context>(
8524
392
    ctx: &mut C,
8525
392
    arg0: Type,
8526
392
    arg1: Gpr,
8527
392
) -> Gpr {
8528
392
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8529
392
    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Lzcnt, arg1, v3);
8530
392
    // Rule at src/isa/x64/inst.isle line 4100.
8531
392
    return v4;
8532
392
}
8533
8534
// Generated as internal constructor for term x64_tzcnt.
8535
146
pub fn constructor_x64_tzcnt<C: Context>(
8536
146
    ctx: &mut C,
8537
146
    arg0: Type,
8538
146
    arg1: Gpr,
8539
146
) -> Gpr {
8540
146
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8541
146
    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Tzcnt, arg1, v3);
8542
146
    // Rule at src/isa/x64/inst.isle line 4105.
8543
146
    return v4;
8544
146
}
8545
8546
// Generated as internal constructor for term x64_bsr.
8547
0
pub fn constructor_x64_bsr<C: Context>(
8548
0
    ctx: &mut C,
8549
0
    arg0: Type,
8550
0
    arg1: Gpr,
8551
0
) -> ProducesFlags {
8552
0
    let v2 = C::temp_writable_gpr(ctx);
8553
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8554
0
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8555
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
8556
0
    let v6 = MInst::UnaryRmR {
8557
0
        size: v3.clone(),
8558
0
        op: UnaryRmROpcode::Bsr,
8559
0
        src: v5.clone(),
8560
0
        dst: v2,
8561
0
    };
8562
0
    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
8563
0
        inst: v6,
8564
0
        result: v7,
8565
0
    };
8566
0
    // Rule at src/isa/x64/inst.isle line 4110.
8567
0
    return v8;
8568
0
}
8569
8570
// Generated as internal constructor for term bsr_or_else.
8571
0
pub fn constructor_bsr_or_else<C: Context>(
8572
0
    ctx: &mut C,
8573
0
    arg0: Type,
8574
0
    arg1: Gpr,
8575
0
    arg2: Gpr,
8576
0
) -> Gpr {
8577
0
    let v3 = &constructor_x64_bsr(ctx, arg0, arg1);
8578
0
    let v4 = constructor_produces_flags_get_reg(ctx, v3);
8579
0
    let v5 = C::gpr_new(ctx, v4);
8580
0
    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
8581
0
    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
8582
0
    let v9 = &constructor_produces_flags_ignore(ctx, v3);
8583
0
    let v10 = constructor_with_flags_reg(ctx, v9, v8);
8584
0
    let v11 = C::gpr_new(ctx, v10);
8585
0
    // Rule at src/isa/x64/inst.isle line 4119.
8586
0
    return v11;
8587
0
}
8588
8589
// Generated as internal constructor for term x64_bsf.
8590
0
pub fn constructor_x64_bsf<C: Context>(
8591
0
    ctx: &mut C,
8592
0
    arg0: Type,
8593
0
    arg1: Gpr,
8594
0
) -> ProducesFlags {
8595
0
    let v2 = C::temp_writable_gpr(ctx);
8596
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8597
0
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8598
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
8599
0
    let v6 = MInst::UnaryRmR {
8600
0
        size: v3.clone(),
8601
0
        op: UnaryRmROpcode::Bsf,
8602
0
        src: v5.clone(),
8603
0
        dst: v2,
8604
0
    };
8605
0
    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
8606
0
        inst: v6,
8607
0
        result: v7,
8608
0
    };
8609
0
    // Rule at src/isa/x64/inst.isle line 4130.
8610
0
    return v8;
8611
0
}
8612
8613
// Generated as internal constructor for term bsf_or_else.
8614
0
pub fn constructor_bsf_or_else<C: Context>(
8615
0
    ctx: &mut C,
8616
0
    arg0: Type,
8617
0
    arg1: Gpr,
8618
0
    arg2: Gpr,
8619
0
) -> Gpr {
8620
0
    let v3 = &constructor_x64_bsf(ctx, arg0, arg1);
8621
0
    let v4 = constructor_produces_flags_get_reg(ctx, v3);
8622
0
    let v5 = C::gpr_new(ctx, v4);
8623
0
    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
8624
0
    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
8625
0
    let v9 = &constructor_produces_flags_ignore(ctx, v3);
8626
0
    let v10 = constructor_with_flags_reg(ctx, v9, v8);
8627
0
    let v11 = C::gpr_new(ctx, v10);
8628
0
    // Rule at src/isa/x64/inst.isle line 4139.
8629
0
    return v11;
8630
0
}
8631
8632
// Generated as internal constructor for term x64_blsi.
8633
0
pub fn constructor_x64_blsi<C: Context>(
8634
0
    ctx: &mut C,
8635
0
    arg0: Type,
8636
0
    arg1: &GprMem,
8637
0
) -> Gpr {
8638
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8639
0
    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsi, arg1, v3);
8640
0
    // Rule at src/isa/x64/inst.isle line 4150.
8641
0
    return v4;
8642
0
}
8643
8644
// Generated as internal constructor for term x64_blsmsk.
8645
0
pub fn constructor_x64_blsmsk<C: Context>(
8646
0
    ctx: &mut C,
8647
0
    arg0: Type,
8648
0
    arg1: &GprMem,
8649
0
) -> Gpr {
8650
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8651
0
    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsmsk, arg1, v3);
8652
0
    // Rule at src/isa/x64/inst.isle line 4155.
8653
0
    return v4;
8654
0
}
8655
8656
// Generated as internal constructor for term x64_blsr.
8657
58
pub fn constructor_x64_blsr<C: Context>(
8658
58
    ctx: &mut C,
8659
58
    arg0: Type,
8660
58
    arg1: &GprMem,
8661
58
) -> Gpr {
8662
58
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8663
58
    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsr, arg1, v3);
8664
58
    // Rule at src/isa/x64/inst.isle line 4160.
8665
58
    return v4;
8666
58
}
8667
8668
// Generated as internal constructor for term x64_sarx.
8669
0
pub fn constructor_x64_sarx<C: Context>(
8670
0
    ctx: &mut C,
8671
0
    arg0: Type,
8672
0
    arg1: &GprMem,
8673
0
    arg2: Gpr,
8674
0
) -> Gpr {
8675
0
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Sarx, arg2, arg1);
8676
0
    // Rule at src/isa/x64/inst.isle line 4165.
8677
0
    return v4;
8678
0
}
8679
8680
// Generated as internal constructor for term x64_shrx.
8681
536
pub fn constructor_x64_shrx<C: Context>(
8682
536
    ctx: &mut C,
8683
536
    arg0: Type,
8684
536
    arg1: &GprMem,
8685
536
    arg2: Gpr,
8686
536
) -> Gpr {
8687
536
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Shrx, arg2, arg1);
8688
536
    // Rule at src/isa/x64/inst.isle line 4170.
8689
536
    return v4;
8690
536
}
8691
8692
// Generated as internal constructor for term x64_shlx.
8693
452
pub fn constructor_x64_shlx<C: Context>(
8694
452
    ctx: &mut C,
8695
452
    arg0: Type,
8696
452
    arg1: &GprMem,
8697
452
    arg2: Gpr,
8698
452
) -> Gpr {
8699
452
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Shlx, arg2, arg1);
8700
452
    // Rule at src/isa/x64/inst.isle line 4175.
8701
452
    return v4;
8702
452
}
8703
8704
// Generated as internal constructor for term x64_rorx.
8705
957
pub fn constructor_x64_rorx<C: Context>(
8706
957
    ctx: &mut C,
8707
957
    arg0: Type,
8708
957
    arg1: &GprMem,
8709
957
    arg2: u8,
8710
957
) -> Gpr {
8711
957
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
8712
957
    let v5 = constructor_unary_rm_r_imm_vex(ctx, &UnaryRmRImmVexOpcode::Rorx, arg1, v4, arg2);
8713
957
    // Rule at src/isa/x64/inst.isle line 4180.
8714
957
    return v5;
8715
957
}
8716
8717
// Generated as internal constructor for term x64_popcnt.
8718
89
pub fn constructor_x64_popcnt<C: Context>(
8719
89
    ctx: &mut C,
8720
89
    arg0: Type,
8721
89
    arg1: Gpr,
8722
89
) -> Gpr {
8723
89
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8724
89
    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Popcnt, arg1, v3);
8725
89
    // Rule at src/isa/x64/inst.isle line 4188.
8726
89
    return v4;
8727
89
}
8728
8729
// Generated as internal constructor for term x64_minss.
8730
0
pub fn constructor_x64_minss<C: Context>(
8731
0
    ctx: &mut C,
8732
0
    arg0: Xmm,
8733
0
    arg1: &XmmMem,
8734
0
) -> Xmm {
8735
0
    let v4 = C::use_avx(ctx);
8736
0
    if v4 == true {
8737
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8738
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminss, arg0, v6);
8739
0
        // Rule at src/isa/x64/inst.isle line 4195.
8740
0
        return v7;
8741
0
    }
8742
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minss, arg0, arg1);
8743
0
    // Rule at src/isa/x64/inst.isle line 4193.
8744
0
    return v3;
8745
0
}
8746
8747
// Generated as internal constructor for term x64_minsd.
8748
0
pub fn constructor_x64_minsd<C: Context>(
8749
0
    ctx: &mut C,
8750
0
    arg0: Xmm,
8751
0
    arg1: &XmmMem,
8752
0
) -> Xmm {
8753
0
    let v4 = C::use_avx(ctx);
8754
0
    if v4 == true {
8755
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8756
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminsd, arg0, v6);
8757
0
        // Rule at src/isa/x64/inst.isle line 4203.
8758
0
        return v7;
8759
0
    }
8760
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minsd, arg0, arg1);
8761
0
    // Rule at src/isa/x64/inst.isle line 4201.
8762
0
    return v3;
8763
0
}
8764
8765
// Generated as internal constructor for term x64_minps.
8766
0
pub fn constructor_x64_minps<C: Context>(
8767
0
    ctx: &mut C,
8768
0
    arg0: Xmm,
8769
0
    arg1: &XmmMem,
8770
0
) -> Xmm {
8771
0
    let v5 = C::use_avx(ctx);
8772
0
    if v5 == true {
8773
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8774
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminps, arg0, v7);
8775
0
        // Rule at src/isa/x64/inst.isle line 4211.
8776
0
        return v8;
8777
0
    }
8778
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8779
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minps, arg0, v3);
8780
0
    // Rule at src/isa/x64/inst.isle line 4209.
8781
0
    return v4;
8782
0
}
8783
8784
// Generated as internal constructor for term x64_minpd.
8785
0
pub fn constructor_x64_minpd<C: Context>(
8786
0
    ctx: &mut C,
8787
0
    arg0: Xmm,
8788
0
    arg1: &XmmMem,
8789
0
) -> Xmm {
8790
0
    let v5 = C::use_avx(ctx);
8791
0
    if v5 == true {
8792
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8793
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminpd, arg0, v7);
8794
0
        // Rule at src/isa/x64/inst.isle line 4219.
8795
0
        return v8;
8796
0
    }
8797
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8798
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minpd, arg0, v3);
8799
0
    // Rule at src/isa/x64/inst.isle line 4217.
8800
0
    return v4;
8801
0
}
8802
8803
// Generated as internal constructor for term x64_maxss.
8804
0
pub fn constructor_x64_maxss<C: Context>(
8805
0
    ctx: &mut C,
8806
0
    arg0: Xmm,
8807
0
    arg1: &XmmMem,
8808
0
) -> Xmm {
8809
0
    let v4 = C::use_avx(ctx);
8810
0
    if v4 == true {
8811
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8812
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxss, arg0, v6);
8813
0
        // Rule at src/isa/x64/inst.isle line 4227.
8814
0
        return v7;
8815
0
    }
8816
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxss, arg0, arg1);
8817
0
    // Rule at src/isa/x64/inst.isle line 4225.
8818
0
    return v3;
8819
0
}
8820
8821
// Generated as internal constructor for term x64_maxsd.
8822
0
pub fn constructor_x64_maxsd<C: Context>(
8823
0
    ctx: &mut C,
8824
0
    arg0: Xmm,
8825
0
    arg1: &XmmMem,
8826
0
) -> Xmm {
8827
0
    let v4 = C::use_avx(ctx);
8828
0
    if v4 == true {
8829
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8830
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxsd, arg0, v6);
8831
0
        // Rule at src/isa/x64/inst.isle line 4235.
8832
0
        return v7;
8833
0
    }
8834
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxsd, arg0, arg1);
8835
0
    // Rule at src/isa/x64/inst.isle line 4233.
8836
0
    return v3;
8837
0
}
8838
8839
// Generated as internal constructor for term x64_maxps.
8840
0
pub fn constructor_x64_maxps<C: Context>(
8841
0
    ctx: &mut C,
8842
0
    arg0: Xmm,
8843
0
    arg1: &XmmMem,
8844
0
) -> Xmm {
8845
0
    let v5 = C::use_avx(ctx);
8846
0
    if v5 == true {
8847
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8848
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxps, arg0, v7);
8849
0
        // Rule at src/isa/x64/inst.isle line 4243.
8850
0
        return v8;
8851
0
    }
8852
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8853
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxps, arg0, v3);
8854
0
    // Rule at src/isa/x64/inst.isle line 4241.
8855
0
    return v4;
8856
0
}
8857
8858
// Generated as internal constructor for term x64_maxpd.
8859
0
pub fn constructor_x64_maxpd<C: Context>(
8860
0
    ctx: &mut C,
8861
0
    arg0: Xmm,
8862
0
    arg1: &XmmMem,
8863
0
) -> Xmm {
8864
0
    let v5 = C::use_avx(ctx);
8865
0
    if v5 == true {
8866
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8867
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxpd, arg0, v7);
8868
0
        // Rule at src/isa/x64/inst.isle line 4251.
8869
0
        return v8;
8870
0
    }
8871
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8872
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxpd, arg0, v3);
8873
0
    // Rule at src/isa/x64/inst.isle line 4249.
8874
0
    return v4;
8875
0
}
8876
8877
// Generated as internal constructor for term x64_vfmadd213.
8878
0
pub fn constructor_x64_vfmadd213<C: Context>(
8879
0
    ctx: &mut C,
8880
0
    arg0: Type,
8881
0
    arg1: Xmm,
8882
0
    arg2: Xmm,
8883
0
    arg3: &XmmMem,
8884
0
) -> Xmm {
8885
0
    match arg0 {
8886
        F32 => {
8887
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ss, arg1, arg2, arg3);
8888
0
            // Rule at src/isa/x64/inst.isle line 4257.
8889
0
            return v5;
8890
        }
8891
        F64 => {
8892
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213sd, arg1, arg2, arg3);
8893
0
            // Rule at src/isa/x64/inst.isle line 4258.
8894
0
            return v7;
8895
        }
8896
        F32X4 => {
8897
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ps, arg1, arg2, arg3);
8898
0
            // Rule at src/isa/x64/inst.isle line 4259.
8899
0
            return v9;
8900
        }
8901
        F64X2 => {
8902
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213pd, arg1, arg2, arg3);
8903
0
            // Rule at src/isa/x64/inst.isle line 4260.
8904
0
            return v11;
8905
        }
8906
0
        _ => {}
8907
0
    }
8908
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfmadd213", "src/isa/x64/inst.isle line 4256")
8909
0
}
8910
8911
// Generated as internal constructor for term x64_vfmadd132.
8912
0
pub fn constructor_x64_vfmadd132<C: Context>(
8913
0
    ctx: &mut C,
8914
0
    arg0: Type,
8915
0
    arg1: Xmm,
8916
0
    arg2: Xmm,
8917
0
    arg3: &XmmMem,
8918
0
) -> Xmm {
8919
0
    match arg0 {
8920
        F32 => {
8921
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ss, arg1, arg2, arg3);
8922
0
            // Rule at src/isa/x64/inst.isle line 4264.
8923
0
            return v5;
8924
        }
8925
        F64 => {
8926
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132sd, arg1, arg2, arg3);
8927
0
            // Rule at src/isa/x64/inst.isle line 4265.
8928
0
            return v7;
8929
        }
8930
        F32X4 => {
8931
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ps, arg1, arg2, arg3);
8932
0
            // Rule at src/isa/x64/inst.isle line 4266.
8933
0
            return v9;
8934
        }
8935
        F64X2 => {
8936
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132pd, arg1, arg2, arg3);
8937
0
            // Rule at src/isa/x64/inst.isle line 4267.
8938
0
            return v11;
8939
        }
8940
0
        _ => {}
8941
0
    }
8942
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfmadd132", "src/isa/x64/inst.isle line 4263")
8943
0
}
8944
8945
// Generated as internal constructor for term x64_vfnmadd213.
8946
0
pub fn constructor_x64_vfnmadd213<C: Context>(
8947
0
    ctx: &mut C,
8948
0
    arg0: Type,
8949
0
    arg1: Xmm,
8950
0
    arg2: Xmm,
8951
0
    arg3: &XmmMem,
8952
0
) -> Xmm {
8953
0
    match arg0 {
8954
        F32 => {
8955
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ss, arg1, arg2, arg3);
8956
0
            // Rule at src/isa/x64/inst.isle line 4271.
8957
0
            return v5;
8958
        }
8959
        F64 => {
8960
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213sd, arg1, arg2, arg3);
8961
0
            // Rule at src/isa/x64/inst.isle line 4272.
8962
0
            return v7;
8963
        }
8964
        F32X4 => {
8965
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ps, arg1, arg2, arg3);
8966
0
            // Rule at src/isa/x64/inst.isle line 4273.
8967
0
            return v9;
8968
        }
8969
        F64X2 => {
8970
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213pd, arg1, arg2, arg3);
8971
0
            // Rule at src/isa/x64/inst.isle line 4274.
8972
0
            return v11;
8973
        }
8974
0
        _ => {}
8975
0
    }
8976
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfnmadd213", "src/isa/x64/inst.isle line 4270")
8977
0
}
8978
8979
// Generated as internal constructor for term x64_vfnmadd132.
8980
0
pub fn constructor_x64_vfnmadd132<C: Context>(
8981
0
    ctx: &mut C,
8982
0
    arg0: Type,
8983
0
    arg1: Xmm,
8984
0
    arg2: Xmm,
8985
0
    arg3: &XmmMem,
8986
0
) -> Xmm {
8987
0
    match arg0 {
8988
        F32 => {
8989
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ss, arg1, arg2, arg3);
8990
0
            // Rule at src/isa/x64/inst.isle line 4278.
8991
0
            return v5;
8992
        }
8993
        F64 => {
8994
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132sd, arg1, arg2, arg3);
8995
0
            // Rule at src/isa/x64/inst.isle line 4279.
8996
0
            return v7;
8997
        }
8998
        F32X4 => {
8999
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ps, arg1, arg2, arg3);
9000
0
            // Rule at src/isa/x64/inst.isle line 4280.
9001
0
            return v9;
9002
        }
9003
        F64X2 => {
9004
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132pd, arg1, arg2, arg3);
9005
0
            // Rule at src/isa/x64/inst.isle line 4281.
9006
0
            return v11;
9007
        }
9008
0
        _ => {}
9009
0
    }
9010
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfnmadd132", "src/isa/x64/inst.isle line 4277")
9011
0
}
9012
9013
// Generated as internal constructor for term x64_sqrtss.
9014
0
pub fn constructor_x64_sqrtss<C: Context>(
9015
0
    ctx: &mut C,
9016
0
    arg0: &XmmMem,
9017
0
) -> Xmm {
9018
0
    let v3 = C::use_avx(ctx);
9019
0
    if v3 == true {
9020
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtss, arg0);
9021
0
        // Rule at src/isa/x64/inst.isle line 4286.
9022
0
        return v5;
9023
0
    }
9024
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtss, arg0);
9025
0
    // Rule at src/isa/x64/inst.isle line 4285.
9026
0
    return v2;
9027
0
}
9028
9029
// Generated as internal constructor for term x64_sqrtsd.
9030
0
pub fn constructor_x64_sqrtsd<C: Context>(
9031
0
    ctx: &mut C,
9032
0
    arg0: &XmmMem,
9033
0
) -> Xmm {
9034
0
    let v3 = C::use_avx(ctx);
9035
0
    if v3 == true {
9036
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtsd, arg0);
9037
0
        // Rule at src/isa/x64/inst.isle line 4293.
9038
0
        return v5;
9039
0
    }
9040
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtsd, arg0);
9041
0
    // Rule at src/isa/x64/inst.isle line 4292.
9042
0
    return v2;
9043
0
}
9044
9045
// Generated as internal constructor for term x64_sqrtps.
9046
0
pub fn constructor_x64_sqrtps<C: Context>(
9047
0
    ctx: &mut C,
9048
0
    arg0: &XmmMem,
9049
0
) -> Xmm {
9050
0
    let v4 = C::use_avx(ctx);
9051
0
    if v4 == true {
9052
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtps, arg0);
9053
0
        // Rule at src/isa/x64/inst.isle line 4300.
9054
0
        return v6;
9055
0
    }
9056
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9057
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtps, v2);
9058
0
    // Rule at src/isa/x64/inst.isle line 4299.
9059
0
    return v3;
9060
0
}
9061
9062
// Generated as internal constructor for term x64_sqrtpd.
9063
0
pub fn constructor_x64_sqrtpd<C: Context>(
9064
0
    ctx: &mut C,
9065
0
    arg0: &XmmMem,
9066
0
) -> Xmm {
9067
0
    let v4 = C::use_avx(ctx);
9068
0
    if v4 == true {
9069
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtpd, arg0);
9070
0
        // Rule at src/isa/x64/inst.isle line 4307.
9071
0
        return v6;
9072
0
    }
9073
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9074
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtpd, v2);
9075
0
    // Rule at src/isa/x64/inst.isle line 4306.
9076
0
    return v3;
9077
0
}
9078
9079
// Generated as internal constructor for term x64_cvtss2sd.
9080
0
pub fn constructor_x64_cvtss2sd<C: Context>(
9081
0
    ctx: &mut C,
9082
0
    arg0: &XmmMem,
9083
0
) -> Xmm {
9084
0
    let v3 = C::use_avx(ctx);
9085
0
    if v3 == true {
9086
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtss2sd, arg0);
9087
0
        // Rule at src/isa/x64/inst.isle line 4314.
9088
0
        return v5;
9089
0
    }
9090
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtss2sd, arg0);
9091
0
    // Rule at src/isa/x64/inst.isle line 4313.
9092
0
    return v2;
9093
0
}
9094
9095
// Generated as internal constructor for term x64_cvtsd2ss.
9096
0
pub fn constructor_x64_cvtsd2ss<C: Context>(
9097
0
    ctx: &mut C,
9098
0
    arg0: &XmmMem,
9099
0
) -> Xmm {
9100
0
    let v3 = C::use_avx(ctx);
9101
0
    if v3 == true {
9102
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtsd2ss, arg0);
9103
0
        // Rule at src/isa/x64/inst.isle line 4321.
9104
0
        return v5;
9105
0
    }
9106
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtsd2ss, arg0);
9107
0
    // Rule at src/isa/x64/inst.isle line 4320.
9108
0
    return v2;
9109
0
}
9110
9111
// Generated as internal constructor for term x64_cvtdq2ps.
9112
0
pub fn constructor_x64_cvtdq2ps<C: Context>(
9113
0
    ctx: &mut C,
9114
0
    arg0: &XmmMem,
9115
0
) -> Xmm {
9116
0
    let v4 = C::use_avx(ctx);
9117
0
    if v4 == true {
9118
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2ps, arg0);
9119
0
        // Rule at src/isa/x64/inst.isle line 4328.
9120
0
        return v6;
9121
0
    }
9122
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9123
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2ps, v2);
9124
0
    // Rule at src/isa/x64/inst.isle line 4327.
9125
0
    return v3;
9126
0
}
9127
9128
// Generated as internal constructor for term x64_cvtps2pd.
9129
0
pub fn constructor_x64_cvtps2pd<C: Context>(
9130
0
    ctx: &mut C,
9131
0
    arg0: &XmmMem,
9132
0
) -> Xmm {
9133
0
    let v4 = C::use_avx(ctx);
9134
0
    if v4 == true {
9135
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtps2pd, arg0);
9136
0
        // Rule at src/isa/x64/inst.isle line 4335.
9137
0
        return v6;
9138
0
    }
9139
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9140
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtps2pd, v2);
9141
0
    // Rule at src/isa/x64/inst.isle line 4334.
9142
0
    return v3;
9143
0
}
9144
9145
// Generated as internal constructor for term x64_cvtpd2ps.
9146
0
pub fn constructor_x64_cvtpd2ps<C: Context>(
9147
0
    ctx: &mut C,
9148
0
    arg0: &XmmMem,
9149
0
) -> Xmm {
9150
0
    let v4 = C::use_avx(ctx);
9151
0
    if v4 == true {
9152
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtpd2ps, arg0);
9153
0
        // Rule at src/isa/x64/inst.isle line 4342.
9154
0
        return v6;
9155
0
    }
9156
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9157
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtpd2ps, v2);
9158
0
    // Rule at src/isa/x64/inst.isle line 4341.
9159
0
    return v3;
9160
0
}
9161
9162
// Generated as internal constructor for term x64_cvtdq2pd.
9163
0
pub fn constructor_x64_cvtdq2pd<C: Context>(
9164
0
    ctx: &mut C,
9165
0
    arg0: &XmmMem,
9166
0
) -> Xmm {
9167
0
    let v4 = C::use_avx(ctx);
9168
0
    if v4 == true {
9169
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2pd, arg0);
9170
0
        // Rule at src/isa/x64/inst.isle line 4349.
9171
0
        return v6;
9172
0
    }
9173
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9174
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2pd, v2);
9175
0
    // Rule at src/isa/x64/inst.isle line 4348.
9176
0
    return v3;
9177
0
}
9178
9179
// Generated as internal constructor for term x64_cvtsi2ss.
9180
0
pub fn constructor_x64_cvtsi2ss<C: Context>(
9181
0
    ctx: &mut C,
9182
0
    arg0: Type,
9183
0
    arg1: Xmm,
9184
0
    arg2: &GprMem,
9185
0
) -> Xmm {
9186
0
    let v6 = C::use_avx(ctx);
9187
0
    if v6 == true {
9188
0
        let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9189
0
        let v8 = constructor_cvt_int_to_float_vex(ctx, &AvxOpcode::Vcvtsi2ss, arg1, arg2, v4);
9190
0
        // Rule at src/isa/x64/inst.isle line 4357.
9191
0
        return v8;
9192
0
    }
9193
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9194
0
    let v5 = constructor_cvt_int_to_float(ctx, &SseOpcode::Cvtsi2ss, arg1, arg2, v4);
9195
0
    // Rule at src/isa/x64/inst.isle line 4355.
9196
0
    return v5;
9197
0
}
9198
9199
// Generated as internal constructor for term x64_cvtsi2sd.
9200
0
pub fn constructor_x64_cvtsi2sd<C: Context>(
9201
0
    ctx: &mut C,
9202
0
    arg0: Type,
9203
0
    arg1: Xmm,
9204
0
    arg2: &GprMem,
9205
0
) -> Xmm {
9206
0
    let v6 = C::use_avx(ctx);
9207
0
    if v6 == true {
9208
0
        let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9209
0
        let v8 = constructor_cvt_int_to_float_vex(ctx, &AvxOpcode::Vcvtsi2sd, arg1, arg2, v4);
9210
0
        // Rule at src/isa/x64/inst.isle line 4365.
9211
0
        return v8;
9212
0
    }
9213
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9214
0
    let v5 = constructor_cvt_int_to_float(ctx, &SseOpcode::Cvtsi2sd, arg1, arg2, v4);
9215
0
    // Rule at src/isa/x64/inst.isle line 4363.
9216
0
    return v5;
9217
0
}
9218
9219
// Generated as internal constructor for term x64_cvttps2dq.
9220
0
pub fn constructor_x64_cvttps2dq<C: Context>(
9221
0
    ctx: &mut C,
9222
0
    arg0: &XmmMem,
9223
0
) -> Xmm {
9224
0
    let v4 = C::use_avx(ctx);
9225
0
    if v4 == true {
9226
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttps2dq, arg0);
9227
0
        // Rule at src/isa/x64/inst.isle line 4373.
9228
0
        return v6;
9229
0
    }
9230
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9231
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttps2dq, v2);
9232
0
    // Rule at src/isa/x64/inst.isle line 4371.
9233
0
    return v3;
9234
0
}
9235
9236
// Generated as internal constructor for term x64_cvttpd2dq.
9237
0
pub fn constructor_x64_cvttpd2dq<C: Context>(
9238
0
    ctx: &mut C,
9239
0
    arg0: &XmmMem,
9240
0
) -> Xmm {
9241
0
    let v4 = C::use_avx(ctx);
9242
0
    if v4 == true {
9243
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttpd2dq, arg0);
9244
0
        // Rule at src/isa/x64/inst.isle line 4381.
9245
0
        return v6;
9246
0
    }
9247
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9248
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttpd2dq, v2);
9249
0
    // Rule at src/isa/x64/inst.isle line 4379.
9250
0
    return v3;
9251
0
}
9252
9253
// Generated as internal constructor for term x64_pcmpeq.
9254
0
pub fn constructor_x64_pcmpeq<C: Context>(
9255
0
    ctx: &mut C,
9256
0
    arg0: Type,
9257
0
    arg1: Xmm,
9258
0
    arg2: &XmmMem,
9259
0
) -> Xmm {
9260
0
    match arg0 {
9261
        I8X16 => {
9262
0
            let v3 = constructor_x64_pcmpeqb(ctx, arg1, arg2);
9263
0
            // Rule at src/isa/x64/inst.isle line 4387.
9264
0
            return v3;
9265
        }
9266
        I16X8 => {
9267
0
            let v4 = constructor_x64_pcmpeqw(ctx, arg1, arg2);
9268
0
            // Rule at src/isa/x64/inst.isle line 4388.
9269
0
            return v4;
9270
        }
9271
        I32X4 => {
9272
0
            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
9273
0
            // Rule at src/isa/x64/inst.isle line 4389.
9274
0
            return v5;
9275
        }
9276
        I64X2 => {
9277
0
            let v6 = C::use_sse41(ctx);
9278
0
            if v6 == true {
9279
0
                let v7 = constructor_x64_pcmpeqq(ctx, arg1, arg2);
9280
0
                // Rule at src/isa/x64/inst.isle line 4390.
9281
0
                return v7;
9282
0
            }
9283
0
            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
9284
0
            let v8 = &C::xmm_to_xmm_mem(ctx, v5);
9285
0
            let v10 = constructor_x64_pshufd(ctx, v8, 0xB1);
9286
0
            let v11 = &C::xmm_to_xmm_mem(ctx, v10);
9287
0
            let v12 = constructor_x64_pand(ctx, v5, v11);
9288
0
            // Rule at src/isa/x64/inst.isle line 4399.
9289
0
            return v12;
9290
        }
9291
0
        _ => {}
9292
0
    }
9293
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pcmpeq", "src/isa/x64/inst.isle line 4386")
9294
0
}
9295
9296
// Generated as internal constructor for term x64_pcmpeqb.
9297
0
pub fn constructor_x64_pcmpeqb<C: Context>(
9298
0
    ctx: &mut C,
9299
0
    arg0: Xmm,
9300
0
    arg1: &XmmMem,
9301
0
) -> Xmm {
9302
0
    let v5 = C::use_avx(ctx);
9303
0
    if v5 == true {
9304
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9305
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqb, arg0, v7);
9306
0
        // Rule at src/isa/x64/inst.isle line 4406.
9307
0
        return v8;
9308
0
    }
9309
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9310
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqb, arg0, v3);
9311
0
    // Rule at src/isa/x64/inst.isle line 4405.
9312
0
    return v4;
9313
0
}
9314
9315
// Generated as internal constructor for term x64_pcmpeqw.
9316
0
pub fn constructor_x64_pcmpeqw<C: Context>(
9317
0
    ctx: &mut C,
9318
0
    arg0: Xmm,
9319
0
    arg1: &XmmMem,
9320
0
) -> Xmm {
9321
0
    let v5 = C::use_avx(ctx);
9322
0
    if v5 == true {
9323
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9324
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqw, arg0, v7);
9325
0
        // Rule at src/isa/x64/inst.isle line 4411.
9326
0
        return v8;
9327
0
    }
9328
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9329
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqw, arg0, v3);
9330
0
    // Rule at src/isa/x64/inst.isle line 4410.
9331
0
    return v4;
9332
0
}
9333
9334
// Generated as internal constructor for term x64_pcmpeqd.
9335
0
pub fn constructor_x64_pcmpeqd<C: Context>(
9336
0
    ctx: &mut C,
9337
0
    arg0: Xmm,
9338
0
    arg1: &XmmMem,
9339
0
) -> Xmm {
9340
0
    let v5 = C::use_avx(ctx);
9341
0
    if v5 == true {
9342
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9343
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqd, arg0, v7);
9344
0
        // Rule at src/isa/x64/inst.isle line 4416.
9345
0
        return v8;
9346
0
    }
9347
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9348
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqd, arg0, v3);
9349
0
    // Rule at src/isa/x64/inst.isle line 4415.
9350
0
    return v4;
9351
0
}
9352
9353
// Generated as internal constructor for term x64_pcmpeqq.
9354
0
pub fn constructor_x64_pcmpeqq<C: Context>(
9355
0
    ctx: &mut C,
9356
0
    arg0: Xmm,
9357
0
    arg1: &XmmMem,
9358
0
) -> Xmm {
9359
0
    let v5 = C::use_avx(ctx);
9360
0
    if v5 == true {
9361
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9362
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqq, arg0, v7);
9363
0
        // Rule at src/isa/x64/inst.isle line 4421.
9364
0
        return v8;
9365
0
    }
9366
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9367
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqq, arg0, v3);
9368
0
    // Rule at src/isa/x64/inst.isle line 4420.
9369
0
    return v4;
9370
0
}
9371
9372
// Generated as internal constructor for term x64_pcmpgt.
9373
0
pub fn constructor_x64_pcmpgt<C: Context>(
9374
0
    ctx: &mut C,
9375
0
    arg0: Type,
9376
0
    arg1: Xmm,
9377
0
    arg2: &XmmMem,
9378
0
) -> Xmm {
9379
0
    match arg0 {
9380
        I8X16 => {
9381
0
            let v3 = constructor_x64_pcmpgtb(ctx, arg1, arg2);
9382
0
            // Rule at src/isa/x64/inst.isle line 4427.
9383
0
            return v3;
9384
        }
9385
        I16X8 => {
9386
0
            let v4 = constructor_x64_pcmpgtw(ctx, arg1, arg2);
9387
0
            // Rule at src/isa/x64/inst.isle line 4428.
9388
0
            return v4;
9389
        }
9390
        I32X4 => {
9391
0
            let v5 = constructor_x64_pcmpgtd(ctx, arg1, arg2);
9392
0
            // Rule at src/isa/x64/inst.isle line 4429.
9393
0
            return v5;
9394
        }
9395
        I64X2 => {
9396
0
            let v6 = C::use_sse42(ctx);
9397
0
            if v6 == true {
9398
0
                let v7 = constructor_x64_pcmpgtq(ctx, arg1, arg2);
9399
0
                // Rule at src/isa/x64/inst.isle line 4433.
9400
0
                return v7;
9401
0
            }
9402
0
            let v9 = C::emit_u128_le_const(ctx, 0x800000000000000080000000);
9403
0
            let v10 = &constructor_const_to_xmm_mem(ctx, v9);
9404
0
            let v11 = constructor_x64_movdqu_load(ctx, v10);
9405
0
            let v12 = &C::xmm_to_xmm_mem(ctx, arg1);
9406
0
            let v13 = constructor_x64_pxor(ctx, v11, v12);
9407
0
            let v14 = constructor_x64_pxor(ctx, v11, arg2);
9408
0
            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
9409
0
            let v16 = constructor_x64_pcmpgtd(ctx, v13, v15);
9410
0
            let v17 = &C::xmm_to_xmm_mem(ctx, v16);
9411
0
            let v19 = constructor_x64_pshufd(ctx, v17, 0xA0);
9412
0
            let v20 = &C::xmm_to_xmm_mem(ctx, v16);
9413
0
            let v22 = constructor_x64_pshufd(ctx, v20, 0xF5);
9414
0
            let v23 = &C::xmm_to_xmm_mem(ctx, v14);
9415
0
            let v24 = constructor_x64_pcmpeqd(ctx, v13, v23);
9416
0
            let v25 = &C::xmm_to_xmm_mem(ctx, v24);
9417
0
            let v26 = constructor_x64_pshufd(ctx, v25, 0xF5);
9418
0
            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
9419
0
            let v28 = constructor_x64_pand(ctx, v19, v27);
9420
0
            let v29 = &C::xmm_to_xmm_mem(ctx, v22);
9421
0
            let v30 = constructor_x64_por(ctx, v28, v29);
9422
0
            // Rule at src/isa/x64/inst.isle line 4462.
9423
0
            return v30;
9424
        }
9425
0
        _ => {}
9426
0
    }
9427
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pcmpgt", "src/isa/x64/inst.isle line 4426")
9428
0
}
9429
9430
// Generated as internal constructor for term x64_pcmpgtb.
9431
0
pub fn constructor_x64_pcmpgtb<C: Context>(
9432
0
    ctx: &mut C,
9433
0
    arg0: Xmm,
9434
0
    arg1: &XmmMem,
9435
0
) -> Xmm {
9436
0
    let v5 = C::use_avx(ctx);
9437
0
    if v5 == true {
9438
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9439
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtb, arg0, v7);
9440
0
        // Rule at src/isa/x64/inst.isle line 4478.
9441
0
        return v8;
9442
0
    }
9443
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9444
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtb, arg0, v3);
9445
0
    // Rule at src/isa/x64/inst.isle line 4477.
9446
0
    return v4;
9447
0
}
9448
9449
// Generated as internal constructor for term x64_pcmpgtw.
9450
0
pub fn constructor_x64_pcmpgtw<C: Context>(
9451
0
    ctx: &mut C,
9452
0
    arg0: Xmm,
9453
0
    arg1: &XmmMem,
9454
0
) -> Xmm {
9455
0
    let v5 = C::use_avx(ctx);
9456
0
    if v5 == true {
9457
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9458
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtw, arg0, v7);
9459
0
        // Rule at src/isa/x64/inst.isle line 4483.
9460
0
        return v8;
9461
0
    }
9462
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9463
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtw, arg0, v3);
9464
0
    // Rule at src/isa/x64/inst.isle line 4482.
9465
0
    return v4;
9466
0
}
9467
9468
// Generated as internal constructor for term x64_pcmpgtd.
9469
0
pub fn constructor_x64_pcmpgtd<C: Context>(
9470
0
    ctx: &mut C,
9471
0
    arg0: Xmm,
9472
0
    arg1: &XmmMem,
9473
0
) -> Xmm {
9474
0
    let v5 = C::use_avx(ctx);
9475
0
    if v5 == true {
9476
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9477
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtd, arg0, v7);
9478
0
        // Rule at src/isa/x64/inst.isle line 4488.
9479
0
        return v8;
9480
0
    }
9481
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9482
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtd, arg0, v3);
9483
0
    // Rule at src/isa/x64/inst.isle line 4487.
9484
0
    return v4;
9485
0
}
9486
9487
// Generated as internal constructor for term x64_pcmpgtq.
9488
0
pub fn constructor_x64_pcmpgtq<C: Context>(
9489
0
    ctx: &mut C,
9490
0
    arg0: Xmm,
9491
0
    arg1: &XmmMem,
9492
0
) -> Xmm {
9493
0
    let v5 = C::use_avx(ctx);
9494
0
    if v5 == true {
9495
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9496
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtq, arg0, v7);
9497
0
        // Rule at src/isa/x64/inst.isle line 4493.
9498
0
        return v8;
9499
0
    }
9500
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9501
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtq, arg0, v3);
9502
0
    // Rule at src/isa/x64/inst.isle line 4492.
9503
0
    return v4;
9504
0
}
9505
9506
// Generated as internal constructor for term alu_rm.
9507
1.88k
pub fn constructor_alu_rm<C: Context>(
9508
1.88k
    ctx: &mut C,
9509
1.88k
    arg0: Type,
9510
1.88k
    arg1: &AluRmiROpcode,
9511
1.88k
    arg2: &Amode,
9512
1.88k
    arg3: Gpr,
9513
1.88k
) -> SideEffectNoResult {
9514
1.88k
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
9515
1.88k
    let v5 = &C::amode_to_synthetic_amode(ctx, arg2);
9516
1.88k
    let v6 = MInst::AluRM {
9517
1.88k
        size: v4.clone(),
9518
1.88k
        op: arg1.clone(),
9519
1.88k
        src1_dst: v5.clone(),
9520
1.88k
        src2: arg3,
9521
1.88k
    };
9522
1.88k
    let v7 = SideEffectNoResult::Inst {
9523
1.88k
        inst: v6,
9524
1.88k
    };
9525
1.88k
    // Rule at src/isa/x64/inst.isle line 4499.
9526
1.88k
    return v7;
9527
1.88k
}
9528
9529
// Generated as internal constructor for term x64_add_mem.
9530
1.87k
pub fn constructor_x64_add_mem<C: Context>(
9531
1.87k
    ctx: &mut C,
9532
1.87k
    arg0: Type,
9533
1.87k
    arg1: &Amode,
9534
1.87k
    arg2: Gpr,
9535
1.87k
) -> SideEffectNoResult {
9536
1.87k
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
9537
1.87k
    // Rule at src/isa/x64/inst.isle line 4504.
9538
1.87k
    return v4.clone();
9539
1.87k
}
9540
9541
// Generated as internal constructor for term x64_sub_mem.
9542
7
pub fn constructor_x64_sub_mem<C: Context>(
9543
7
    ctx: &mut C,
9544
7
    arg0: Type,
9545
7
    arg1: &Amode,
9546
7
    arg2: Gpr,
9547
7
) -> SideEffectNoResult {
9548
7
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
9549
7
    // Rule at src/isa/x64/inst.isle line 4508.
9550
7
    return v4.clone();
9551
7
}
9552
9553
// Generated as internal constructor for term x64_and_mem.
9554
0
pub fn constructor_x64_and_mem<C: Context>(
9555
0
    ctx: &mut C,
9556
0
    arg0: Type,
9557
0
    arg1: &Amode,
9558
0
    arg2: Gpr,
9559
0
) -> SideEffectNoResult {
9560
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
9561
0
    // Rule at src/isa/x64/inst.isle line 4512.
9562
0
    return v4.clone();
9563
0
}
9564
9565
// Generated as internal constructor for term x64_or_mem.
9566
0
pub fn constructor_x64_or_mem<C: Context>(
9567
0
    ctx: &mut C,
9568
0
    arg0: Type,
9569
0
    arg1: &Amode,
9570
0
    arg2: Gpr,
9571
0
) -> SideEffectNoResult {
9572
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
9573
0
    // Rule at src/isa/x64/inst.isle line 4516.
9574
0
    return v4.clone();
9575
0
}
9576
9577
// Generated as internal constructor for term x64_xor_mem.
9578
0
pub fn constructor_x64_xor_mem<C: Context>(
9579
0
    ctx: &mut C,
9580
0
    arg0: Type,
9581
0
    arg1: &Amode,
9582
0
    arg2: Gpr,
9583
0
) -> SideEffectNoResult {
9584
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
9585
0
    // Rule at src/isa/x64/inst.isle line 4520.
9586
0
    return v4.clone();
9587
0
}
9588
9589
// Generated as internal constructor for term trap_if.
9590
0
pub fn constructor_trap_if<C: Context>(
9591
0
    ctx: &mut C,
9592
0
    arg0: &CC,
9593
0
    arg1: &TrapCode,
9594
0
) -> ConsumesFlags {
9595
0
    let v2 = MInst::TrapIf {
9596
0
        cc: arg0.clone(),
9597
0
        trap_code: arg1.clone(),
9598
0
    };
9599
0
    let v3 = ConsumesFlags::ConsumesFlagsSideEffect {
9600
0
        inst: v2,
9601
0
    };
9602
0
    // Rule at src/isa/x64/inst.isle line 4525.
9603
0
    return v3;
9604
0
}
9605
9606
// Generated as internal constructor for term trap_if_and.
9607
0
pub fn constructor_trap_if_and<C: Context>(
9608
0
    ctx: &mut C,
9609
0
    arg0: &CC,
9610
0
    arg1: &CC,
9611
0
    arg2: &TrapCode,
9612
0
) -> ConsumesFlags {
9613
0
    let v3 = MInst::TrapIfAnd {
9614
0
        cc1: arg0.clone(),
9615
0
        cc2: arg1.clone(),
9616
0
        trap_code: arg2.clone(),
9617
0
    };
9618
0
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9619
0
        inst: v3,
9620
0
    };
9621
0
    // Rule at src/isa/x64/inst.isle line 4530.
9622
0
    return v4;
9623
0
}
9624
9625
// Generated as internal constructor for term trap_if_or.
9626
0
pub fn constructor_trap_if_or<C: Context>(
9627
0
    ctx: &mut C,
9628
0
    arg0: &CC,
9629
0
    arg1: &CC,
9630
0
    arg2: &TrapCode,
9631
0
) -> ConsumesFlags {
9632
0
    let v3 = MInst::TrapIfOr {
9633
0
        cc1: arg0.clone(),
9634
0
        cc2: arg1.clone(),
9635
0
        trap_code: arg2.clone(),
9636
0
    };
9637
0
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9638
0
        inst: v3,
9639
0
    };
9640
0
    // Rule at src/isa/x64/inst.isle line 4535.
9641
0
    return v4;
9642
0
}
9643
9644
// Generated as internal constructor for term trap_if_icmp.
9645
0
pub fn constructor_trap_if_icmp<C: Context>(
9646
0
    ctx: &mut C,
9647
0
    arg0: &IcmpCondResult,
9648
0
    arg1: &TrapCode,
9649
0
) -> SideEffectNoResult {
9650
0
    if let &IcmpCondResult::Condition {
9651
0
        producer: ref v1,
9652
0
        cc: ref v2,
9653
0
    } = arg0 {
9654
0
        let v4 = &constructor_trap_if(ctx, v2, arg1);
9655
0
        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
9656
0
        // Rule at src/isa/x64/inst.isle line 4539.
9657
0
        return v5.clone();
9658
0
    }
9659
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "trap_if_icmp", "src/isa/x64/inst.isle line 4538")
9660
0
}
9661
9662
// Generated as internal constructor for term trap_if_fcmp.
9663
0
pub fn constructor_trap_if_fcmp<C: Context>(
9664
0
    ctx: &mut C,
9665
0
    arg0: &FcmpCondResult,
9666
0
    arg1: &TrapCode,
9667
0
) -> SideEffectNoResult {
9668
0
    match arg0 {
9669
        &FcmpCondResult::Condition {
9670
0
            producer: ref v1,
9671
0
            cc: ref v2,
9672
0
        } => {
9673
0
            let v4 = &constructor_trap_if(ctx, v2, arg1);
9674
0
            let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
9675
0
            // Rule at src/isa/x64/inst.isle line 4543.
9676
0
            return v5.clone();
9677
        }
9678
        &FcmpCondResult::AndCondition {
9679
0
            producer: ref v6,
9680
0
            cc1: ref v7,
9681
0
            cc2: ref v8,
9682
0
        } => {
9683
0
            let v9 = &constructor_trap_if_and(ctx, v7, v8, arg1);
9684
0
            let v10 = &constructor_with_flags_side_effect(ctx, v6, v9);
9685
0
            // Rule at src/isa/x64/inst.isle line 4545.
9686
0
            return v10.clone();
9687
        }
9688
        &FcmpCondResult::OrCondition {
9689
0
            producer: ref v11,
9690
0
            cc1: ref v12,
9691
0
            cc2: ref v13,
9692
0
        } => {
9693
0
            let v14 = &constructor_trap_if_or(ctx, v12, v13, arg1);
9694
0
            let v15 = &constructor_with_flags_side_effect(ctx, v11, v14);
9695
0
            // Rule at src/isa/x64/inst.isle line 4547.
9696
0
            return v15.clone();
9697
        }
9698
0
        _ => {}
9699
0
    }
9700
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "trap_if_fcmp", "src/isa/x64/inst.isle line 4542")
9701
0
}
9702
9703
// Generated as internal constructor for term x64_movddup.
9704
0
pub fn constructor_x64_movddup<C: Context>(
9705
0
    ctx: &mut C,
9706
0
    arg0: &XmmMem,
9707
0
) -> Xmm {
9708
0
    let v3 = C::use_avx(ctx);
9709
0
    if v3 == true {
9710
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovddup, arg0);
9711
0
        // Rule at src/isa/x64/inst.isle line 4554.
9712
0
        return v5;
9713
0
    }
9714
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movddup, arg0);
9715
0
    // Rule at src/isa/x64/inst.isle line 4552.
9716
0
    return v2;
9717
0
}
9718
9719
// Generated as internal constructor for term x64_vpbroadcastb.
9720
0
pub fn constructor_x64_vpbroadcastb<C: Context>(
9721
0
    ctx: &mut C,
9722
0
    arg0: &XmmMem,
9723
0
) -> Xmm {
9724
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastb, arg0);
9725
0
    // Rule at src/isa/x64/inst.isle line 4560.
9726
0
    return v2;
9727
0
}
9728
9729
// Generated as internal constructor for term x64_vpbroadcastw.
9730
0
pub fn constructor_x64_vpbroadcastw<C: Context>(
9731
0
    ctx: &mut C,
9732
0
    arg0: &XmmMem,
9733
0
) -> Xmm {
9734
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastw, arg0);
9735
0
    // Rule at src/isa/x64/inst.isle line 4565.
9736
0
    return v2;
9737
0
}
9738
9739
// Generated as internal constructor for term x64_vpbroadcastd.
9740
0
pub fn constructor_x64_vpbroadcastd<C: Context>(
9741
0
    ctx: &mut C,
9742
0
    arg0: &XmmMem,
9743
0
) -> Xmm {
9744
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastd, arg0);
9745
0
    // Rule at src/isa/x64/inst.isle line 4570.
9746
0
    return v2;
9747
0
}
9748
9749
// Generated as internal constructor for term x64_vbroadcastss.
9750
0
pub fn constructor_x64_vbroadcastss<C: Context>(
9751
0
    ctx: &mut C,
9752
0
    arg0: &XmmMem,
9753
0
) -> Xmm {
9754
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vbroadcastss, arg0);
9755
0
    // Rule at src/isa/x64/inst.isle line 4575.
9756
0
    return v2;
9757
0
}
9758
9759
// Generated as internal constructor for term jmp_known.
9760
311k
pub fn constructor_jmp_known<C: Context>(
9761
311k
    ctx: &mut C,
9762
311k
    arg0: MachLabel,
9763
311k
) -> SideEffectNoResult {
9764
311k
    let v1 = MInst::JmpKnown {
9765
311k
        dst: arg0,
9766
311k
    };
9767
311k
    let v2 = SideEffectNoResult::Inst {
9768
311k
        inst: v1,
9769
311k
    };
9770
311k
    // Rule at src/isa/x64/inst.isle line 4582.
9771
311k
    return v2;
9772
311k
}
9773
9774
// Generated as internal constructor for term jmp_if.
9775
0
pub fn constructor_jmp_if<C: Context>(
9776
0
    ctx: &mut C,
9777
0
    arg0: &CC,
9778
0
    arg1: MachLabel,
9779
0
) -> ConsumesFlags {
9780
0
    let v2 = MInst::JmpIf {
9781
0
        cc: arg0.clone(),
9782
0
        taken: arg1,
9783
0
    };
9784
0
    let v3 = ConsumesFlags::ConsumesFlagsSideEffect {
9785
0
        inst: v2,
9786
0
    };
9787
0
    // Rule at src/isa/x64/inst.isle line 4586.
9788
0
    return v3;
9789
0
}
9790
9791
// Generated as internal constructor for term jmp_cond.
9792
452k
pub fn constructor_jmp_cond<C: Context>(
9793
452k
    ctx: &mut C,
9794
452k
    arg0: &CC,
9795
452k
    arg1: MachLabel,
9796
452k
    arg2: MachLabel,
9797
452k
) -> ConsumesFlags {
9798
452k
    let v3 = MInst::JmpCond {
9799
452k
        cc: arg0.clone(),
9800
452k
        taken: arg1,
9801
452k
        not_taken: arg2,
9802
452k
    };
9803
452k
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9804
452k
        inst: v3,
9805
452k
    };
9806
452k
    // Rule at src/isa/x64/inst.isle line 4591.
9807
452k
    return v4;
9808
452k
}
9809
9810
// Generated as internal constructor for term jmp_cond_icmp.
9811
338k
pub fn constructor_jmp_cond_icmp<C: Context>(
9812
338k
    ctx: &mut C,
9813
338k
    arg0: &IcmpCondResult,
9814
338k
    arg1: MachLabel,
9815
338k
    arg2: MachLabel,
9816
338k
) -> SideEffectNoResult {
9817
338k
    if let &IcmpCondResult::Condition {
9818
338k
        producer: ref v1,
9819
338k
        cc: ref v2,
9820
338k
    } = arg0 {
9821
338k
        let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
9822
338k
        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
9823
338k
        // Rule at src/isa/x64/inst.isle line 4596.
9824
338k
        return v6.clone();
9825
338k
    }
9826
338k
unreachable!("no rule matched for term {} at {}; should it be partial?", "jmp_cond_icmp", "src/isa/x64/inst.isle line 4595")
9827
338k
}
9828
9829
// Generated as internal constructor for term jmp_cond_fcmp.
9830
0
pub fn constructor_jmp_cond_fcmp<C: Context>(
9831
0
    ctx: &mut C,
9832
0
    arg0: &FcmpCondResult,
9833
0
    arg1: MachLabel,
9834
0
    arg2: MachLabel,
9835
0
) -> SideEffectNoResult {
9836
0
    match arg0 {
9837
        &FcmpCondResult::Condition {
9838
0
            producer: ref v1,
9839
0
            cc: ref v2,
9840
0
        } => {
9841
0
            let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
9842
0
            let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
9843
0
            // Rule at src/isa/x64/inst.isle line 4601.
9844
0
            return v6.clone();
9845
        }
9846
        &FcmpCondResult::AndCondition {
9847
0
            producer: ref v7,
9848
0
            cc1: ref v8,
9849
0
            cc2: ref v9,
9850
0
        } => {
9851
0
            let v10 = &C::cc_invert(ctx, v8);
9852
0
            let v11 = &constructor_jmp_if(ctx, v10, arg2);
9853
0
            let v12 = &C::cc_invert(ctx, v9);
9854
0
            let v13 = &constructor_jmp_cond(ctx, v12, arg2, arg1);
9855
0
            let v14 = &constructor_consumes_flags_concat(ctx, v11, v13);
9856
0
            let v15 = &constructor_with_flags_side_effect(ctx, v7, v14);
9857
0
            // Rule at src/isa/x64/inst.isle line 4603.
9858
0
            return v15.clone();
9859
        }
9860
        &FcmpCondResult::OrCondition {
9861
0
            producer: ref v16,
9862
0
            cc1: ref v17,
9863
0
            cc2: ref v18,
9864
0
        } => {
9865
0
            let v19 = &constructor_jmp_if(ctx, v17, arg1);
9866
0
            let v20 = &constructor_jmp_cond(ctx, v18, arg1, arg2);
9867
0
            let v21 = &constructor_consumes_flags_concat(ctx, v19, v20);
9868
0
            let v22 = &constructor_with_flags_side_effect(ctx, v16, v21);
9869
0
            // Rule at src/isa/x64/inst.isle line 4608.
9870
0
            return v22.clone();
9871
        }
9872
0
        _ => {}
9873
0
    }
9874
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "jmp_cond_fcmp", "src/isa/x64/inst.isle line 4600")
9875
0
}
9876
9877
// Generated as internal constructor for term jmp_table_seq.
9878
15.3k
pub fn constructor_jmp_table_seq<C: Context>(
9879
15.3k
    ctx: &mut C,
9880
15.3k
    arg0: Type,
9881
15.3k
    arg1: Gpr,
9882
15.3k
    arg2: MachLabel,
9883
15.3k
    arg3: &BoxVecMachLabel,
9884
15.3k
) -> SideEffectNoResult {
9885
15.3k
    let v4 = C::temp_writable_gpr(ctx);
9886
15.3k
    let v5 = C::temp_writable_gpr(ctx);
9887
15.3k
    let v6 = C::gpr_to_reg(ctx, arg1);
9888
15.3k
    let v7 = C::writable_gpr_to_reg(ctx, v4);
9889
15.3k
    let v8 = C::writable_gpr_to_reg(ctx, v5);
9890
15.3k
    let v9 = MInst::JmpTableSeq {
9891
15.3k
        idx: v6,
9892
15.3k
        tmp1: v7,
9893
15.3k
        tmp2: v8,
9894
15.3k
        default_target: arg2,
9895
15.3k
        targets: arg3.clone(),
9896
15.3k
    };
9897
15.3k
    let v10 = SideEffectNoResult::Inst {
9898
15.3k
        inst: v9,
9899
15.3k
    };
9900
15.3k
    // Rule at src/isa/x64/inst.isle line 4628.
9901
15.3k
    return v10;
9902
15.3k
}
9903
9904
// Generated as internal constructor for term icmp_cond_result.
9905
386k
pub fn constructor_icmp_cond_result<C: Context>(
9906
386k
    ctx: &mut C,
9907
386k
    arg0: &ProducesFlags,
9908
386k
    arg1: &CC,
9909
386k
) -> IcmpCondResult {
9910
386k
    let v2 = IcmpCondResult::Condition {
9911
386k
        producer: arg0.clone(),
9912
386k
        cc: arg1.clone(),
9913
386k
    };
9914
386k
    // Rule at src/isa/x64/inst.isle line 4647.
9915
386k
    return v2;
9916
386k
}
9917
9918
// Generated as internal constructor for term invert_icmp_cond_result.
9919
0
pub fn constructor_invert_icmp_cond_result<C: Context>(
9920
0
    ctx: &mut C,
9921
0
    arg0: &IcmpCondResult,
9922
0
) -> IcmpCondResult {
9923
0
    if let &IcmpCondResult::Condition {
9924
0
        producer: ref v1,
9925
0
        cc: ref v2,
9926
0
    } = arg0 {
9927
0
        let v3 = &C::cc_invert(ctx, v2);
9928
0
        let v4 = &constructor_icmp_cond_result(ctx, v1, v3);
9929
0
        // Rule at src/isa/x64/inst.isle line 4650.
9930
0
        return v4.clone();
9931
0
    }
9932
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "invert_icmp_cond_result", "src/isa/x64/inst.isle line 4649")
9933
0
}
9934
9935
// Generated as internal constructor for term lower_icmp_bool.
9936
17.6k
pub fn constructor_lower_icmp_bool<C: Context>(
9937
17.6k
    ctx: &mut C,
9938
17.6k
    arg0: &IcmpCondResult,
9939
17.6k
) -> ValueRegs {
9940
17.6k
    if let &IcmpCondResult::Condition {
9941
17.6k
        producer: ref v1,
9942
17.6k
        cc: ref v2,
9943
17.6k
    } = arg0 {
9944
17.6k
        let v3 = &constructor_x64_setcc(ctx, v2);
9945
17.6k
        let v4 = constructor_with_flags(ctx, v1, v3);
9946
17.6k
        // Rule at src/isa/x64/inst.isle line 4655.
9947
17.6k
        return v4;
9948
17.6k
    }
9949
17.6k
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_icmp_bool", "src/isa/x64/inst.isle line 4654")
9950
17.6k
}
9951
9952
// Generated as internal constructor for term select_icmp.
9953
30.1k
pub fn constructor_select_icmp<C: Context>(
9954
30.1k
    ctx: &mut C,
9955
30.1k
    arg0: &IcmpCondResult,
9956
30.1k
    arg1: Value,
9957
30.1k
    arg2: Value,
9958
30.1k
) -> ValueRegs {
9959
30.1k
    if let &IcmpCondResult::Condition {
9960
30.1k
        producer: ref v1,
9961
30.1k
        cc: ref v2,
9962
30.1k
    } = arg0 {
9963
30.1k
        let v4 = C::value_type(ctx, arg1);
9964
30.1k
        let v5 = &C::type_register_class(ctx, v4);
9965
30.1k
        if let Some(v6) = v5 {
9966
            if let &RegisterClass::Gpr {
9967
30.1k
                single_register: v7,
9968
30.1k
            } = v6 {
9969
30.1k
                if v7 == true {
9970
30.1k
                    let v9 = constructor_put_in_gpr(ctx, arg1);
9971
30.1k
                    let v10 = &C::gpr_to_gpr_mem(ctx, v9);
9972
30.1k
                    let v11 = constructor_put_in_gpr(ctx, arg2);
9973
30.1k
                    let v12 = &constructor_cmove(ctx, v4, v2, v10, v11);
9974
30.1k
                    let v13 = constructor_with_flags(ctx, v1, v12);
9975
30.1k
                    // Rule at src/isa/x64/inst.isle line 4664.
9976
30.1k
                    return v13;
9977
0
                }
9978
0
            }
9979
0
        }
9980
0
        let v14 = &constructor_cmove_from_values(ctx, v4, v2, arg1, arg2);
9981
0
        let v15 = constructor_with_flags(ctx, v1, v14);
9982
0
        // Rule at src/isa/x64/inst.isle line 4668.
9983
0
        return v15;
9984
    }
9985
unreachable!("no rule matched for term {} at {}; should it be partial?", "select_icmp", "src/isa/x64/inst.isle line 4659")
9986
30.1k
}
9987
9988
// Generated as internal constructor for term emit_cmp.
9989
386k
pub fn constructor_emit_cmp<C: Context>(
9990
386k
    ctx: &mut C,
9991
386k
    arg0: &IntCC,
9992
386k
    arg1: Value,
9993
386k
    arg2: Value,
9994
386k
) -> IcmpCondResult {
9995
386k
    let v2 = C::value_type(ctx, arg1);
9996
386k
    if v2 == I128 {
9997
0
        match arg0 {
9998
            &IntCC::Equal => {
9999
0
                let v44 = C::put_in_regs(ctx, arg1);
10000
0
                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
10001
0
                let v47 = C::put_in_regs(ctx, arg1);
10002
0
                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
10003
0
                let v50 = C::put_in_regs(ctx, arg2);
10004
0
                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
10005
0
                let v52 = C::put_in_regs(ctx, arg2);
10006
0
                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
10007
0
                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
10008
0
                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
10009
0
                let v58 = &constructor_x64_setcc(ctx, &CC::Z);
10010
0
                let v59 = constructor_with_flags_reg(ctx, v56, v58);
10011
0
                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
10012
0
                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
10013
0
                let v62 = &constructor_x64_setcc(ctx, &CC::Z);
10014
0
                let v63 = constructor_with_flags_reg(ctx, v61, v62);
10015
0
                let v65 = C::gpr_new(ctx, v59);
10016
0
                let v66 = &constructor_reg_to_gpr_mem_imm(ctx, v63);
10017
0
                let v67 = constructor_x64_and(ctx, I64, v65, v66);
10018
0
                let v68 = C::gpr_to_reg(ctx, v67);
10019
0
                let v70 = RegMemImm::Imm {
10020
0
                    simm32: 0x1,
10021
0
                };
10022
0
                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
10023
0
                let v72 = C::gpr_new(ctx, v68);
10024
0
                let v73 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v72);
10025
0
                let v75 = &constructor_icmp_cond_result(ctx, v73, &CC::NZ);
10026
0
                // Rule at src/isa/x64/inst.isle line 4700.
10027
0
                return v75.clone();
10028
            }
10029
            &IntCC::NotEqual => {
10030
0
                let v44 = C::put_in_regs(ctx, arg1);
10031
0
                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
10032
0
                let v47 = C::put_in_regs(ctx, arg1);
10033
0
                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
10034
0
                let v50 = C::put_in_regs(ctx, arg2);
10035
0
                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
10036
0
                let v52 = C::put_in_regs(ctx, arg2);
10037
0
                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
10038
0
                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
10039
0
                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
10040
0
                let v76 = &constructor_x64_setcc(ctx, &CC::NZ);
10041
0
                let v77 = constructor_with_flags_reg(ctx, v56, v76);
10042
0
                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
10043
0
                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
10044
0
                let v78 = &constructor_x64_setcc(ctx, &CC::NZ);
10045
0
                let v79 = constructor_with_flags_reg(ctx, v61, v78);
10046
0
                let v80 = C::gpr_new(ctx, v77);
10047
0
                let v81 = &constructor_reg_to_gpr_mem_imm(ctx, v79);
10048
0
                let v82 = constructor_x64_or(ctx, I64, v80, v81);
10049
0
                let v83 = C::gpr_to_reg(ctx, v82);
10050
0
                let v70 = RegMemImm::Imm {
10051
0
                    simm32: 0x1,
10052
0
                };
10053
0
                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
10054
0
                let v84 = C::gpr_new(ctx, v83);
10055
0
                let v85 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v84);
10056
0
                let v86 = &constructor_icmp_cond_result(ctx, v85, &CC::NZ);
10057
0
                // Rule at src/isa/x64/inst.isle line 4721.
10058
0
                return v86.clone();
10059
            }
10060
0
            _ => {}
10061
0
        }
10062
0
        let v44 = C::put_in_regs(ctx, arg1);
10063
0
        let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
10064
0
        let v47 = C::put_in_regs(ctx, arg1);
10065
0
        let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
10066
0
        let v50 = C::put_in_regs(ctx, arg2);
10067
0
        let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
10068
0
        let v52 = C::put_in_regs(ctx, arg2);
10069
0
        let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
10070
0
        let v87 = &C::gpr_to_gpr_mem_imm(ctx, v53);
10071
0
        let v88 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v87, v49);
10072
0
        let v89 = &C::intcc_without_eq(ctx, arg0);
10073
0
        let v90 = &C::intcc_to_cc(ctx, v89);
10074
0
        let v91 = &constructor_x64_setcc(ctx, v90);
10075
0
        let v92 = &constructor_x64_setcc(ctx, &CC::Z);
10076
0
        let v93 = &constructor_consumes_flags_concat(ctx, v91, v92);
10077
0
        let v94 = constructor_with_flags(ctx, v88, v93);
10078
0
        let v95 = C::value_regs_get(ctx, v94, 0x0);
10079
0
        let v96 = C::value_regs_get(ctx, v94, 0x1);
10080
0
        let v97 = &C::gpr_to_gpr_mem_imm(ctx, v51);
10081
0
        let v98 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v97, v46);
10082
0
        let v99 = &C::intcc_unsigned(ctx, arg0);
10083
0
        let v100 = &C::intcc_to_cc(ctx, v99);
10084
0
        let v101 = &constructor_x64_setcc(ctx, v100);
10085
0
        let v102 = constructor_with_flags_reg(ctx, v98, v101);
10086
0
        let v103 = C::gpr_new(ctx, v96);
10087
0
        let v104 = &constructor_reg_to_gpr_mem_imm(ctx, v102);
10088
0
        let v105 = constructor_x64_and(ctx, I64, v103, v104);
10089
0
        let v106 = C::gpr_to_reg(ctx, v105);
10090
0
        let v107 = C::gpr_new(ctx, v95);
10091
0
        let v108 = &constructor_reg_to_gpr_mem_imm(ctx, v106);
10092
0
        let v109 = constructor_x64_or(ctx, I64, v107, v108);
10093
0
        let v110 = C::gpr_to_reg(ctx, v109);
10094
0
        let v70 = RegMemImm::Imm {
10095
0
            simm32: 0x1,
10096
0
        };
10097
0
        let v111 = &C::gpr_mem_imm_new(ctx, &v70);
10098
0
        let v112 = C::gpr_new(ctx, v110);
10099
0
        let v113 = &constructor_x64_test(ctx, &OperandSize::Size64, v111, v112);
10100
0
        let v114 = &constructor_icmp_cond_result(ctx, v113, &CC::NZ);
10101
0
        // Rule at src/isa/x64/inst.isle line 4736.
10102
0
        return v114.clone();
10103
386k
    }
10104
386k
    let v29 = C::def_inst(ctx, arg1);
10105
386k
    if let Some(
v30354k
) = v29 {
10106
354k
        let v31 = &C::inst_data(ctx, v30);
10107
        if let &InstructionData::UnaryImm {
10108
0
            opcode: ref v32,
10109
0
            imm: v33,
10110
354k
        } = v31 {
10111
0
            if let &Opcode::Iconst = v32 {
10112
0
                let v34 = C::u64_from_imm64(ctx, v33);
10113
0
                if v34 == 0x0 {
10114
0
                    let v35 = C::value_type(ctx, arg2);
10115
0
                    let v36 = &C::raw_operand_size_of_type(ctx, v35);
10116
0
                    let v37 = C::put_in_reg(ctx, arg2);
10117
0
                    let v38 = C::gpr_new(ctx, v37);
10118
0
                    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
10119
0
                    let v40 = &constructor_x64_test(ctx, v36, v39, v38);
10120
0
                    let v41 = &C::intcc_swap_args(ctx, arg0);
10121
0
                    let v42 = &C::intcc_to_cc(ctx, v41);
10122
0
                    let v43 = &constructor_icmp_cond_result(ctx, v40, v42);
10123
0
                    // Rule at src/isa/x64/inst.isle line 4693.
10124
0
                    return v43.clone();
10125
0
                }
10126
0
            }
10127
354k
        }
10128
31.5k
    }
10129
386k
    let v17 = C::def_inst(ctx, arg2);
10130
386k
    if let Some(
v18375k
) = v17 {
10131
375k
        let v19 = &C::inst_data(ctx, v18);
10132
        if let &InstructionData::UnaryImm {
10133
227k
            opcode: ref v20,
10134
227k
            imm: v21,
10135
375k
        } = v19 {
10136
227k
            if let &Opcode::Iconst = v20 {
10137
227k
                let v22 = C::u64_from_imm64(ctx, v21);
10138
227k
                if v22 == 0x0 {
10139
117k
                    let v4 = &C::raw_operand_size_of_type(ctx, v2);
10140
117k
                    let v23 = C::put_in_reg(ctx, arg1);
10141
117k
                    let v24 = C::gpr_new(ctx, v23);
10142
117k
                    let v25 = &C::gpr_to_gpr_mem_imm(ctx, v24);
10143
117k
                    let v26 = &constructor_x64_test(ctx, v4, v25, v24);
10144
117k
                    let v27 = &C::intcc_to_cc(ctx, arg0);
10145
117k
                    let v28 = &constructor_icmp_cond_result(ctx, v26, v27);
10146
117k
                    // Rule at src/isa/x64/inst.isle line 4688.
10147
117k
                    return v28.clone();
10148
109k
                }
10149
0
            }
10150
147k
        }
10151
10.7k
    }
10152
268k
    let v10 = &C::simm32_from_value(ctx, arg1);
10153
268k
    if let Some(
v110
) = v10 {
10154
0
        let v4 = &C::raw_operand_size_of_type(ctx, v2);
10155
0
        let v12 = constructor_put_in_gpr(ctx, arg2);
10156
0
        let v13 = &constructor_x64_cmp(ctx, v4, v11, v12);
10157
0
        let v14 = &C::intcc_swap_args(ctx, arg0);
10158
0
        let v15 = &C::intcc_to_cc(ctx, v14);
10159
0
        let v16 = &constructor_icmp_cond_result(ctx, v13, v15);
10160
0
        // Rule at src/isa/x64/inst.isle line 4683.
10161
0
        return v16.clone();
10162
268k
    }
10163
268k
    let v4 = &C::raw_operand_size_of_type(ctx, v2);
10164
268k
    let v5 = &constructor_put_in_gpr_mem_imm(ctx, arg2);
10165
268k
    let v6 = constructor_put_in_gpr(ctx, arg1);
10166
268k
    let v7 = &constructor_x64_cmp(ctx, v4, v5, v6);
10167
268k
    let v8 = &C::intcc_to_cc(ctx, arg0);
10168
268k
    let v9 = &constructor_icmp_cond_result(ctx, v7, v8);
10169
268k
    // Rule at src/isa/x64/inst.isle line 4676.
10170
268k
    return v9.clone();
10171
386k
}
10172
10173
// Generated as internal constructor for term lower_fcmp_bool.
10174
0
pub fn constructor_lower_fcmp_bool<C: Context>(
10175
0
    ctx: &mut C,
10176
0
    arg0: &FcmpCondResult,
10177
0
) -> ValueRegs {
10178
0
    match arg0 {
10179
        &FcmpCondResult::Condition {
10180
0
            producer: ref v1,
10181
0
            cc: ref v2,
10182
0
        } => {
10183
0
            let v3 = &constructor_x64_setcc(ctx, v2);
10184
0
            let v4 = constructor_with_flags(ctx, v1, v3);
10185
0
            // Rule at src/isa/x64/inst.isle line 4771.
10186
0
            return v4;
10187
        }
10188
        &FcmpCondResult::AndCondition {
10189
0
            producer: ref v5,
10190
0
            cc1: ref v6,
10191
0
            cc2: ref v7,
10192
0
        } => {
10193
0
            let v8 = &constructor_x64_setcc(ctx, v6);
10194
0
            let v9 = &constructor_x64_setcc(ctx, v7);
10195
0
            let v10 = &constructor_consumes_flags_concat(ctx, v8, v9);
10196
0
            let v11 = constructor_with_flags(ctx, v5, v10);
10197
0
            let v13 = constructor_value_regs_get_gpr(ctx, v11, 0x0);
10198
0
            let v15 = constructor_value_regs_get_gpr(ctx, v11, 0x1);
10199
0
            let v17 = &C::gpr_to_gpr_mem_imm(ctx, v15);
10200
0
            let v18 = constructor_x64_and(ctx, I8, v13, v17);
10201
0
            let v19 = C::gpr_to_reg(ctx, v18);
10202
0
            let v20 = C::value_reg(ctx, v19);
10203
0
            // Rule at src/isa/x64/inst.isle line 4774.
10204
0
            return v20;
10205
        }
10206
        &FcmpCondResult::OrCondition {
10207
0
            producer: ref v21,
10208
0
            cc1: ref v22,
10209
0
            cc2: ref v23,
10210
0
        } => {
10211
0
            let v24 = &constructor_x64_setcc(ctx, v22);
10212
0
            let v25 = &constructor_x64_setcc(ctx, v23);
10213
0
            let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
10214
0
            let v27 = constructor_with_flags(ctx, v21, v26);
10215
0
            let v28 = constructor_value_regs_get_gpr(ctx, v27, 0x0);
10216
0
            let v29 = constructor_value_regs_get_gpr(ctx, v27, 0x1);
10217
0
            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
10218
0
            let v31 = constructor_x64_or(ctx, I8, v28, v30);
10219
0
            let v32 = C::gpr_to_reg(ctx, v31);
10220
0
            let v33 = C::value_reg(ctx, v32);
10221
0
            // Rule at src/isa/x64/inst.isle line 4783.
10222
0
            return v33;
10223
        }
10224
0
        _ => {}
10225
0
    }
10226
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_fcmp_bool", "src/isa/x64/inst.isle line 4769")
10227
0
}
10228
10229
// Generated as internal constructor for term emit_fcmp.
10230
0
pub fn constructor_emit_fcmp<C: Context>(
10231
0
    ctx: &mut C,
10232
0
    arg0: &FloatCC,
10233
0
    arg1: Value,
10234
0
    arg2: Value,
10235
0
) -> FcmpCondResult {
10236
0
    match arg0 {
10237
        &FloatCC::Equal => {
10238
0
            let v2 = C::value_type(ctx, arg1);
10239
0
            let v3 = C::ty_scalar_float(ctx, v2);
10240
0
            if let Some(v4) = v3 {
10241
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10242
0
                let v9 = FcmpCondResult::AndCondition {
10243
0
                    producer: v6.clone(),
10244
0
                    cc1: CC::NP,
10245
0
                    cc2: CC::Z,
10246
0
                };
10247
0
                // Rule at src/isa/x64/inst.isle line 4810.
10248
0
                return v9;
10249
0
            }
10250
        }
10251
        &FloatCC::GreaterThan => {
10252
0
            let v2 = C::value_type(ctx, arg1);
10253
0
            let v3 = C::ty_scalar_float(ctx, v2);
10254
0
            if let Some(v4) = v3 {
10255
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10256
0
                let v18 = FcmpCondResult::Condition {
10257
0
                    producer: v6.clone(),
10258
0
                    cc: CC::NBE,
10259
0
                };
10260
0
                // Rule at src/isa/x64/inst.isle line 4826.
10261
0
                return v18;
10262
0
            }
10263
        }
10264
        &FloatCC::GreaterThanOrEqual => {
10265
0
            let v2 = C::value_type(ctx, arg1);
10266
0
            let v3 = C::ty_scalar_float(ctx, v2);
10267
0
            if let Some(v4) = v3 {
10268
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10269
0
                let v20 = FcmpCondResult::Condition {
10270
0
                    producer: v6.clone(),
10271
0
                    cc: CC::NB,
10272
0
                };
10273
0
                // Rule at src/isa/x64/inst.isle line 4828.
10274
0
                return v20;
10275
0
            }
10276
        }
10277
        &FloatCC::LessThan => {
10278
0
            let v2 = C::value_type(ctx, arg1);
10279
0
            let v3 = C::ty_scalar_float(ctx, v2);
10280
0
            if let Some(v4) = v3 {
10281
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10282
0
                let v26 = FcmpCondResult::Condition {
10283
0
                    producer: v25.clone(),
10284
0
                    cc: CC::NBE,
10285
0
                };
10286
0
                // Rule at src/isa/x64/inst.isle line 4838.
10287
0
                return v26;
10288
0
            }
10289
        }
10290
        &FloatCC::LessThanOrEqual => {
10291
0
            let v2 = C::value_type(ctx, arg1);
10292
0
            let v3 = C::ty_scalar_float(ctx, v2);
10293
0
            if let Some(v4) = v3 {
10294
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10295
0
                let v27 = FcmpCondResult::Condition {
10296
0
                    producer: v25.clone(),
10297
0
                    cc: CC::NB,
10298
0
                };
10299
0
                // Rule at src/isa/x64/inst.isle line 4841.
10300
0
                return v27;
10301
0
            }
10302
        }
10303
        &FloatCC::NotEqual => {
10304
0
            let v2 = C::value_type(ctx, arg1);
10305
0
            let v3 = C::ty_scalar_float(ctx, v2);
10306
0
            if let Some(v4) = v3 {
10307
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10308
0
                let v12 = FcmpCondResult::OrCondition {
10309
0
                    producer: v6.clone(),
10310
0
                    cc1: CC::P,
10311
0
                    cc2: CC::NZ,
10312
0
                };
10313
0
                // Rule at src/isa/x64/inst.isle line 4813.
10314
0
                return v12;
10315
0
            }
10316
        }
10317
        &FloatCC::Ordered => {
10318
0
            let v2 = C::value_type(ctx, arg1);
10319
0
            let v3 = C::ty_scalar_float(ctx, v2);
10320
0
            if let Some(v4) = v3 {
10321
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10322
0
                let v13 = FcmpCondResult::Condition {
10323
0
                    producer: v6.clone(),
10324
0
                    cc: CC::NP,
10325
0
                };
10326
0
                // Rule at src/isa/x64/inst.isle line 4818.
10327
0
                return v13;
10328
0
            }
10329
        }
10330
        &FloatCC::OrderedNotEqual => {
10331
0
            let v2 = C::value_type(ctx, arg1);
10332
0
            let v3 = C::ty_scalar_float(ctx, v2);
10333
0
            if let Some(v4) = v3 {
10334
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10335
0
                let v15 = FcmpCondResult::Condition {
10336
0
                    producer: v6.clone(),
10337
0
                    cc: CC::NZ,
10338
0
                };
10339
0
                // Rule at src/isa/x64/inst.isle line 4822.
10340
0
                return v15;
10341
0
            }
10342
        }
10343
        &FloatCC::Unordered => {
10344
0
            let v2 = C::value_type(ctx, arg1);
10345
0
            let v3 = C::ty_scalar_float(ctx, v2);
10346
0
            if let Some(v4) = v3 {
10347
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10348
0
                let v14 = FcmpCondResult::Condition {
10349
0
                    producer: v6.clone(),
10350
0
                    cc: CC::P,
10351
0
                };
10352
0
                // Rule at src/isa/x64/inst.isle line 4820.
10353
0
                return v14;
10354
0
            }
10355
        }
10356
        &FloatCC::UnorderedOrEqual => {
10357
0
            let v2 = C::value_type(ctx, arg1);
10358
0
            let v3 = C::ty_scalar_float(ctx, v2);
10359
0
            if let Some(v4) = v3 {
10360
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10361
0
                let v16 = FcmpCondResult::Condition {
10362
0
                    producer: v6.clone(),
10363
0
                    cc: CC::Z,
10364
0
                };
10365
0
                // Rule at src/isa/x64/inst.isle line 4824.
10366
0
                return v16;
10367
0
            }
10368
        }
10369
        &FloatCC::UnorderedOrGreaterThan => {
10370
0
            let v2 = C::value_type(ctx, arg1);
10371
0
            let v3 = C::ty_scalar_float(ctx, v2);
10372
0
            if let Some(v4) = v3 {
10373
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10374
0
                let v28 = FcmpCondResult::Condition {
10375
0
                    producer: v25.clone(),
10376
0
                    cc: CC::B,
10377
0
                };
10378
0
                // Rule at src/isa/x64/inst.isle line 4844.
10379
0
                return v28;
10380
0
            }
10381
        }
10382
        &FloatCC::UnorderedOrGreaterThanOrEqual => {
10383
0
            let v2 = C::value_type(ctx, arg1);
10384
0
            let v3 = C::ty_scalar_float(ctx, v2);
10385
0
            if let Some(v4) = v3 {
10386
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10387
0
                let v29 = FcmpCondResult::Condition {
10388
0
                    producer: v25.clone(),
10389
0
                    cc: CC::BE,
10390
0
                };
10391
0
                // Rule at src/isa/x64/inst.isle line 4847.
10392
0
                return v29;
10393
0
            }
10394
        }
10395
        &FloatCC::UnorderedOrLessThan => {
10396
0
            let v2 = C::value_type(ctx, arg1);
10397
0
            let v3 = C::ty_scalar_float(ctx, v2);
10398
0
            if let Some(v4) = v3 {
10399
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10400
0
                let v22 = FcmpCondResult::Condition {
10401
0
                    producer: v6.clone(),
10402
0
                    cc: CC::B,
10403
0
                };
10404
0
                // Rule at src/isa/x64/inst.isle line 4830.
10405
0
                return v22;
10406
0
            }
10407
        }
10408
        &FloatCC::UnorderedOrLessThanOrEqual => {
10409
0
            let v2 = C::value_type(ctx, arg1);
10410
0
            let v3 = C::ty_scalar_float(ctx, v2);
10411
0
            if let Some(v4) = v3 {
10412
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10413
0
                let v24 = FcmpCondResult::Condition {
10414
0
                    producer: v6.clone(),
10415
0
                    cc: CC::BE,
10416
0
                };
10417
0
                // Rule at src/isa/x64/inst.isle line 4832.
10418
0
                return v24;
10419
0
            }
10420
        }
10421
0
        _ => {}
10422
    }
10423
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "emit_fcmp", "src/isa/x64/inst.isle line 4808")
10424
0
}
10425
10426
// Generated as internal constructor for term x64_mfence.
10427
0
pub fn constructor_x64_mfence<C: Context>(
10428
0
    ctx: &mut C,
10429
0
) -> SideEffectNoResult {
10430
0
    let v1 = MInst::Fence {
10431
0
        kind: FenceKind::MFence,
10432
0
    };
10433
0
    let v2 = SideEffectNoResult::Inst {
10434
0
        inst: v1,
10435
0
    };
10436
0
    // Rule at src/isa/x64/inst.isle line 4860.
10437
0
    return v2;
10438
0
}
10439
10440
// Generated as internal constructor for term x64_cmpxchg.
10441
0
pub fn constructor_x64_cmpxchg<C: Context>(
10442
0
    ctx: &mut C,
10443
0
    arg0: Type,
10444
0
    arg1: Gpr,
10445
0
    arg2: Gpr,
10446
0
    arg3: &SyntheticAmode,
10447
0
) -> Gpr {
10448
0
    let v4 = C::temp_writable_gpr(ctx);
10449
0
    let v5 = C::gpr_to_reg(ctx, arg2);
10450
0
    let v6 = C::gpr_to_reg(ctx, arg1);
10451
0
    let v7 = C::writable_gpr_to_reg(ctx, v4);
10452
0
    let v8 = MInst::LockCmpxchg {
10453
0
        ty: arg0,
10454
0
        replacement: v5,
10455
0
        expected: v6,
10456
0
        mem: arg3.clone(),
10457
0
        dst_old: v7,
10458
0
    };
10459
0
    let v9 = C::emit(ctx, &v8);
10460
0
    let v10 = C::writable_gpr_to_gpr(ctx, v4);
10461
0
    // Rule at src/isa/x64/inst.isle line 4864.
10462
0
    return v10;
10463
0
}
10464
10465
// Generated as internal constructor for term x64_atomic_rmw_seq.
10466
0
pub fn constructor_x64_atomic_rmw_seq<C: Context>(
10467
0
    ctx: &mut C,
10468
0
    arg0: Type,
10469
0
    arg1: &MachAtomicRmwOp,
10470
0
    arg2: &SyntheticAmode,
10471
0
    arg3: Gpr,
10472
0
) -> Gpr {
10473
0
    let v4 = C::temp_writable_gpr(ctx);
10474
0
    let v5 = C::temp_writable_gpr(ctx);
10475
0
    let v6 = C::gpr_to_reg(ctx, arg3);
10476
0
    let v7 = C::writable_gpr_to_reg(ctx, v5);
10477
0
    let v8 = C::writable_gpr_to_reg(ctx, v4);
10478
0
    let v9 = MInst::AtomicRmwSeq {
10479
0
        ty: arg0,
10480
0
        op: arg1.clone(),
10481
0
        mem: arg2.clone(),
10482
0
        operand: v6,
10483
0
        temp: v7,
10484
0
        dst_old: v8,
10485
0
    };
10486
0
    let v10 = C::emit(ctx, &v9);
10487
0
    let v11 = C::writable_gpr_to_gpr(ctx, v4);
10488
0
    // Rule at src/isa/x64/inst.isle line 4870.
10489
0
    return v11;
10490
0
}
10491
10492
// Generated as internal constructor for term bitcast_xmm_to_gpr.
10493
0
pub fn constructor_bitcast_xmm_to_gpr<C: Context>(
10494
0
    ctx: &mut C,
10495
0
    arg0: Type,
10496
0
    arg1: Xmm,
10497
0
) -> Gpr {
10498
0
    match arg0 {
10499
        F32 => {
10500
0
            let v2 = constructor_x64_movd_to_gpr(ctx, arg1);
10501
0
            // Rule at src/isa/x64/inst.isle line 4885.
10502
0
            return v2;
10503
        }
10504
        F64 => {
10505
0
            let v3 = constructor_x64_movq_to_gpr(ctx, arg1);
10506
0
            // Rule at src/isa/x64/inst.isle line 4887.
10507
0
            return v3;
10508
        }
10509
0
        _ => {}
10510
0
    }
10511
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "bitcast_xmm_to_gpr", "src/isa/x64/inst.isle line 4884")
10512
0
}
10513
10514
// Generated as internal constructor for term bitcast_gpr_to_xmm.
10515
0
pub fn constructor_bitcast_gpr_to_xmm<C: Context>(
10516
0
    ctx: &mut C,
10517
0
    arg0: Type,
10518
0
    arg1: Gpr,
10519
0
) -> Xmm {
10520
0
    match arg0 {
10521
        I32 => {
10522
0
            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
10523
0
            let v3 = constructor_x64_movd_to_xmm(ctx, v2);
10524
0
            // Rule at src/isa/x64/inst.isle line 4891.
10525
0
            return v3;
10526
        }
10527
        I64 => {
10528
0
            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
10529
0
            let v4 = constructor_x64_movq_to_xmm(ctx, v2);
10530
0
            // Rule at src/isa/x64/inst.isle line 4893.
10531
0
            return v4;
10532
        }
10533
0
        _ => {}
10534
0
    }
10535
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "bitcast_gpr_to_xmm", "src/isa/x64/inst.isle line 4890")
10536
0
}
10537
10538
// Generated as internal constructor for term stack_addr_impl.
10539
2.27k
pub fn constructor_stack_addr_impl<C: Context>(
10540
2.27k
    ctx: &mut C,
10541
2.27k
    arg0: StackSlot,
10542
2.27k
    arg1: Offset32,
10543
2.27k
) -> Gpr {
10544
2.27k
    let v2 = C::temp_writable_gpr(ctx);
10545
2.27k
    let v3 = C::writable_gpr_to_reg(ctx, v2);
10546
2.27k
    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
10547
2.27k
    let v5 = C::emit(ctx, v4);
10548
2.27k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
10549
2.27k
    // Rule at src/isa/x64/inst.isle line 4899.
10550
2.27k
    return v6;
10551
2.27k
}
10552
10553
// Generated as internal constructor for term x64_checked_srem_seq.
10554
0
pub fn constructor_x64_checked_srem_seq<C: Context>(
10555
0
    ctx: &mut C,
10556
0
    arg0: &OperandSize,
10557
0
    arg1: Gpr,
10558
0
    arg2: Gpr,
10559
0
    arg3: Gpr,
10560
0
) -> ValueRegs {
10561
0
    let v4 = C::temp_writable_gpr(ctx);
10562
0
    let v5 = C::temp_writable_gpr(ctx);
10563
0
    let v6 = MInst::CheckedSRemSeq {
10564
0
        size: arg0.clone(),
10565
0
        dividend_lo: arg1,
10566
0
        dividend_hi: arg2,
10567
0
        divisor: arg3,
10568
0
        dst_quotient: v4,
10569
0
        dst_remainder: v5,
10570
0
    };
10571
0
    let v7 = C::emit(ctx, &v6);
10572
0
    let v8 = constructor_writable_gpr_to_r_reg(ctx, v4);
10573
0
    let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
10574
0
    let v10 = C::value_regs(ctx, v8, v9);
10575
0
    // Rule at src/isa/x64/inst.isle line 4908.
10576
0
    return v10;
10577
0
}
10578
10579
// Generated as internal constructor for term x64_checked_srem_seq8.
10580
0
pub fn constructor_x64_checked_srem_seq8<C: Context>(
10581
0
    ctx: &mut C,
10582
0
    arg0: Gpr,
10583
0
    arg1: Gpr,
10584
0
) -> Gpr {
10585
0
    let v2 = C::temp_writable_gpr(ctx);
10586
0
    let v3 = MInst::CheckedSRemSeq8 {
10587
0
        dividend: arg0,
10588
0
        divisor: arg1,
10589
0
        dst: v2,
10590
0
    };
10591
0
    let v4 = C::emit(ctx, &v3);
10592
0
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
10593
0
    // Rule at src/isa/x64/inst.isle line 4915.
10594
0
    return v5;
10595
0
}
10596
10597
// Generated as internal constructor for term x64_div8.
10598
0
pub fn constructor_x64_div8<C: Context>(
10599
0
    ctx: &mut C,
10600
0
    arg0: Gpr,
10601
0
    arg1: &GprMem,
10602
0
    arg2: &DivSignedness,
10603
0
    arg3: &TrapCode,
10604
0
) -> Gpr {
10605
0
    let v4 = C::temp_writable_gpr(ctx);
10606
0
    let v5 = MInst::Div8 {
10607
0
        sign: arg2.clone(),
10608
0
        trap: arg3.clone(),
10609
0
        divisor: arg1.clone(),
10610
0
        dividend: arg0,
10611
0
        dst: v4,
10612
0
    };
10613
0
    let v6 = C::emit(ctx, &v5);
10614
0
    let v7 = C::writable_gpr_to_gpr(ctx, v4);
10615
0
    // Rule at src/isa/x64/inst.isle line 4922.
10616
0
    return v7;
10617
0
}
10618
10619
// Generated as internal constructor for term x64_div.
10620
4.34k
pub fn constructor_x64_div<C: Context>(
10621
4.34k
    ctx: &mut C,
10622
4.34k
    arg0: Gpr,
10623
4.34k
    arg1: Gpr,
10624
4.34k
    arg2: &GprMem,
10625
4.34k
    arg3: &OperandSize,
10626
4.34k
    arg4: &DivSignedness,
10627
4.34k
    arg5: &TrapCode,
10628
4.34k
) -> ValueRegs {
10629
4.34k
    let v6 = C::temp_writable_gpr(ctx);
10630
4.34k
    let v7 = C::temp_writable_gpr(ctx);
10631
4.34k
    let v8 = MInst::Div {
10632
4.34k
        size: arg3.clone(),
10633
4.34k
        sign: arg4.clone(),
10634
4.34k
        trap: arg5.clone(),
10635
4.34k
        divisor: arg2.clone(),
10636
4.34k
        dividend_lo: arg0,
10637
4.34k
        dividend_hi: arg1,
10638
4.34k
        dst_quotient: v6,
10639
4.34k
        dst_remainder: v7,
10640
4.34k
    };
10641
4.34k
    let v9 = C::emit(ctx, &v8);
10642
4.34k
    let v10 = constructor_writable_gpr_to_r_reg(ctx, v6);
10643
4.34k
    let v11 = constructor_writable_gpr_to_r_reg(ctx, v7);
10644
4.34k
    let v12 = C::value_regs(ctx, v10, v11);
10645
4.34k
    // Rule at src/isa/x64/inst.isle line 4932.
10646
4.34k
    return v12;
10647
4.34k
}
10648
10649
// Generated as internal constructor for term x64_div_quotient.
10650
3.62k
pub fn constructor_x64_div_quotient<C: Context>(
10651
3.62k
    ctx: &mut C,
10652
3.62k
    arg0: Gpr,
10653
3.62k
    arg1: Gpr,
10654
3.62k
    arg2: &GprMem,
10655
3.62k
    arg3: &OperandSize,
10656
3.62k
    arg4: &DivSignedness,
10657
3.62k
    arg5: &TrapCode,
10658
3.62k
) -> ValueRegs {
10659
3.62k
    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
10660
3.62k
    let v8 = C::value_regs_get(ctx, v6, 0x0);
10661
3.62k
    let v9 = C::value_reg(ctx, v8);
10662
3.62k
    // Rule at src/isa/x64/inst.isle line 4940.
10663
3.62k
    return v9;
10664
3.62k
}
10665
10666
// Generated as internal constructor for term x64_div_remainder.
10667
729
pub fn constructor_x64_div_remainder<C: Context>(
10668
729
    ctx: &mut C,
10669
729
    arg0: Gpr,
10670
729
    arg1: Gpr,
10671
729
    arg2: &GprMem,
10672
729
    arg3: &OperandSize,
10673
729
    arg4: &DivSignedness,
10674
729
    arg5: &TrapCode,
10675
729
) -> ValueRegs {
10676
729
    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
10677
729
    let v8 = C::value_regs_get(ctx, v6, 0x1);
10678
729
    let v9 = C::value_reg(ctx, v8);
10679
729
    // Rule at src/isa/x64/inst.isle line 4945.
10680
729
    return v9;
10681
729
}
10682
10683
// Generated as internal constructor for term x64_sign_extend_data.
10684
465
pub fn constructor_x64_sign_extend_data<C: Context>(
10685
465
    ctx: &mut C,
10686
465
    arg0: Gpr,
10687
465
    arg1: &OperandSize,
10688
465
) -> Gpr {
10689
465
    let v2 = C::temp_writable_gpr(ctx);
10690
465
    let v3 = MInst::SignExtendData {
10691
465
        size: arg1.clone(),
10692
465
        src: arg0,
10693
465
        dst: v2,
10694
465
    };
10695
465
    let v4 = C::emit(ctx, &v3);
10696
465
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
10697
465
    // Rule at src/isa/x64/inst.isle line 4950.
10698
465
    return v5;
10699
465
}
10700
10701
// Generated as internal constructor for term read_pinned_gpr.
10702
0
pub fn constructor_read_pinned_gpr<C: Context>(
10703
0
    ctx: &mut C,
10704
0
) -> Gpr {
10705
0
    let v0 = C::preg_pinned(ctx);
10706
0
    let v1 = constructor_mov_from_preg(ctx, v0);
10707
0
    let v2 = C::gpr_new(ctx, v1);
10708
0
    // Rule at src/isa/x64/inst.isle line 4958.
10709
0
    return v2;
10710
0
}
10711
10712
// Generated as internal constructor for term write_pinned_gpr.
10713
0
pub fn constructor_write_pinned_gpr<C: Context>(
10714
0
    ctx: &mut C,
10715
0
    arg0: Gpr,
10716
0
) -> SideEffectNoResult {
10717
0
    let v1 = C::preg_pinned(ctx);
10718
0
    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
10719
0
    // Rule at src/isa/x64/inst.isle line 4962.
10720
0
    return v2.clone();
10721
0
}
10722
10723
// Generated as internal constructor for term elf_tls_get_addr.
10724
0
pub fn constructor_elf_tls_get_addr<C: Context>(
10725
0
    ctx: &mut C,
10726
0
    arg0: ExternalName,
10727
0
) -> Gpr {
10728
0
    let v1 = C::temp_writable_gpr(ctx);
10729
0
    let v2 = MInst::ElfTlsGetAddr {
10730
0
        symbol: arg0,
10731
0
        dst: v1,
10732
0
    };
10733
0
    let v3 = C::emit(ctx, &v2);
10734
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
10735
0
    // Rule at src/isa/x64/inst.isle line 5004.
10736
0
    return v4;
10737
0
}
10738
10739
// Generated as internal constructor for term macho_tls_get_addr.
10740
0
pub fn constructor_macho_tls_get_addr<C: Context>(
10741
0
    ctx: &mut C,
10742
0
    arg0: ExternalName,
10743
0
) -> Gpr {
10744
0
    let v1 = C::temp_writable_gpr(ctx);
10745
0
    let v2 = MInst::MachOTlsGetAddr {
10746
0
        symbol: arg0,
10747
0
        dst: v1,
10748
0
    };
10749
0
    let v3 = C::emit(ctx, &v2);
10750
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
10751
0
    // Rule at src/isa/x64/inst.isle line 5011.
10752
0
    return v4;
10753
0
}
10754
10755
// Generated as internal constructor for term coff_tls_get_addr.
10756
0
pub fn constructor_coff_tls_get_addr<C: Context>(
10757
0
    ctx: &mut C,
10758
0
    arg0: ExternalName,
10759
0
) -> Gpr {
10760
0
    let v1 = C::temp_writable_gpr(ctx);
10761
0
    let v2 = C::temp_writable_gpr(ctx);
10762
0
    let v3 = MInst::CoffTlsGetAddr {
10763
0
        symbol: arg0,
10764
0
        dst: v1,
10765
0
        tmp: v2,
10766
0
    };
10767
0
    let v4 = C::emit(ctx, &v3);
10768
0
    let v5 = C::writable_gpr_to_gpr(ctx, v1);
10769
0
    // Rule at src/isa/x64/inst.isle line 5018.
10770
0
    return v5;
10771
0
}
10772
10773
// Generated as internal constructor for term reg_to_xmm_mem.
10774
0
pub fn constructor_reg_to_xmm_mem<C: Context>(
10775
0
    ctx: &mut C,
10776
0
    arg0: Reg,
10777
0
) -> XmmMem {
10778
0
    let v1 = C::xmm_new(ctx, arg0);
10779
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
10780
0
    // Rule at src/isa/x64/inst.isle line 5105.
10781
0
    return v2.clone();
10782
0
}
10783
10784
// Generated as internal constructor for term xmm_to_reg_mem.
10785
0
pub fn constructor_xmm_to_reg_mem<C: Context>(
10786
0
    ctx: &mut C,
10787
0
    arg0: Reg,
10788
0
) -> XmmMem {
10789
0
    let v1 = C::xmm_new(ctx, arg0);
10790
0
    let v2 = C::xmm_to_reg(ctx, v1);
10791
0
    let v3 = RegMem::Reg {
10792
0
        reg: v2,
10793
0
    };
10794
0
    let v4 = &C::reg_mem_to_xmm_mem(ctx, &v3);
10795
0
    // Rule at src/isa/x64/inst.isle line 5108.
10796
0
    return v4.clone();
10797
0
}
10798
10799
// Generated as internal constructor for term writable_gpr_to_r_reg.
10800
1.38M
pub fn constructor_writable_gpr_to_r_reg<C: Context>(
10801
1.38M
    ctx: &mut C,
10802
1.38M
    arg0: WritableGpr,
10803
1.38M
) -> Reg {
10804
1.38M
    let v1 = C::writable_gpr_to_reg(ctx, arg0);
10805
1.38M
    let v2 = C::writable_reg_to_reg(ctx, v1);
10806
1.38M
    // Rule at src/isa/x64/inst.isle line 5112.
10807
1.38M
    return v2;
10808
1.38M
}
10809
10810
// Generated as internal constructor for term writable_gpr_to_gpr_mem.
10811
0
pub fn constructor_writable_gpr_to_gpr_mem<C: Context>(
10812
0
    ctx: &mut C,
10813
0
    arg0: WritableGpr,
10814
0
) -> GprMem {
10815
0
    let v1 = C::writable_gpr_to_gpr(ctx, arg0);
10816
0
    let v2 = &C::gpr_to_gpr_mem(ctx, v1);
10817
0
    // Rule at src/isa/x64/inst.isle line 5115.
10818
0
    return v2.clone();
10819
0
}
10820
10821
// Generated as internal constructor for term writable_gpr_to_value_regs.
10822
0
pub fn constructor_writable_gpr_to_value_regs<C: Context>(
10823
0
    ctx: &mut C,
10824
0
    arg0: WritableGpr,
10825
0
) -> ValueRegs {
10826
0
    let v1 = constructor_writable_gpr_to_r_reg(ctx, arg0);
10827
0
    let v2 = C::value_reg(ctx, v1);
10828
0
    // Rule at src/isa/x64/inst.isle line 5118.
10829
0
    return v2;
10830
0
}
10831
10832
// Generated as internal constructor for term writable_xmm_to_r_reg.
10833
0
pub fn constructor_writable_xmm_to_r_reg<C: Context>(
10834
0
    ctx: &mut C,
10835
0
    arg0: WritableXmm,
10836
0
) -> Reg {
10837
0
    let v1 = C::writable_xmm_to_reg(ctx, arg0);
10838
0
    let v2 = C::writable_reg_to_reg(ctx, v1);
10839
0
    // Rule at src/isa/x64/inst.isle line 5121.
10840
0
    return v2;
10841
0
}
10842
10843
// Generated as internal constructor for term writable_xmm_to_xmm_mem.
10844
0
pub fn constructor_writable_xmm_to_xmm_mem<C: Context>(
10845
0
    ctx: &mut C,
10846
0
    arg0: WritableXmm,
10847
0
) -> XmmMem {
10848
0
    let v1 = C::writable_xmm_to_xmm(ctx, arg0);
10849
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
10850
0
    // Rule at src/isa/x64/inst.isle line 5124.
10851
0
    return v2.clone();
10852
0
}
10853
10854
// Generated as internal constructor for term writable_xmm_to_value_regs.
10855
0
pub fn constructor_writable_xmm_to_value_regs<C: Context>(
10856
0
    ctx: &mut C,
10857
0
    arg0: WritableXmm,
10858
0
) -> ValueRegs {
10859
0
    let v1 = constructor_writable_xmm_to_r_reg(ctx, arg0);
10860
0
    let v2 = C::value_reg(ctx, v1);
10861
0
    // Rule at src/isa/x64/inst.isle line 5127.
10862
0
    return v2;
10863
0
}
10864
10865
// Generated as internal constructor for term synthetic_amode_to_gpr_mem.
10866
679k
pub fn constructor_synthetic_amode_to_gpr_mem<C: Context>(
10867
679k
    ctx: &mut C,
10868
679k
    arg0: &SyntheticAmode,
10869
679k
) -> GprMem {
10870
679k
    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
10871
679k
    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
10872
679k
    // Rule at src/isa/x64/inst.isle line 5134.
10873
679k
    return v2.clone();
10874
679k
}
10875
10876
// Generated as internal constructor for term amode_to_gpr_mem.
10877
679k
pub fn constructor_amode_to_gpr_mem<C: Context>(
10878
679k
    ctx: &mut C,
10879
679k
    arg0: &Amode,
10880
679k
) -> GprMem {
10881
679k
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
10882
679k
    let v2 = &constructor_synthetic_amode_to_gpr_mem(ctx, v1);
10883
679k
    // Rule at src/isa/x64/inst.isle line 5132.
10884
679k
    return v2.clone();
10885
679k
}
10886
10887
// Generated as internal constructor for term amode_to_xmm_mem.
10888
0
pub fn constructor_amode_to_xmm_mem<C: Context>(
10889
0
    ctx: &mut C,
10890
0
    arg0: &Amode,
10891
0
) -> XmmMem {
10892
0
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
10893
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
10894
0
    // Rule at src/isa/x64/inst.isle line 5137.
10895
0
    return v2.clone();
10896
0
}
10897
10898
// Generated as internal constructor for term synthetic_amode_to_xmm_mem.
10899
0
pub fn constructor_synthetic_amode_to_xmm_mem<C: Context>(
10900
0
    ctx: &mut C,
10901
0
    arg0: &SyntheticAmode,
10902
0
) -> XmmMem {
10903
0
    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
10904
0
    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
10905
0
    // Rule at src/isa/x64/inst.isle line 5140.
10906
0
    return v2.clone();
10907
0
}
10908
10909
// Generated as internal constructor for term const_to_xmm_mem.
10910
0
pub fn constructor_const_to_xmm_mem<C: Context>(
10911
0
    ctx: &mut C,
10912
0
    arg0: VCodeConstant,
10913
0
) -> XmmMem {
10914
0
    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
10915
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
10916
0
    // Rule at src/isa/x64/inst.isle line 5145.
10917
0
    return v2.clone();
10918
0
}
10919
10920
// Generated as internal constructor for term const_to_reg_mem.
10921
0
pub fn constructor_const_to_reg_mem<C: Context>(
10922
0
    ctx: &mut C,
10923
0
    arg0: VCodeConstant,
10924
0
) -> RegMem {
10925
0
    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
10926
0
    let v2 = RegMem::Mem {
10927
0
        addr: v1.clone(),
10928
0
    };
10929
0
    // Rule at src/isa/x64/inst.isle line 5147.
10930
0
    return v2;
10931
0
}
10932
10933
// Generated as internal constructor for term xmm_to_xmm_mem_aligned.
10934
0
pub fn constructor_xmm_to_xmm_mem_aligned<C: Context>(
10935
0
    ctx: &mut C,
10936
0
    arg0: Xmm,
10937
0
) -> XmmMemAligned {
10938
0
    let v1 = &C::xmm_to_xmm_mem(ctx, arg0);
10939
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10940
0
    // Rule at src/isa/x64/inst.isle line 5150.
10941
0
    return v2.clone();
10942
0
}
10943
10944
// Generated as internal constructor for term amode_to_xmm_mem_aligned.
10945
0
pub fn constructor_amode_to_xmm_mem_aligned<C: Context>(
10946
0
    ctx: &mut C,
10947
0
    arg0: &Amode,
10948
0
) -> XmmMemAligned {
10949
0
    let v1 = &constructor_amode_to_xmm_mem(ctx, arg0);
10950
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10951
0
    // Rule at src/isa/x64/inst.isle line 5152.
10952
0
    return v2.clone();
10953
0
}
10954
10955
// Generated as internal constructor for term synthetic_amode_to_xmm_mem_aligned.
10956
0
pub fn constructor_synthetic_amode_to_xmm_mem_aligned<C: Context>(
10957
0
    ctx: &mut C,
10958
0
    arg0: &SyntheticAmode,
10959
0
) -> XmmMemAligned {
10960
0
    let v1 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
10961
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10962
0
    // Rule at src/isa/x64/inst.isle line 5154.
10963
0
    return v2.clone();
10964
0
}
10965
10966
// Generated as internal constructor for term put_in_xmm_mem_aligned.
10967
0
pub fn constructor_put_in_xmm_mem_aligned<C: Context>(
10968
0
    ctx: &mut C,
10969
0
    arg0: Value,
10970
0
) -> XmmMemAligned {
10971
0
    let v1 = &C::put_in_xmm_mem(ctx, arg0);
10972
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10973
0
    // Rule at src/isa/x64/inst.isle line 5156.
10974
0
    return v2.clone();
10975
0
}
10976
10977
// Generated as internal constructor for term mov_to_preg.
10978
0
pub fn constructor_mov_to_preg<C: Context>(
10979
0
    ctx: &mut C,
10980
0
    arg0: PReg,
10981
0
    arg1: Gpr,
10982
0
) -> SideEffectNoResult {
10983
0
    let v2 = MInst::MovToPReg {
10984
0
        src: arg1,
10985
0
        dst: arg0,
10986
0
    };
10987
0
    let v3 = SideEffectNoResult::Inst {
10988
0
        inst: v2,
10989
0
    };
10990
0
    // Rule at src/isa/x64/inst.isle line 5159.
10991
0
    return v3;
10992
0
}
10993
10994
// Generated as internal constructor for term x64_rbp.
10995
4.92k
pub fn constructor_x64_rbp<C: Context>(
10996
4.92k
    ctx: &mut C,
10997
4.92k
) -> Reg {
10998
4.92k
    let v0 = C::preg_rbp(ctx);
10999
4.92k
    let v1 = constructor_mov_from_preg(ctx, v0);
11000
4.92k
    // Rule at src/isa/x64/inst.isle line 5172.
11001
4.92k
    return v1;
11002
4.92k
}
11003
11004
// Generated as internal constructor for term x64_rsp.
11005
16.3k
pub fn constructor_x64_rsp<C: Context>(
11006
16.3k
    ctx: &mut C,
11007
16.3k
) -> Reg {
11008
16.3k
    let v0 = C::preg_rsp(ctx);
11009
16.3k
    let v1 = constructor_mov_from_preg(ctx, v0);
11010
16.3k
    // Rule at src/isa/x64/inst.isle line 5176.
11011
16.3k
    return v1;
11012
16.3k
}
11013
11014
// Generated as internal constructor for term lower.
11015
5.79M
pub fn constructor_lower<C: Context>(
11016
5.79M
    ctx: &mut C,
11017
5.79M
    arg0: Inst,
11018
5.79M
) -> Option<InstOutput> {
11019
5.79M
    let v6 = &C::inst_data(ctx, arg0);
11020
5.79M
    match v6 {
11021
        &InstructionData::AtomicCas {
11022
0
            opcode: ref v1728,
11023
0
            args: ref v1729,
11024
0
            flags: v1730,
11025
0
        } => {
11026
0
            if let &Opcode::AtomicCas = v1728 {
11027
0
                let v1 = C::first_result(ctx, arg0);
11028
0
                if let Some(v2) = v1 {
11029
0
                    let v3 = C::value_type(ctx, v2);
11030
0
                    let v4 = C::fits_in_64(ctx, v3);
11031
0
                    if let Some(v5) = v4 {
11032
0
                        let v1703 = C::ty_int(ctx, v3);
11033
0
                        if let Some(v1704) = v1703 {
11034
0
                            let v1731 = C::unpack_value_array_3(ctx, v1729);
11035
0
                            let v1735 = constructor_put_in_gpr(ctx, v1731.1);
11036
0
                            let v1736 = constructor_put_in_gpr(ctx, v1731.2);
11037
0
                            let v1737 = C::zero_offset(ctx);
11038
0
                            let v1738 = &constructor_to_amode(ctx, v1730, v1731.0, v1737);
11039
0
                            let v1739 = &C::amode_to_synthetic_amode(ctx, v1738);
11040
0
                            let v1740 = constructor_x64_cmpxchg(ctx, v5, v1735, v1736, v1739);
11041
0
                            let v1741 = constructor_output_gpr(ctx, v1740);
11042
0
                            // Rule at src/isa/x64/lower.isle line 3215.
11043
0
                            return Some(v1741);
11044
0
                        }
11045
0
                    }
11046
0
                }
11047
0
            }
11048
        }
11049
        &InstructionData::AtomicRmw {
11050
0
            opcode: ref v1742,
11051
0
            args: ref v1743,
11052
0
            flags: v1744,
11053
0
            op: ref v1745,
11054
0
        } => {
11055
0
            if let &Opcode::AtomicRmw = v1742 {
11056
0
                let v1 = C::first_result(ctx, arg0);
11057
0
                if let Some(v2) = v1 {
11058
0
                    let v3 = C::value_type(ctx, v2);
11059
0
                    let v4 = C::fits_in_64(ctx, v3);
11060
0
                    if let Some(v5) = v4 {
11061
0
                        let v1703 = C::ty_int(ctx, v3);
11062
0
                        if let Some(v1704) = v1703 {
11063
0
                            let v1749 = &C::atomic_rmw_op_to_mach_atomic_rmw_op(ctx, v1745);
11064
0
                            let v1705 = C::zero_offset(ctx);
11065
0
                            let v1746 = C::unpack_value_array_2(ctx, v1743);
11066
0
                            let v1750 = &constructor_to_amode(ctx, v1744, v1746.0, v1705);
11067
0
                            let v1751 = &C::amode_to_synthetic_amode(ctx, v1750);
11068
0
                            let v1752 = constructor_put_in_gpr(ctx, v1746.1);
11069
0
                            let v1753 = constructor_x64_atomic_rmw_seq(ctx, v5, v1749, v1751, v1752);
11070
0
                            let v1754 = constructor_output_gpr(ctx, v1753);
11071
0
                            // Rule at src/isa/x64/lower.isle line 3231.
11072
0
                            return Some(v1754);
11073
0
                        }
11074
0
                    }
11075
0
                }
11076
0
            }
11077
        }
11078
        &InstructionData::Binary {
11079
1.32M
            opcode: ref v36,
11080
1.32M
            args: ref v37,
11081
1.32M
        } => {
11082
1.32M
            match v36 {
11083
                &Opcode::Swizzle => {
11084
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
11085
0
                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
11086
0
                    let v2354 = C::emit_u128_le_const(ctx, 0x70707070707070707070707070707070);
11087
0
                    let v2355 = &constructor_const_to_xmm_mem(ctx, v2354);
11088
0
                    let v2356 = constructor_x64_paddusb(ctx, v1249, v2355);
11089
0
                    let v343 = constructor_put_in_xmm(ctx, v38.0);
11090
0
                    let v2357 = C::xmm_to_reg(ctx, v2356);
11091
0
                    let v2358 = &constructor_xmm_to_reg_mem(ctx, v2357);
11092
0
                    let v2359 = &C::xmm_mem_to_reg_mem(ctx, v2358);
11093
0
                    let v2360 = constructor_lower_pshufb(ctx, v343, v2359);
11094
0
                    let v2361 = constructor_output_xmm(ctx, v2360);
11095
0
                    // Rule at src/isa/x64/lower.isle line 4341.
11096
0
                    return Some(v2361);
11097
                }
11098
                &Opcode::X86Pshufb => {
11099
0
                    let v525 = C::use_ssse3(ctx);
11100
0
                    if v525 == true {
11101
0
                        let v38 = C::unpack_value_array_2(ctx, v37);
11102
0
                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11103
0
                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11104
0
                        let v2362 = constructor_x64_pshufb(ctx, v68, v69);
11105
0
                        let v2363 = constructor_output_xmm(ctx, v2362);
11106
0
                        // Rule at src/isa/x64/lower.isle line 4347.
11107
0
                        return Some(v2363);
11108
0
                    }
11109
                }
11110
                &Opcode::Smin => {
11111
0
                    let v1 = C::first_result(ctx, arg0);
11112
0
                    if let Some(v2) = v1 {
11113
0
                        let v3 = C::value_type(ctx, v2);
11114
0
                        let v740 = C::ty_vec128(ctx, v3);
11115
0
                        if let Some(v741) = v740 {
11116
0
                            let v744 = constructor_has_pmins(ctx, v741);
11117
0
                            if v744 == true {
11118
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
11119
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
11120
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11121
0
                                let v745 = constructor_x64_pmins(ctx, v741, v68, v69);
11122
0
                                let v746 = constructor_output_xmm(ctx, v745);
11123
0
                                // Rule at src/isa/x64/lower.isle line 1687.
11124
0
                                return Some(v746);
11125
0
                            }
11126
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11127
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11128
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11129
0
                            let v316 = &C::xmm_to_xmm_mem(ctx, v68);
11130
0
                            let v747 = constructor_x64_pcmpgt(ctx, v741, v444, v316);
11131
0
                            let v318 = &C::xmm_to_xmm_mem(ctx, v68);
11132
0
                            let v748 = constructor_x64_pand(ctx, v747, v318);
11133
0
                            let v449 = &C::xmm_to_xmm_mem(ctx, v444);
11134
0
                            let v749 = constructor_x64_pandn(ctx, v747, v449);
11135
0
                            let v750 = &C::xmm_to_xmm_mem(ctx, v749);
11136
0
                            let v751 = constructor_x64_por(ctx, v748, v750);
11137
0
                            let v752 = constructor_output_xmm(ctx, v751);
11138
0
                            // Rule at src/isa/x64/lower.isle line 1691.
11139
0
                            return Some(v752);
11140
0
                        }
11141
0
                        let v4 = C::fits_in_64(ctx, v3);
11142
0
                        if let Some(v5) = v4 {
11143
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11144
0
                            let v735 = constructor_cmp_and_choose(ctx, v5, &CC::L, v38.0, v38.1);
11145
0
                            let v736 = C::output(ctx, v735);
11146
0
                            // Rule at src/isa/x64/lower.isle line 1637.
11147
0
                            return Some(v736);
11148
0
                        }
11149
0
                    }
11150
                }
11151
                &Opcode::Umin => {
11152
1.75k
                    let v1 = C::first_result(ctx, arg0);
11153
1.75k
                    if let Some(v2) = v1 {
11154
1.75k
                        let v3 = C::value_type(ctx, v2);
11155
1.75k
                        let v740 = C::ty_vec128(ctx, v3);
11156
1.75k
                        if let Some(
v7410
) = v740 {
11157
0
                            let v774 = constructor_has_pminu(ctx, v741);
11158
0
                            if v774 == true {
11159
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
11160
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
11161
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11162
0
                                let v775 = constructor_x64_pminu(ctx, v741, v68, v69);
11163
0
                                let v776 = constructor_output_xmm(ctx, v775);
11164
0
                                // Rule at src/isa/x64/lower.isle line 1739.
11165
0
                                return Some(v776);
11166
0
                            }
11167
1.75k
                        }
11168
1.75k
                        if v3 == I16X8 {
11169
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11170
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11171
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11172
0
                            let v150 = constructor_x64_psubusw(ctx, v68, v69);
11173
0
                            let v777 = &C::xmm_to_xmm_mem(ctx, v150);
11174
0
                            let v778 = constructor_x64_psubw(ctx, v68, v777);
11175
0
                            let v779 = constructor_output_xmm(ctx, v778);
11176
0
                            // Rule at src/isa/x64/lower.isle line 1745.
11177
0
                            return Some(v779);
11178
1.75k
                        }
11179
1.75k
                        if let Some(
v7410
) = v740 {
11180
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11181
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11182
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11183
0
                            let v760 = constructor_flip_high_bit_mask(ctx, v741);
11184
0
                            let v761 = &C::xmm_to_xmm_mem(ctx, v760);
11185
0
                            let v762 = constructor_x64_pxor(ctx, v68, v761);
11186
0
                            let v763 = &C::xmm_to_xmm_mem(ctx, v760);
11187
0
                            let v764 = constructor_x64_pxor(ctx, v444, v763);
11188
0
                            let v780 = &C::xmm_to_xmm_mem(ctx, v762);
11189
0
                            let v781 = constructor_x64_pcmpgt(ctx, v741, v764, v780);
11190
0
                            let v767 = &C::xmm_to_xmm_mem(ctx, v68);
11191
0
                            let v782 = constructor_x64_pand(ctx, v781, v767);
11192
0
                            let v769 = &C::xmm_to_xmm_mem(ctx, v444);
11193
0
                            let v783 = constructor_x64_pandn(ctx, v781, v769);
11194
0
                            let v784 = &C::xmm_to_xmm_mem(ctx, v783);
11195
0
                            let v785 = constructor_x64_por(ctx, v782, v784);
11196
0
                            let v786 = constructor_output_xmm(ctx, v785);
11197
0
                            // Rule at src/isa/x64/lower.isle line 1750.
11198
0
                            return Some(v786);
11199
1.75k
                        }
11200
1.75k
                        let v4 = C::fits_in_64(ctx, v3);
11201
1.75k
                        if let Some(v5) = v4 {
11202
1.75k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11203
1.75k
                            let v729 = constructor_cmp_and_choose(ctx, v5, &CC::B, v38.0, v38.1);
11204
1.75k
                            let v730 = C::output(ctx, v729);
11205
1.75k
                            // Rule at src/isa/x64/lower.isle line 1631.
11206
1.75k
                            return Some(v730);
11207
0
                        }
11208
0
                    }
11209
                }
11210
                &Opcode::Smax => {
11211
0
                    let v1 = C::first_result(ctx, arg0);
11212
0
                    if let Some(v2) = v1 {
11213
0
                        let v3 = C::value_type(ctx, v2);
11214
0
                        let v740 = C::ty_vec128(ctx, v3);
11215
0
                        if let Some(v741) = v740 {
11216
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11217
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11218
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11219
0
                            let v742 = constructor_lower_vec_smax(ctx, v741, v68, v444);
11220
0
                            let v743 = constructor_output_xmm(ctx, v742);
11221
0
                            // Rule at src/isa/x64/lower.isle line 1667.
11222
0
                            return Some(v743);
11223
0
                        }
11224
0
                        let v4 = C::fits_in_64(ctx, v3);
11225
0
                        if let Some(v5) = v4 {
11226
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11227
0
                            let v738 = constructor_cmp_and_choose(ctx, v5, &CC::NL, v38.0, v38.1);
11228
0
                            let v739 = C::output(ctx, v738);
11229
0
                            // Rule at src/isa/x64/lower.isle line 1640.
11230
0
                            return Some(v739);
11231
0
                        }
11232
0
                    }
11233
                }
11234
                &Opcode::Umax => {
11235
2.89k
                    let v1 = C::first_result(ctx, arg0);
11236
2.89k
                    if let Some(v2) = v1 {
11237
2.89k
                        let v3 = C::value_type(ctx, v2);
11238
2.89k
                        let v740 = C::ty_vec128(ctx, v3);
11239
2.89k
                        if let Some(
v7410
) = v740 {
11240
0
                            let v753 = constructor_has_pmaxu(ctx, v741);
11241
0
                            if v753 == true {
11242
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
11243
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
11244
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11245
0
                                let v754 = constructor_x64_pmaxu(ctx, v741, v68, v69);
11246
0
                                let v755 = constructor_output_xmm(ctx, v754);
11247
0
                                // Rule at src/isa/x64/lower.isle line 1703.
11248
0
                                return Some(v755);
11249
0
                            }
11250
2.89k
                        }
11251
2.89k
                        if v3 == I16X8 {
11252
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11253
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11254
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11255
0
                            let v316 = &C::xmm_to_xmm_mem(ctx, v68);
11256
0
                            let v756 = constructor_x64_psubusw(ctx, v444, v316);
11257
0
                            let v757 = &C::xmm_to_xmm_mem(ctx, v756);
11258
0
                            let v758 = constructor_x64_paddw(ctx, v68, v757);
11259
0
                            let v759 = constructor_output_xmm(ctx, v758);
11260
0
                            // Rule at src/isa/x64/lower.isle line 1709.
11261
0
                            return Some(v759);
11262
2.89k
                        }
11263
2.89k
                        if let Some(
v7410
) = v740 {
11264
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11265
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11266
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11267
0
                            let v760 = constructor_flip_high_bit_mask(ctx, v741);
11268
0
                            let v761 = &C::xmm_to_xmm_mem(ctx, v760);
11269
0
                            let v762 = constructor_x64_pxor(ctx, v68, v761);
11270
0
                            let v763 = &C::xmm_to_xmm_mem(ctx, v760);
11271
0
                            let v764 = constructor_x64_pxor(ctx, v444, v763);
11272
0
                            let v765 = &C::xmm_to_xmm_mem(ctx, v764);
11273
0
                            let v766 = constructor_x64_pcmpgt(ctx, v741, v762, v765);
11274
0
                            let v767 = &C::xmm_to_xmm_mem(ctx, v68);
11275
0
                            let v768 = constructor_x64_pand(ctx, v766, v767);
11276
0
                            let v769 = &C::xmm_to_xmm_mem(ctx, v444);
11277
0
                            let v770 = constructor_x64_pandn(ctx, v766, v769);
11278
0
                            let v771 = &C::xmm_to_xmm_mem(ctx, v770);
11279
0
                            let v772 = constructor_x64_por(ctx, v768, v771);
11280
0
                            let v773 = constructor_output_xmm(ctx, v772);
11281
0
                            // Rule at src/isa/x64/lower.isle line 1716.
11282
0
                            return Some(v773);
11283
2.89k
                        }
11284
2.89k
                        let v4 = C::fits_in_64(ctx, v3);
11285
2.89k
                        if let Some(v5) = v4 {
11286
2.89k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11287
2.89k
                            let v732 = constructor_cmp_and_choose(ctx, v5, &CC::NB, v38.0, v38.1);
11288
2.89k
                            let v733 = C::output(ctx, v732);
11289
2.89k
                            // Rule at src/isa/x64/lower.isle line 1634.
11290
2.89k
                            return Some(v733);
11291
0
                        }
11292
0
                    }
11293
                }
11294
                &Opcode::AvgRound => {
11295
0
                    let v1 = C::first_result(ctx, arg0);
11296
0
                    if let Some(v2) = v1 {
11297
0
                        let v3 = C::value_type(ctx, v2);
11298
0
                        let v64 = C::multi_lane(ctx, v3);
11299
0
                        if let Some(v65) = v64 {
11300
0
                            match v65.0 {
11301
                                0x8 => {
11302
0
                                    if v65.1 == 0x10 {
11303
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11304
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11305
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11306
0
                                        let v415 = constructor_x64_pavgb(ctx, v68, v69);
11307
0
                                        let v416 = constructor_output_xmm(ctx, v415);
11308
0
                                        // Rule at src/isa/x64/lower.isle line 956.
11309
0
                                        return Some(v416);
11310
0
                                    }
11311
                                }
11312
                                0x10 => {
11313
0
                                    if v65.1 == 0x8 {
11314
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11315
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11316
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11317
0
                                        let v417 = constructor_x64_pavgw(ctx, v68, v69);
11318
0
                                        let v418 = constructor_output_xmm(ctx, v417);
11319
0
                                        // Rule at src/isa/x64/lower.isle line 960.
11320
0
                                        return Some(v418);
11321
0
                                    }
11322
                                }
11323
0
                                _ => {}
11324
                            }
11325
0
                        }
11326
0
                    }
11327
                }
11328
                &Opcode::UaddSat => {
11329
0
                    let v1 = C::first_result(ctx, arg0);
11330
0
                    if let Some(v2) = v1 {
11331
0
                        let v3 = C::value_type(ctx, v2);
11332
0
                        let v64 = C::multi_lane(ctx, v3);
11333
0
                        if let Some(v65) = v64 {
11334
0
                            match v65.0 {
11335
                                0x8 => {
11336
0
                                    if v65.1 == 0x10 {
11337
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11338
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11339
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11340
0
                                        let v126 = constructor_x64_paddusb(ctx, v68, v69);
11341
0
                                        let v127 = constructor_output_xmm(ctx, v126);
11342
0
                                        // Rule at src/isa/x64/lower.isle line 194.
11343
0
                                        return Some(v127);
11344
0
                                    }
11345
                                }
11346
                                0x10 => {
11347
0
                                    if v65.1 == 0x8 {
11348
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11349
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11350
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11351
0
                                        let v128 = constructor_x64_paddusw(ctx, v68, v69);
11352
0
                                        let v129 = constructor_output_xmm(ctx, v128);
11353
0
                                        // Rule at src/isa/x64/lower.isle line 198.
11354
0
                                        return Some(v129);
11355
0
                                    }
11356
                                }
11357
0
                                _ => {}
11358
                            }
11359
0
                        }
11360
0
                    }
11361
                }
11362
                &Opcode::SaddSat => {
11363
0
                    let v1 = C::first_result(ctx, arg0);
11364
0
                    if let Some(v2) = v1 {
11365
0
                        let v3 = C::value_type(ctx, v2);
11366
0
                        let v64 = C::multi_lane(ctx, v3);
11367
0
                        if let Some(v65) = v64 {
11368
0
                            match v65.0 {
11369
                                0x8 => {
11370
0
                                    if v65.1 == 0x10 {
11371
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11372
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11373
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11374
0
                                        let v122 = constructor_x64_paddsb(ctx, v68, v69);
11375
0
                                        let v123 = constructor_output_xmm(ctx, v122);
11376
0
                                        // Rule at src/isa/x64/lower.isle line 184.
11377
0
                                        return Some(v123);
11378
0
                                    }
11379
                                }
11380
                                0x10 => {
11381
0
                                    if v65.1 == 0x8 {
11382
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11383
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11384
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11385
0
                                        let v124 = constructor_x64_paddsw(ctx, v68, v69);
11386
0
                                        let v125 = constructor_output_xmm(ctx, v124);
11387
0
                                        // Rule at src/isa/x64/lower.isle line 188.
11388
0
                                        return Some(v125);
11389
0
                                    }
11390
                                }
11391
0
                                _ => {}
11392
                            }
11393
0
                        }
11394
0
                    }
11395
                }
11396
                &Opcode::UsubSat => {
11397
0
                    let v1 = C::first_result(ctx, arg0);
11398
0
                    if let Some(v2) = v1 {
11399
0
                        let v3 = C::value_type(ctx, v2);
11400
0
                        let v64 = C::multi_lane(ctx, v3);
11401
0
                        if let Some(v65) = v64 {
11402
0
                            match v65.0 {
11403
                                0x8 => {
11404
0
                                    if v65.1 == 0x10 {
11405
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11406
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11407
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11408
0
                                        let v148 = constructor_x64_psubusb(ctx, v68, v69);
11409
0
                                        let v149 = constructor_output_xmm(ctx, v148);
11410
0
                                        // Rule at src/isa/x64/lower.isle line 255.
11411
0
                                        return Some(v149);
11412
0
                                    }
11413
                                }
11414
                                0x10 => {
11415
0
                                    if v65.1 == 0x8 {
11416
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11417
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11418
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11419
0
                                        let v150 = constructor_x64_psubusw(ctx, v68, v69);
11420
0
                                        let v151 = constructor_output_xmm(ctx, v150);
11421
0
                                        // Rule at src/isa/x64/lower.isle line 259.
11422
0
                                        return Some(v151);
11423
0
                                    }
11424
                                }
11425
0
                                _ => {}
11426
                            }
11427
0
                        }
11428
0
                    }
11429
                }
11430
                &Opcode::SsubSat => {
11431
0
                    let v1 = C::first_result(ctx, arg0);
11432
0
                    if let Some(v2) = v1 {
11433
0
                        let v3 = C::value_type(ctx, v2);
11434
0
                        let v64 = C::multi_lane(ctx, v3);
11435
0
                        if let Some(v65) = v64 {
11436
0
                            match v65.0 {
11437
                                0x8 => {
11438
0
                                    if v65.1 == 0x10 {
11439
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11440
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11441
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11442
0
                                        let v144 = constructor_x64_psubsb(ctx, v68, v69);
11443
0
                                        let v145 = constructor_output_xmm(ctx, v144);
11444
0
                                        // Rule at src/isa/x64/lower.isle line 245.
11445
0
                                        return Some(v145);
11446
0
                                    }
11447
                                }
11448
                                0x10 => {
11449
0
                                    if v65.1 == 0x8 {
11450
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11451
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11452
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11453
0
                                        let v146 = constructor_x64_psubsw(ctx, v68, v69);
11454
0
                                        let v147 = constructor_output_xmm(ctx, v146);
11455
0
                                        // Rule at src/isa/x64/lower.isle line 249.
11456
0
                                        return Some(v147);
11457
0
                                    }
11458
                                }
11459
0
                                _ => {}
11460
                            }
11461
0
                        }
11462
0
                    }
11463
                }
11464
                &Opcode::Iadd => {
11465
1.05M
                    let v1 = C::first_result(ctx, arg0);
11466
1.05M
                    if let Some(v2) = v1 {
11467
1.05M
                        let v3 = C::value_type(ctx, v2);
11468
1.05M
                        if v3 == I128 {
11469
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11470
0
                            let v78 = C::put_in_regs(ctx, v38.0);
11471
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
11472
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
11473
0
                            let v83 = C::put_in_regs(ctx, v38.1);
11474
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
11475
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
11476
0
                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
11477
0
                            let v87 = &constructor_x64_add_with_flags_paired(ctx, I64, v80, v86);
11478
0
                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
11479
0
                            let v89 = &constructor_x64_adc_paired(ctx, I64, v82, v88);
11480
0
                            let v90 = constructor_with_flags(ctx, v87, v89);
11481
0
                            let v91 = C::output(ctx, v90);
11482
0
                            // Rule at src/isa/x64/lower.isle line 88.
11483
0
                            return Some(v91);
11484
1.05M
                        }
11485
1.05M
                        let v64 = C::multi_lane(ctx, v3);
11486
1.05M
                        if let Some(
v650
) = v64 {
11487
0
                            match v65.0 {
11488
                                0x8 => {
11489
0
                                    if v65.1 == 0x10 {
11490
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11491
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11492
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11493
0
                                        let v70 = constructor_x64_paddb(ctx, v68, v69);
11494
0
                                        let v71 = constructor_output_xmm(ctx, v70);
11495
0
                                        // Rule at src/isa/x64/lower.isle line 71.
11496
0
                                        return Some(v71);
11497
0
                                    }
11498
                                }
11499
                                0x10 => {
11500
0
                                    if v65.1 == 0x8 {
11501
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11502
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11503
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11504
0
                                        let v72 = constructor_x64_paddw(ctx, v68, v69);
11505
0
                                        let v73 = constructor_output_xmm(ctx, v72);
11506
0
                                        // Rule at src/isa/x64/lower.isle line 75.
11507
0
                                        return Some(v73);
11508
0
                                    }
11509
                                }
11510
                                0x20 => {
11511
0
                                    if v65.1 == 0x4 {
11512
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11513
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11514
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11515
0
                                        let v74 = constructor_x64_paddd(ctx, v68, v69);
11516
0
                                        let v75 = constructor_output_xmm(ctx, v74);
11517
0
                                        // Rule at src/isa/x64/lower.isle line 79.
11518
0
                                        return Some(v75);
11519
0
                                    }
11520
                                }
11521
                                0x40 => {
11522
0
                                    if v65.1 == 0x2 {
11523
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11524
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11525
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11526
0
                                        let v76 = constructor_x64_paddq(ctx, v68, v69);
11527
0
                                        let v77 = constructor_output_xmm(ctx, v76);
11528
0
                                        // Rule at src/isa/x64/lower.isle line 83.
11529
0
                                        return Some(v77);
11530
0
                                    }
11531
                                }
11532
0
                                _ => {}
11533
                            }
11534
1.05M
                        }
11535
1.05M
                        let v4 = C::fits_in_64(ctx, v3);
11536
1.05M
                        if let Some(v5) = v4 {
11537
1.05M
                            let v38 = C::unpack_value_array_2(ctx, v37);
11538
1.05M
                            let v58 = &C::sinkable_load(ctx, v38.0);
11539
1.05M
                            if let Some(
v5915.4k
) = v58 {
11540
15.4k
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
11541
15.4k
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
11542
15.4k
                                let v62 = constructor_x64_add(ctx, v5, v60, v61);
11543
15.4k
                                let v63 = constructor_output_gpr(ctx, v62);
11544
15.4k
                                // Rule at src/isa/x64/lower.isle line 65.
11545
15.4k
                                return Some(v63);
11546
1.04M
                            }
11547
1.04M
                            let v53 = &C::sinkable_load(ctx, v38.1);
11548
1.04M
                            if let Some(
v54142
) = v53 {
11549
142
                                let v41 = constructor_put_in_gpr(ctx, v38.0);
11550
142
                                let v55 = &constructor_sink_load_to_gpr_mem_imm(ctx, v54);
11551
142
                                let v56 = constructor_x64_add(ctx, v5, v41, v55);
11552
142
                                let v57 = constructor_output_gpr(ctx, v56);
11553
142
                                // Rule at src/isa/x64/lower.isle line 62.
11554
142
                                return Some(v57);
11555
1.04M
                            }
11556
0
                        }
11557
1.04M
                        let v45 = C::ty_32_or_64(ctx, v3);
11558
1.04M
                        if let Some(v46) = v45 {
11559
1.04M
                            let v48 = C::zero_offset(ctx);
11560
1.04M
                            let v47 = C::mem_flags_trusted(ctx);
11561
1.04M
                            let v38 = C::unpack_value_array_2(ctx, v37);
11562
1.04M
                            let v49 = &constructor_to_amode_add(ctx, v47, v38.0, v38.1, v48);
11563
1.04M
                            let v50 = &C::amode_to_synthetic_amode(ctx, v49);
11564
1.04M
                            let v51 = constructor_x64_lea(ctx, v46, v50);
11565
1.04M
                            let v52 = constructor_output_gpr(ctx, v51);
11566
1.04M
                            // Rule at src/isa/x64/lower.isle line 56.
11567
1.04M
                            return Some(v52);
11568
0
                        }
11569
0
                        let v34 = C::fits_in_16(ctx, v3);
11570
0
                        if let Some(v35) = v34 {
11571
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11572
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
11573
0
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
11574
0
                            let v43 = constructor_x64_add(ctx, v35, v41, v42);
11575
0
                            let v44 = constructor_output_gpr(ctx, v43);
11576
0
                            // Rule at src/isa/x64/lower.isle line 45.
11577
0
                            return Some(v44);
11578
0
                        }
11579
0
                    }
11580
                }
11581
                &Opcode::Isub => {
11582
67.8k
                    let v1 = C::first_result(ctx, arg0);
11583
67.8k
                    if let Some(v2) = v1 {
11584
67.8k
                        let v3 = C::value_type(ctx, v2);
11585
67.8k
                        if v3 == I128 {
11586
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11587
0
                            let v78 = C::put_in_regs(ctx, v38.0);
11588
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
11589
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
11590
0
                            let v83 = C::put_in_regs(ctx, v38.1);
11591
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
11592
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
11593
0
                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
11594
0
                            let v140 = &constructor_x64_sub_with_flags_paired(ctx, I64, v80, v86);
11595
0
                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
11596
0
                            let v141 = &constructor_x64_sbb_paired(ctx, I64, v82, v88);
11597
0
                            let v142 = constructor_with_flags(ctx, v140, v141);
11598
0
                            let v143 = C::output(ctx, v142);
11599
0
                            // Rule at src/isa/x64/lower.isle line 230.
11600
0
                            return Some(v143);
11601
67.8k
                        }
11602
67.8k
                        let v64 = C::multi_lane(ctx, v3);
11603
67.8k
                        if let Some(
v650
) = v64 {
11604
0
                            match v65.0 {
11605
                                0x8 => {
11606
0
                                    if v65.1 == 0x10 {
11607
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11608
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11609
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11610
0
                                        let v132 = constructor_x64_psubb(ctx, v68, v69);
11611
0
                                        let v133 = constructor_output_xmm(ctx, v132);
11612
0
                                        // Rule at src/isa/x64/lower.isle line 213.
11613
0
                                        return Some(v133);
11614
0
                                    }
11615
                                }
11616
                                0x10 => {
11617
0
                                    if v65.1 == 0x8 {
11618
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11619
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11620
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11621
0
                                        let v134 = constructor_x64_psubw(ctx, v68, v69);
11622
0
                                        let v135 = constructor_output_xmm(ctx, v134);
11623
0
                                        // Rule at src/isa/x64/lower.isle line 217.
11624
0
                                        return Some(v135);
11625
0
                                    }
11626
                                }
11627
                                0x20 => {
11628
0
                                    if v65.1 == 0x4 {
11629
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11630
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11631
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11632
0
                                        let v136 = constructor_x64_psubd(ctx, v68, v69);
11633
0
                                        let v137 = constructor_output_xmm(ctx, v136);
11634
0
                                        // Rule at src/isa/x64/lower.isle line 221.
11635
0
                                        return Some(v137);
11636
0
                                    }
11637
                                }
11638
                                0x40 => {
11639
0
                                    if v65.1 == 0x2 {
11640
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11641
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11642
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11643
0
                                        let v138 = constructor_x64_psubq(ctx, v68, v69);
11644
0
                                        let v139 = constructor_output_xmm(ctx, v138);
11645
0
                                        // Rule at src/isa/x64/lower.isle line 225.
11646
0
                                        return Some(v139);
11647
0
                                    }
11648
                                }
11649
0
                                _ => {}
11650
                            }
11651
67.8k
                        }
11652
67.8k
                        let v4 = C::fits_in_64(ctx, v3);
11653
67.8k
                        if let Some(v5) = v4 {
11654
67.8k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11655
67.8k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
11656
67.8k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
11657
67.8k
                            let v130 = constructor_x64_sub(ctx, v5, v41, v42);
11658
67.8k
                            let v131 = constructor_output_gpr(ctx, v130);
11659
67.8k
                            // Rule at src/isa/x64/lower.isle line 207.
11660
67.8k
                            return Some(v131);
11661
0
                        }
11662
0
                    }
11663
                }
11664
                &Opcode::Imul => {
11665
58.7k
                    let v1 = C::first_result(ctx, arg0);
11666
58.7k
                    if let Some(v2) = v1 {
11667
58.7k
                        let v3 = C::value_type(ctx, v2);
11668
58.7k
                        let v64 = C::multi_lane(ctx, v3);
11669
58.7k
                        if let Some(
v650
) = v64 {
11670
0
                            if v65.0 == 0x40 {
11671
0
                                if v65.1 == 0x2 {
11672
0
                                    let v332 = C::use_avx512vl(ctx);
11673
0
                                    if v332 == true {
11674
0
                                        let v461 = C::use_avx512dq(ctx);
11675
0
                                        if v461 == true {
11676
0
                                            let v38 = C::unpack_value_array_2(ctx, v37);
11677
0
                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11678
0
                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11679
0
                                            let v462 = constructor_x64_vpmullq(ctx, v68, v69);
11680
0
                                            let v463 = constructor_output_xmm(ctx, v462);
11681
0
                                            // Rule at src/isa/x64/lower.isle line 1047.
11682
0
                                            return Some(v463);
11683
0
                                        }
11684
0
                                    }
11685
0
                                }
11686
0
                            }
11687
58.7k
                        }
11688
58.7k
                        if v3 == I128 {
11689
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11690
0
                            let v78 = C::put_in_regs(ctx, v38.0);
11691
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
11692
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
11693
0
                            let v83 = C::put_in_regs(ctx, v38.1);
11694
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
11695
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
11696
0
                            let v425 = &C::gpr_to_gpr_mem_imm(ctx, v85);
11697
0
                            let v426 = constructor_x64_mul(ctx, I64, v80, v425);
11698
0
                            let v427 = &C::gpr_to_gpr_mem_imm(ctx, v84);
11699
0
                            let v428 = constructor_x64_mul(ctx, I64, v82, v427);
11700
0
                            let v429 = &C::gpr_to_gpr_mem_imm(ctx, v428);
11701
0
                            let v430 = constructor_x64_add(ctx, I64, v426, v429);
11702
0
                            let v431 = &C::gpr_to_gpr_mem(ctx, v84);
11703
0
                            let v432 = constructor_mulhi_u(ctx, I64, v80, v431);
11704
0
                            let v433 = constructor_value_regs_get_gpr(ctx, v432, 0x0);
11705
0
                            let v434 = constructor_value_regs_get_gpr(ctx, v432, 0x1);
11706
0
                            let v435 = &C::gpr_to_gpr_mem_imm(ctx, v434);
11707
0
                            let v436 = constructor_x64_add(ctx, I64, v430, v435);
11708
0
                            let v437 = constructor_value_gprs(ctx, v433, v436);
11709
0
                            let v438 = C::output(ctx, v437);
11710
0
                            // Rule at src/isa/x64/lower.isle line 997.
11711
0
                            return Some(v438);
11712
58.7k
                        }
11713
58.7k
                        if let Some(
v650
) = v64 {
11714
0
                            match v65.0 {
11715
                                0x10 => {
11716
0
                                    if v65.1 == 0x8 {
11717
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11718
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11719
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11720
0
                                        let v439 = constructor_x64_pmullw(ctx, v68, v69);
11721
0
                                        let v440 = constructor_output_xmm(ctx, v439);
11722
0
                                        // Rule at src/isa/x64/lower.isle line 1024.
11723
0
                                        return Some(v440);
11724
0
                                    }
11725
                                }
11726
                                0x20 => {
11727
0
                                    if v65.1 == 0x4 {
11728
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11729
0
                                        let v171 = C::def_inst(ctx, v38.1);
11730
0
                                        if let Some(v172) = v171 {
11731
0
                                            let v173 = &C::inst_data(ctx, v172);
11732
                                            if let &InstructionData::Unary {
11733
0
                                                opcode: ref v174,
11734
0
                                                arg: v175,
11735
0
                                            } = v173 {
11736
0
                                                match v174 {
11737
                                                    &Opcode::SwidenLow => {
11738
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11739
0
                                                        if let Some(v181) = v180 {
11740
0
                                                            let v182 = &C::inst_data(ctx, v181);
11741
                                                            if let &InstructionData::Unary {
11742
0
                                                                opcode: ref v183,
11743
0
                                                                arg: v184,
11744
0
                                                            } = v182 {
11745
0
                                                                if let &Opcode::SwidenLow = v183 {
11746
0
                                                                    let v481 = C::value_type(ctx, v184);
11747
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11748
0
                                                                    if let Some(v483) = v482 {
11749
0
                                                                        if v483.0 == 0x10 {
11750
0
                                                                            if v483.1 == 0x8 {
11751
0
                                                                                let v486 = C::value_type(ctx, v175);
11752
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11753
0
                                                                                if let Some(v488) = v487 {
11754
0
                                                                                    if v488.0 == 0x10 {
11755
0
                                                                                        if v488.1 == 0x8 {
11756
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11757
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11758
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11759
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11760
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11761
0
                                                                                            let v495 = constructor_x64_pmulhw(ctx, v185, v494);
11762
0
                                                                                            let v496 = &C::xmm_to_xmm_mem(ctx, v495);
11763
0
                                                                                            let v507 = constructor_x64_punpcklwd(ctx, v493, v496);
11764
0
                                                                                            let v508 = constructor_output_xmm(ctx, v507);
11765
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1117.
11766
0
                                                                                            return Some(v508);
11767
0
                                                                                        }
11768
0
                                                                                    }
11769
0
                                                                                }
11770
0
                                                                            }
11771
0
                                                                        }
11772
0
                                                                    }
11773
0
                                                                }
11774
0
                                                            }
11775
0
                                                        }
11776
                                                    }
11777
                                                    &Opcode::SwidenHigh => {
11778
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11779
0
                                                        if let Some(v181) = v180 {
11780
0
                                                            let v182 = &C::inst_data(ctx, v181);
11781
                                                            if let &InstructionData::Unary {
11782
0
                                                                opcode: ref v183,
11783
0
                                                                arg: v184,
11784
0
                                                            } = v182 {
11785
0
                                                                if let &Opcode::SwidenHigh = v183 {
11786
0
                                                                    let v481 = C::value_type(ctx, v184);
11787
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11788
0
                                                                    if let Some(v483) = v482 {
11789
0
                                                                        if v483.0 == 0x10 {
11790
0
                                                                            if v483.1 == 0x8 {
11791
0
                                                                                let v486 = C::value_type(ctx, v175);
11792
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11793
0
                                                                                if let Some(v488) = v487 {
11794
0
                                                                                    if v488.0 == 0x10 {
11795
0
                                                                                        if v488.1 == 0x8 {
11796
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11797
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11798
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11799
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11800
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11801
0
                                                                                            let v495 = constructor_x64_pmulhw(ctx, v185, v494);
11802
0
                                                                                            let v496 = &C::xmm_to_xmm_mem(ctx, v495);
11803
0
                                                                                            let v497 = constructor_x64_punpckhwd(ctx, v493, v496);
11804
0
                                                                                            let v498 = constructor_output_xmm(ctx, v497);
11805
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1094.
11806
0
                                                                                            return Some(v498);
11807
0
                                                                                        }
11808
0
                                                                                    }
11809
0
                                                                                }
11810
0
                                                                            }
11811
0
                                                                        }
11812
0
                                                                    }
11813
0
                                                                }
11814
0
                                                            }
11815
0
                                                        }
11816
                                                    }
11817
                                                    &Opcode::UwidenLow => {
11818
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11819
0
                                                        if let Some(v181) = v180 {
11820
0
                                                            let v182 = &C::inst_data(ctx, v181);
11821
                                                            if let &InstructionData::Unary {
11822
0
                                                                opcode: ref v183,
11823
0
                                                                arg: v184,
11824
0
                                                            } = v182 {
11825
0
                                                                if let &Opcode::UwidenLow = v183 {
11826
0
                                                                    let v481 = C::value_type(ctx, v184);
11827
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11828
0
                                                                    if let Some(v483) = v482 {
11829
0
                                                                        if v483.0 == 0x10 {
11830
0
                                                                            if v483.1 == 0x8 {
11831
0
                                                                                let v486 = C::value_type(ctx, v175);
11832
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11833
0
                                                                                if let Some(v488) = v487 {
11834
0
                                                                                    if v488.0 == 0x10 {
11835
0
                                                                                        if v488.1 == 0x8 {
11836
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11837
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11838
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11839
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11840
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11841
0
                                                                                            let v515 = constructor_x64_pmulhuw(ctx, v185, v494);
11842
0
                                                                                            let v516 = &C::xmm_to_xmm_mem(ctx, v515);
11843
0
                                                                                            let v521 = constructor_x64_punpcklwd(ctx, v493, v516);
11844
0
                                                                                            let v522 = constructor_output_xmm(ctx, v521);
11845
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1162.
11846
0
                                                                                            return Some(v522);
11847
0
                                                                                        }
11848
0
                                                                                    }
11849
0
                                                                                }
11850
0
                                                                            }
11851
0
                                                                        }
11852
0
                                                                    }
11853
0
                                                                }
11854
0
                                                            }
11855
0
                                                        }
11856
                                                    }
11857
                                                    &Opcode::UwidenHigh => {
11858
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11859
0
                                                        if let Some(v181) = v180 {
11860
0
                                                            let v182 = &C::inst_data(ctx, v181);
11861
                                                            if let &InstructionData::Unary {
11862
0
                                                                opcode: ref v183,
11863
0
                                                                arg: v184,
11864
0
                                                            } = v182 {
11865
0
                                                                if let &Opcode::UwidenHigh = v183 {
11866
0
                                                                    let v481 = C::value_type(ctx, v184);
11867
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11868
0
                                                                    if let Some(v483) = v482 {
11869
0
                                                                        if v483.0 == 0x10 {
11870
0
                                                                            if v483.1 == 0x8 {
11871
0
                                                                                let v486 = C::value_type(ctx, v175);
11872
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11873
0
                                                                                if let Some(v488) = v487 {
11874
0
                                                                                    if v488.0 == 0x10 {
11875
0
                                                                                        if v488.1 == 0x8 {
11876
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11877
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11878
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11879
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11880
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11881
0
                                                                                            let v515 = constructor_x64_pmulhuw(ctx, v185, v494);
11882
0
                                                                                            let v516 = &C::xmm_to_xmm_mem(ctx, v515);
11883
0
                                                                                            let v517 = constructor_x64_punpckhwd(ctx, v493, v516);
11884
0
                                                                                            let v518 = constructor_output_xmm(ctx, v517);
11885
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1140.
11886
0
                                                                                            return Some(v518);
11887
0
                                                                                        }
11888
0
                                                                                    }
11889
0
                                                                                }
11890
0
                                                                            }
11891
0
                                                                        }
11892
0
                                                                    }
11893
0
                                                                }
11894
0
                                                            }
11895
0
                                                        }
11896
                                                    }
11897
0
                                                    _ => {}
11898
                                                }
11899
0
                                            }
11900
0
                                        }
11901
0
                                        let v441 = C::use_sse41(ctx);
11902
0
                                        if v441 == true {
11903
0
                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11904
0
                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11905
0
                                            let v442 = constructor_x64_pmulld(ctx, v68, v69);
11906
0
                                            let v443 = constructor_output_xmm(ctx, v442);
11907
0
                                            // Rule at src/isa/x64/lower.isle line 1027.
11908
0
                                            return Some(v443);
11909
0
                                        }
11910
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11911
0
                                        let v444 = constructor_put_in_xmm(ctx, v38.1);
11912
0
                                        let v316 = &C::xmm_to_xmm_mem(ctx, v68);
11913
0
                                        let v446 = constructor_x64_pshufd(ctx, v316, 0x31);
11914
0
                                        let v447 = &C::xmm_to_xmm_mem(ctx, v444);
11915
0
                                        let v448 = constructor_x64_pshufd(ctx, v447, 0x31);
11916
0
                                        let v449 = &C::xmm_to_xmm_mem(ctx, v444);
11917
0
                                        let v450 = constructor_x64_pmuludq(ctx, v68, v449);
11918
0
                                        let v451 = &C::xmm_to_xmm_mem(ctx, v450);
11919
0
                                        let v453 = constructor_x64_pshufd(ctx, v451, 0x8);
11920
0
                                        let v454 = &C::xmm_to_xmm_mem(ctx, v448);
11921
0
                                        let v455 = constructor_x64_pmuludq(ctx, v446, v454);
11922
0
                                        let v456 = &C::xmm_to_xmm_mem(ctx, v455);
11923
0
                                        let v457 = constructor_x64_pshufd(ctx, v456, 0x8);
11924
0
                                        let v458 = &C::xmm_to_xmm_mem(ctx, v457);
11925
0
                                        let v459 = constructor_x64_punpckldq(ctx, v453, v458);
11926
0
                                        let v460 = constructor_output_xmm(ctx, v459);
11927
0
                                        // Rule at src/isa/x64/lower.isle line 1034.
11928
0
                                        return Some(v460);
11929
0
                                    }
11930
                                }
11931
                                0x40 => {
11932
0
                                    if v65.1 == 0x2 {
11933
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11934
0
                                        let v171 = C::def_inst(ctx, v38.1);
11935
0
                                        if let Some(v172) = v171 {
11936
0
                                            let v173 = &C::inst_data(ctx, v172);
11937
                                            if let &InstructionData::Unary {
11938
0
                                                opcode: ref v174,
11939
0
                                                arg: v175,
11940
0
                                            } = v173 {
11941
0
                                                match v174 {
11942
                                                    &Opcode::SwidenLow => {
11943
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11944
0
                                                        if let Some(v181) = v180 {
11945
0
                                                            let v182 = &C::inst_data(ctx, v181);
11946
                                                            if let &InstructionData::Unary {
11947
0
                                                                opcode: ref v183,
11948
0
                                                                arg: v184,
11949
0
                                                            } = v182 {
11950
0
                                                                if let &Opcode::SwidenLow = v183 {
11951
0
                                                                    let v441 = C::use_sse41(ctx);
11952
0
                                                                    if v441 == true {
11953
0
                                                                        let v481 = C::value_type(ctx, v184);
11954
0
                                                                        let v482 = C::multi_lane(ctx, v481);
11955
0
                                                                        if let Some(v483) = v482 {
11956
0
                                                                            if v483.0 == 0x20 {
11957
0
                                                                                if v483.1 == 0x4 {
11958
0
                                                                                    let v486 = C::value_type(ctx, v175);
11959
0
                                                                                    let v487 = C::multi_lane(ctx, v486);
11960
0
                                                                                    if let Some(v488) = v487 {
11961
0
                                                                                        if v488.0 == 0x20 {
11962
0
                                                                                            if v488.1 == 0x4 {
11963
0
                                                                                                let v499 = &C::put_in_xmm_mem(ctx, v184);
11964
0
                                                                                                let v510 = constructor_x64_pshufd(ctx, v499, 0x50);
11965
0
                                                                                                let v502 = &C::put_in_xmm_mem(ctx, v175);
11966
0
                                                                                                let v511 = constructor_x64_pshufd(ctx, v502, 0x50);
11967
0
                                                                                                let v512 = &C::xmm_to_xmm_mem(ctx, v511);
11968
0
                                                                                                let v513 = constructor_x64_pmuldq(ctx, v510, v512);
11969
0
                                                                                                let v514 = constructor_output_xmm(ctx, v513);
11970
0
                                                                                                // Rule at src/isa/x64/lower.isle line 1129.
11971
0
                                                                                                return Some(v514);
11972
0
                                                                                            }
11973
0
                                                                                        }
11974
0
                                                                                    }
11975
0
                                                                                }
11976
0
                                                                            }
11977
0
                                                                        }
11978
0
                                                                    }
11979
0
                                                                }
11980
0
                                                            }
11981
0
                                                        }
11982
                                                    }
11983
                                                    &Opcode::SwidenHigh => {
11984
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11985
0
                                                        if let Some(v181) = v180 {
11986
0
                                                            let v182 = &C::inst_data(ctx, v181);
11987
                                                            if let &InstructionData::Unary {
11988
0
                                                                opcode: ref v183,
11989
0
                                                                arg: v184,
11990
0
                                                            } = v182 {
11991
0
                                                                if let &Opcode::SwidenHigh = v183 {
11992
0
                                                                    let v441 = C::use_sse41(ctx);
11993
0
                                                                    if v441 == true {
11994
0
                                                                        let v481 = C::value_type(ctx, v184);
11995
0
                                                                        let v482 = C::multi_lane(ctx, v481);
11996
0
                                                                        if let Some(v483) = v482 {
11997
0
                                                                            if v483.0 == 0x20 {
11998
0
                                                                                if v483.1 == 0x4 {
11999
0
                                                                                    let v486 = C::value_type(ctx, v175);
12000
0
                                                                                    let v487 = C::multi_lane(ctx, v486);
12001
0
                                                                                    if let Some(v488) = v487 {
12002
0
                                                                                        if v488.0 == 0x20 {
12003
0
                                                                                            if v488.1 == 0x4 {
12004
0
                                                                                                let v499 = &C::put_in_xmm_mem(ctx, v184);
12005
0
                                                                                                let v501 = constructor_x64_pshufd(ctx, v499, 0xFA);
12006
0
                                                                                                let v502 = &C::put_in_xmm_mem(ctx, v175);
12007
0
                                                                                                let v503 = constructor_x64_pshufd(ctx, v502, 0xFA);
12008
0
                                                                                                let v504 = &C::xmm_to_xmm_mem(ctx, v503);
12009
0
                                                                                                let v505 = constructor_x64_pmuldq(ctx, v501, v504);
12010
0
                                                                                                let v506 = constructor_output_xmm(ctx, v505);
12011
0
                                                                                                // Rule at src/isa/x64/lower.isle line 1106.
12012
0
                                                                                                return Some(v506);
12013
0
                                                                                            }
12014
0
                                                                                        }
12015
0
                                                                                    }
12016
0
                                                                                }
12017
0
                                                                            }
12018
0
                                                                        }
12019
0
                                                                    }
12020
0
                                                                }
12021
0
                                                            }
12022
0
                                                        }
12023
                                                    }
12024
                                                    &Opcode::UwidenLow => {
12025
0
                                                        let v180 = C::def_inst(ctx, v38.0);
12026
0
                                                        if let Some(v181) = v180 {
12027
0
                                                            let v182 = &C::inst_data(ctx, v181);
12028
                                                            if let &InstructionData::Unary {
12029
0
                                                                opcode: ref v183,
12030
0
                                                                arg: v184,
12031
0
                                                            } = v182 {
12032
0
                                                                if let &Opcode::UwidenLow = v183 {
12033
0
                                                                    let v481 = C::value_type(ctx, v184);
12034
0
                                                                    let v482 = C::multi_lane(ctx, v481);
12035
0
                                                                    if let Some(v483) = v482 {
12036
0
                                                                        if v483.0 == 0x20 {
12037
0
                                                                            if v483.1 == 0x4 {
12038
0
                                                                                let v486 = C::value_type(ctx, v175);
12039
0
                                                                                let v487 = C::multi_lane(ctx, v486);
12040
0
                                                                                if let Some(v488) = v487 {
12041
0
                                                                                    if v488.0 == 0x20 {
12042
0
                                                                                        if v488.1 == 0x4 {
12043
0
                                                                                            let v499 = &C::put_in_xmm_mem(ctx, v184);
12044
0
                                                                                            let v510 = constructor_x64_pshufd(ctx, v499, 0x50);
12045
0
                                                                                            let v502 = &C::put_in_xmm_mem(ctx, v175);
12046
0
                                                                                            let v511 = constructor_x64_pshufd(ctx, v502, 0x50);
12047
0
                                                                                            let v512 = &C::xmm_to_xmm_mem(ctx, v511);
12048
0
                                                                                            let v523 = constructor_x64_pmuludq(ctx, v510, v512);
12049
0
                                                                                            let v524 = constructor_output_xmm(ctx, v523);
12050
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1174.
12051
0
                                                                                            return Some(v524);
12052
0
                                                                                        }
12053
0
                                                                                    }
12054
0
                                                                                }
12055
0
                                                                            }
12056
0
                                                                        }
12057
0
                                                                    }
12058
0
                                                                }
12059
0
                                                            }
12060
0
                                                        }
12061
                                                    }
12062
                                                    &Opcode::UwidenHigh => {
12063
0
                                                        let v180 = C::def_inst(ctx, v38.0);
12064
0
                                                        if let Some(v181) = v180 {
12065
0
                                                            let v182 = &C::inst_data(ctx, v181);
12066
                                                            if let &InstructionData::Unary {
12067
0
                                                                opcode: ref v183,
12068
0
                                                                arg: v184,
12069
0
                                                            } = v182 {
12070
0
                                                                if let &Opcode::UwidenHigh = v183 {
12071
0
                                                                    let v481 = C::value_type(ctx, v184);
12072
0
                                                                    let v482 = C::multi_lane(ctx, v481);
12073
0
                                                                    if let Some(v483) = v482 {
12074
0
                                                                        if v483.0 == 0x20 {
12075
0
                                                                            if v483.1 == 0x4 {
12076
0
                                                                                let v486 = C::value_type(ctx, v175);
12077
0
                                                                                let v487 = C::multi_lane(ctx, v486);
12078
0
                                                                                if let Some(v488) = v487 {
12079
0
                                                                                    if v488.0 == 0x20 {
12080
0
                                                                                        if v488.1 == 0x4 {
12081
0
                                                                                            let v499 = &C::put_in_xmm_mem(ctx, v184);
12082
0
                                                                                            let v501 = constructor_x64_pshufd(ctx, v499, 0xFA);
12083
0
                                                                                            let v502 = &C::put_in_xmm_mem(ctx, v175);
12084
0
                                                                                            let v503 = constructor_x64_pshufd(ctx, v502, 0xFA);
12085
0
                                                                                            let v504 = &C::xmm_to_xmm_mem(ctx, v503);
12086
0
                                                                                            let v519 = constructor_x64_pmuludq(ctx, v501, v504);
12087
0
                                                                                            let v520 = constructor_output_xmm(ctx, v519);
12088
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1152.
12089
0
                                                                                            return Some(v520);
12090
0
                                                                                        }
12091
0
                                                                                    }
12092
0
                                                                                }
12093
0
                                                                            }
12094
0
                                                                        }
12095
0
                                                                    }
12096
0
                                                                }
12097
0
                                                            }
12098
0
                                                        }
12099
                                                    }
12100
0
                                                    _ => {}
12101
                                                }
12102
0
                                            }
12103
0
                                        }
12104
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
12105
0
                                        let v444 = constructor_put_in_xmm(ctx, v38.1);
12106
0
                                        let v465 = &C::xmi_imm(ctx, 0x20);
12107
0
                                        let v466 = constructor_x64_psrlq(ctx, v68, v465);
12108
0
                                        let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12109
0
                                        let v467 = constructor_x64_pmuludq(ctx, v466, v447);
12110
0
                                        let v468 = &C::xmi_imm(ctx, 0x20);
12111
0
                                        let v469 = constructor_x64_psrlq(ctx, v444, v468);
12112
0
                                        let v470 = &C::xmm_to_xmm_mem(ctx, v469);
12113
0
                                        let v471 = constructor_x64_pmuludq(ctx, v68, v470);
12114
0
                                        let v472 = &C::xmm_to_xmm_mem(ctx, v471);
12115
0
                                        let v473 = constructor_x64_paddq(ctx, v467, v472);
12116
0
                                        let v474 = &C::xmi_imm(ctx, 0x20);
12117
0
                                        let v475 = constructor_x64_psllq(ctx, v473, v474);
12118
0
                                        let v476 = &C::xmm_to_xmm_mem(ctx, v444);
12119
0
                                        let v477 = constructor_x64_pmuludq(ctx, v68, v476);
12120
0
                                        let v478 = &C::xmm_to_xmm_mem(ctx, v475);
12121
0
                                        let v479 = constructor_x64_paddq(ctx, v477, v478);
12122
0
                                        let v480 = constructor_output_xmm(ctx, v479);
12123
0
                                        // Rule at src/isa/x64/lower.isle line 1072.
12124
0
                                        return Some(v480);
12125
0
                                    }
12126
                                }
12127
0
                                _ => {}
12128
                            }
12129
58.7k
                        }
12130
58.7k
                        let v4 = C::fits_in_64(ctx, v3);
12131
58.7k
                        if let Some(v5) = v4 {
12132
58.7k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12133
58.7k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12134
58.7k
                            if let Some(
v59167
) = v58 {
12135
167
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12136
167
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12137
167
                                let v423 = constructor_x64_mul(ctx, v5, v60, v61);
12138
167
                                let v424 = constructor_output_gpr(ctx, v423);
12139
167
                                // Rule at src/isa/x64/lower.isle line 978.
12140
167
                                return Some(v424);
12141
58.5k
                            }
12142
58.5k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12143
58.5k
                            if let Some(
v1590
) = v158 {
12144
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12145
0
                                let v421 = constructor_x64_mul(ctx, v5, v60, v159);
12146
0
                                let v422 = constructor_output_gpr(ctx, v421);
12147
0
                                // Rule at src/isa/x64/lower.isle line 975.
12148
0
                                return Some(v422);
12149
58.5k
                            }
12150
58.5k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12151
58.5k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12152
58.5k
                            let v419 = constructor_x64_mul(ctx, v5, v41, v42);
12153
58.5k
                            let v420 = constructor_output_gpr(ctx, v419);
12154
58.5k
                            // Rule at src/isa/x64/lower.isle line 969.
12155
58.5k
                            return Some(v420);
12156
0
                        }
12157
0
                    }
12158
                }
12159
                &Opcode::Umulhi => {
12160
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12161
0
                    let v2080 = C::value_type(ctx, v38.0);
12162
0
                    match v2080 {
12163
                        I16 => {
12164
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12165
0
                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12166
0
                            let v2220 = constructor_mul_hi(ctx, I16, false, v41, v109);
12167
0
                            let v2221 = constructor_value_regs_get_gpr(ctx, v2220, 0x1);
12168
0
                            let v2222 = constructor_output_gpr(ctx, v2221);
12169
0
                            // Rule at src/isa/x64/lower.isle line 4138.
12170
0
                            return Some(v2222);
12171
                        }
12172
                        I32 => {
12173
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12174
0
                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12175
0
                            let v2223 = constructor_mul_hi(ctx, I32, false, v41, v109);
12176
0
                            let v2224 = constructor_value_regs_get_gpr(ctx, v2223, 0x1);
12177
0
                            let v2225 = constructor_output_gpr(ctx, v2224);
12178
0
                            // Rule at src/isa/x64/lower.isle line 4143.
12179
0
                            return Some(v2225);
12180
                        }
12181
                        I64 => {
12182
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12183
0
                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12184
0
                            let v2226 = constructor_mul_hi(ctx, I64, false, v41, v109);
12185
0
                            let v2227 = constructor_value_regs_get_gpr(ctx, v2226, 0x1);
12186
0
                            let v2228 = constructor_output_gpr(ctx, v2227);
12187
0
                            // Rule at src/isa/x64/lower.isle line 4148.
12188
0
                            return Some(v2228);
12189
                        }
12190
0
                        _ => {}
12191
                    }
12192
                }
12193
                &Opcode::Smulhi => {
12194
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12195
0
                    let v2080 = C::value_type(ctx, v38.0);
12196
0
                    match v2080 {
12197
                        I16 => {
12198
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12199
0
                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12200
0
                            let v2229 = constructor_mul_hi(ctx, I16, true, v41, v109);
12201
0
                            let v2230 = constructor_value_regs_get_gpr(ctx, v2229, 0x1);
12202
0
                            let v2231 = constructor_output_gpr(ctx, v2230);
12203
0
                            // Rule at src/isa/x64/lower.isle line 4155.
12204
0
                            return Some(v2231);
12205
                        }
12206
                        I32 => {
12207
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12208
0
                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12209
0
                            let v2232 = constructor_mul_hi(ctx, I32, true, v41, v109);
12210
0
                            let v2233 = constructor_value_regs_get_gpr(ctx, v2232, 0x1);
12211
0
                            let v2234 = constructor_output_gpr(ctx, v2233);
12212
0
                            // Rule at src/isa/x64/lower.isle line 4160.
12213
0
                            return Some(v2234);
12214
                        }
12215
                        I64 => {
12216
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12217
0
                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12218
0
                            let v2235 = constructor_mul_hi(ctx, I64, true, v41, v109);
12219
0
                            let v2236 = constructor_value_regs_get_gpr(ctx, v2235, 0x1);
12220
0
                            let v2237 = constructor_output_gpr(ctx, v2236);
12221
0
                            // Rule at src/isa/x64/lower.isle line 4165.
12222
0
                            return Some(v2237);
12223
                        }
12224
0
                        _ => {}
12225
                    }
12226
                }
12227
                &Opcode::SqmulRoundSat => {
12228
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12229
0
                    let v2080 = C::value_type(ctx, v38.0);
12230
0
                    if v2080 == I16X8 {
12231
0
                        let v525 = C::use_ssse3(ctx);
12232
0
                        if v525 == true {
12233
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12234
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
12235
0
                            let v2544 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
12236
0
                            let v2545 = &constructor_const_to_xmm_mem(ctx, v2544);
12237
0
                            let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12238
0
                            let v2546 = constructor_x64_pmulhrsw(ctx, v68, v447);
12239
0
                            let v2547 = constructor_x64_pcmpeqw(ctx, v2546, v2545);
12240
0
                            let v2548 = &C::xmm_to_xmm_mem(ctx, v2547);
12241
0
                            let v2549 = constructor_x64_pxor(ctx, v2546, v2548);
12242
0
                            let v2550 = constructor_output_xmm(ctx, v2549);
12243
0
                            // Rule at src/isa/x64/lower.isle line 4631.
12244
0
                            return Some(v2550);
12245
0
                        }
12246
0
                        let v68 = constructor_put_in_xmm(ctx, v38.0);
12247
0
                        let v444 = constructor_put_in_xmm(ctx, v38.1);
12248
0
                        let v1963 = &C::xmm_to_xmm_mem(ctx, v444);
12249
0
                        let v2551 = constructor_x64_pmullw(ctx, v68, v1963);
12250
0
                        let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12251
0
                        let v2552 = constructor_x64_pmulhw(ctx, v68, v447);
12252
0
                        let v2553 = &C::xmm_to_xmm_mem(ctx, v2552);
12253
0
                        let v2554 = constructor_x64_punpcklwd(ctx, v2551, v2553);
12254
0
                        let v2555 = &C::xmm_to_xmm_mem(ctx, v2552);
12255
0
                        let v2556 = constructor_x64_punpckhwd(ctx, v2551, v2555);
12256
0
                        let v2558 = C::emit_u128_le_const(ctx, 0x4000000040000000400000004000);
12257
0
                        let v2559 = &constructor_const_to_xmm_mem(ctx, v2558);
12258
0
                        let v2560 = constructor_x64_movdqu_load(ctx, v2559);
12259
0
                        let v2561 = &C::xmm_to_xmm_mem(ctx, v2560);
12260
0
                        let v2562 = constructor_x64_paddd(ctx, v2554, v2561);
12261
0
                        let v2563 = &C::xmm_to_xmm_mem(ctx, v2560);
12262
0
                        let v2564 = constructor_x64_paddd(ctx, v2556, v2563);
12263
0
                        let v2566 = &C::xmi_imm(ctx, 0xF);
12264
0
                        let v2567 = constructor_x64_psrad(ctx, v2562, v2566);
12265
0
                        let v2568 = &C::xmi_imm(ctx, 0xF);
12266
0
                        let v2569 = constructor_x64_psrad(ctx, v2564, v2568);
12267
0
                        let v2570 = &C::xmm_to_xmm_mem(ctx, v2569);
12268
0
                        let v2571 = constructor_x64_packssdw(ctx, v2567, v2570);
12269
0
                        let v2572 = constructor_output_xmm(ctx, v2571);
12270
0
                        // Rule at src/isa/x64/lower.isle line 4647.
12271
0
                        return Some(v2572);
12272
0
                    }
12273
                }
12274
                &Opcode::X86Pmulhrsw => {
12275
0
                    let v525 = C::use_ssse3(ctx);
12276
0
                    if v525 == true {
12277
0
                        let v38 = C::unpack_value_array_2(ctx, v37);
12278
0
                        let v2080 = C::value_type(ctx, v38.0);
12279
0
                        if v2080 == I16X8 {
12280
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12281
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12282
0
                            let v2573 = constructor_x64_pmulhrsw(ctx, v68, v69);
12283
0
                            let v2574 = constructor_output_xmm(ctx, v2573);
12284
0
                            // Rule at src/isa/x64/lower.isle line 4673.
12285
0
                            return Some(v2574);
12286
0
                        }
12287
0
                    }
12288
                }
12289
                &Opcode::Udiv => {
12290
3.15k
                    let v38 = C::unpack_value_array_2(ctx, v37);
12291
3.15k
                    let v2080 = C::value_type(ctx, v38.0);
12292
3.15k
                    if v2080 == I8 {
12293
0
                        let v2164 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
12294
0
                        let v356 = constructor_put_in_gpr(ctx, v38.1);
12295
0
                        let v2165 = &C::gpr_to_gpr_mem(ctx, v356);
12296
0
                        let v2168 = constructor_x64_div8(ctx, v2164, v2165, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12297
0
                        let v2169 = constructor_output_gpr(ctx, v2168);
12298
0
                        // Rule at src/isa/x64/lower.isle line 4017.
12299
0
                        return Some(v2169);
12300
3.15k
                    }
12301
3.15k
                    let v2170 = C::fits_in_64(ctx, v2080);
12302
3.15k
                    if let Some(v2171) = v2170 {
12303
3.15k
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12304
3.15k
                        let v15 = constructor_imm(ctx, I64, 0x0);
12305
3.15k
                        let v2172 = C::gpr_new(ctx, v15);
12306
3.15k
                        let v2173 = constructor_put_in_gpr(ctx, v38.1);
12307
3.15k
                        let v2174 = &C::gpr_to_gpr_mem(ctx, v2173);
12308
3.15k
                        let v2175 = &C::raw_operand_size_of_type(ctx, v2171);
12309
3.15k
                        let v2176 = constructor_x64_div_quotient(ctx, v41, v2172, v2174, v2175, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12310
3.15k
                        let v2177 = C::output(ctx, v2176);
12311
3.15k
                        // Rule at src/isa/x64/lower.isle line 4026.
12312
3.15k
                        return Some(v2177);
12313
0
                    }
12314
                }
12315
                &Opcode::Sdiv => {
12316
465
                    let v38 = C::unpack_value_array_2(ctx, v37);
12317
465
                    let v2080 = C::value_type(ctx, v38.0);
12318
465
                    if v2080 == I8 {
12319
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12320
0
                        let v2179 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
12321
0
                        let v2180 = constructor_nonzero_sdiv_divisor(ctx, I8, v38.1);
12322
0
                        let v2181 = &C::reg_to_gpr_mem(ctx, v2180);
12323
0
                        let v2184 = constructor_x64_div8(ctx, v2179, v2181, &DivSignedness::Signed, &TrapCode::IntegerOverflow);
12324
0
                        let v2185 = constructor_output_gpr(ctx, v2184);
12325
0
                        // Rule at src/isa/x64/lower.isle line 4036.
12326
0
                        return Some(v2185);
12327
465
                    }
12328
465
                    let v2170 = C::fits_in_64(ctx, v2080);
12329
465
                    if let Some(v2171) = v2170 {
12330
465
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12331
465
                        let v2186 = &C::raw_operand_size_of_type(ctx, v2171);
12332
465
                        let v2187 = constructor_x64_sign_extend_data(ctx, v41, v2186);
12333
465
                        let v2188 = constructor_nonzero_sdiv_divisor(ctx, v2171, v38.1);
12334
465
                        let v2189 = &C::reg_to_gpr_mem(ctx, v2188);
12335
465
                        let v2190 = constructor_x64_div_quotient(ctx, v41, v2187, v2189, v2186, &DivSignedness::Signed, &TrapCode::IntegerOverflow);
12336
465
                        let v2191 = C::output(ctx, v2190);
12337
465
                        // Rule at src/isa/x64/lower.isle line 4042.
12338
465
                        return Some(v2191);
12339
0
                    }
12340
                }
12341
                &Opcode::Urem => {
12342
729
                    let v38 = C::unpack_value_array_2(ctx, v37);
12343
729
                    let v2080 = C::value_type(ctx, v38.0);
12344
729
                    if v2080 == I8 {
12345
0
                        let v2164 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
12346
0
                        let v356 = constructor_put_in_gpr(ctx, v38.1);
12347
0
                        let v2165 = &C::gpr_to_gpr_mem(ctx, v356);
12348
0
                        let v2168 = constructor_x64_div8(ctx, v2164, v2165, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12349
0
                        let v1204 = Imm8Reg::Imm8 {
12350
0
                            imm: 0x8,
12351
0
                        };
12352
0
                        let v2192 = &C::imm8_reg_to_imm8_gpr(ctx, &v1204);
12353
0
                        let v2193 = constructor_x64_shr(ctx, I64, v2168, v2192);
12354
0
                        let v2194 = constructor_output_gpr(ctx, v2193);
12355
0
                        // Rule at src/isa/x64/lower.isle line 4075.
12356
0
                        return Some(v2194);
12357
729
                    }
12358
729
                    let v2170 = C::fits_in_64(ctx, v2080);
12359
729
                    if let Some(v2171) = v2170 {
12360
729
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12361
729
                        let v15 = constructor_imm(ctx, I64, 0x0);
12362
729
                        let v2172 = C::gpr_new(ctx, v15);
12363
729
                        let v2173 = constructor_put_in_gpr(ctx, v38.1);
12364
729
                        let v2174 = &C::gpr_to_gpr_mem(ctx, v2173);
12365
729
                        let v2175 = &C::raw_operand_size_of_type(ctx, v2171);
12366
729
                        let v2195 = constructor_x64_div_remainder(ctx, v41, v2172, v2174, v2175, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12367
729
                        let v2196 = C::output(ctx, v2195);
12368
729
                        // Rule at src/isa/x64/lower.isle line 4084.
12369
729
                        return Some(v2196);
12370
0
                    }
12371
                }
12372
                &Opcode::Srem => {
12373
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12374
0
                    let v171 = C::def_inst(ctx, v38.1);
12375
0
                    if let Some(v172) = v171 {
12376
0
                        let v173 = &C::inst_data(ctx, v172);
12377
                        if let &InstructionData::UnaryImm {
12378
0
                            opcode: ref v330,
12379
0
                            imm: v331,
12380
0
                        } = v173 {
12381
0
                            if let &Opcode::Iconst = v330 {
12382
0
                                let v2080 = C::value_type(ctx, v38.0);
12383
0
                                if v2080 == I8 {
12384
0
                                    let v2197 = C::safe_divisor_from_imm64(ctx, I8, v331);
12385
0
                                    if let Some(v2198) = v2197 {
12386
0
                                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12387
0
                                        let v2179 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
12388
0
                                        let v2199 = constructor_imm(ctx, I8, v2198);
12389
0
                                        let v2200 = &C::reg_to_gpr_mem(ctx, v2199);
12390
0
                                        let v2201 = constructor_x64_div8(ctx, v2179, v2200, &DivSignedness::Signed, &TrapCode::IntegerDivisionByZero);
12391
0
                                        let v1204 = Imm8Reg::Imm8 {
12392
0
                                            imm: 0x8,
12393
0
                                        };
12394
0
                                        let v2202 = &C::imm8_reg_to_imm8_gpr(ctx, &v1204);
12395
0
                                        let v2203 = constructor_x64_shr(ctx, I64, v2201, v2202);
12396
0
                                        let v2204 = constructor_output_gpr(ctx, v2203);
12397
0
                                        // Rule at src/isa/x64/lower.isle line 4099.
12398
0
                                        return Some(v2204);
12399
0
                                    }
12400
0
                                }
12401
0
                                let v2205 = C::safe_divisor_from_imm64(ctx, v2080, v331);
12402
0
                                if let Some(v2206) = v2205 {
12403
0
                                    let v41 = constructor_put_in_gpr(ctx, v38.0);
12404
0
                                    let v2207 = &C::raw_operand_size_of_type(ctx, v2080);
12405
0
                                    let v2208 = constructor_x64_sign_extend_data(ctx, v41, v2207);
12406
0
                                    let v2209 = constructor_imm(ctx, v2080, v2206);
12407
0
                                    let v2210 = &C::reg_to_gpr_mem(ctx, v2209);
12408
0
                                    let v2211 = constructor_x64_div_remainder(ctx, v41, v2208, v2210, v2207, &DivSignedness::Signed, &TrapCode::IntegerDivisionByZero);
12409
0
                                    let v2212 = C::output(ctx, v2211);
12410
0
                                    // Rule at src/isa/x64/lower.isle line 4108.
12411
0
                                    return Some(v2212);
12412
0
                                }
12413
0
                            }
12414
0
                        }
12415
0
                    }
12416
0
                    let v2080 = C::value_type(ctx, v38.0);
12417
0
                    if v2080 == I8 {
12418
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12419
0
                        let v2179 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
12420
0
                        let v2213 = constructor_put_in_gpr(ctx, v38.1);
12421
0
                        let v2214 = constructor_x64_checked_srem_seq8(ctx, v2179, v2213);
12422
0
                        let v1204 = Imm8Reg::Imm8 {
12423
0
                            imm: 0x8,
12424
0
                        };
12425
0
                        let v2192 = &C::imm8_reg_to_imm8_gpr(ctx, &v1204);
12426
0
                        let v2215 = constructor_x64_shr(ctx, I64, v2214, v2192);
12427
0
                        let v2216 = constructor_output_gpr(ctx, v2215);
12428
0
                        // Rule at src/isa/x64/lower.isle line 4121.
12429
0
                        return Some(v2216);
12430
0
                    }
12431
0
                    let v41 = constructor_put_in_gpr(ctx, v38.0);
12432
0
                    let v2207 = &C::raw_operand_size_of_type(ctx, v2080);
12433
0
                    let v2208 = constructor_x64_sign_extend_data(ctx, v41, v2207);
12434
0
                    let v2173 = constructor_put_in_gpr(ctx, v38.1);
12435
0
                    let v2217 = constructor_x64_checked_srem_seq(ctx, v2207, v41, v2208, v2173);
12436
0
                    let v2218 = C::value_regs_get(ctx, v2217, 0x1);
12437
0
                    let v2219 = constructor_output_reg(ctx, v2218);
12438
0
                    // Rule at src/isa/x64/lower.isle line 4127.
12439
0
                    return Some(v2219);
12440
                }
12441
                &Opcode::UaddOverflow => {
12442
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12443
0
                    let v92 = C::value_type(ctx, v38.1);
12444
0
                    let v93 = C::fits_in_64(ctx, v92);
12445
0
                    if let Some(v94) = v93 {
12446
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12447
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12448
0
                        let v97 = constructor_construct_overflow_op_alu(ctx, v94, &CC::B, &AluRmiROpcode::Add, v41, v42);
12449
0
                        // Rule at src/isa/x64/lower.isle line 137.
12450
0
                        return Some(v97);
12451
0
                    }
12452
0
                    if v92 == I128 {
12453
0
                        let v99 = constructor_construct_overflow_op_alu_128(ctx, &CC::B, &AluRmiROpcode::Add, &AluRmiROpcode::Adc, v38.0, v38.1);
12454
0
                        // Rule at src/isa/x64/lower.isle line 141.
12455
0
                        return Some(v99);
12456
0
                    }
12457
                }
12458
                &Opcode::SaddOverflow => {
12459
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12460
0
                    let v92 = C::value_type(ctx, v38.1);
12461
0
                    let v93 = C::fits_in_64(ctx, v92);
12462
0
                    if let Some(v94) = v93 {
12463
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12464
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12465
0
                        let v101 = constructor_construct_overflow_op_alu(ctx, v94, &CC::O, &AluRmiROpcode::Add, v41, v42);
12466
0
                        // Rule at src/isa/x64/lower.isle line 146.
12467
0
                        return Some(v101);
12468
0
                    }
12469
0
                    if v92 == I128 {
12470
0
                        let v102 = constructor_construct_overflow_op_alu_128(ctx, &CC::O, &AluRmiROpcode::Add, &AluRmiROpcode::Adc, v38.0, v38.1);
12471
0
                        // Rule at src/isa/x64/lower.isle line 149.
12472
0
                        return Some(v102);
12473
0
                    }
12474
                }
12475
                &Opcode::UsubOverflow => {
12476
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12477
0
                    let v92 = C::value_type(ctx, v38.1);
12478
0
                    let v93 = C::fits_in_64(ctx, v92);
12479
0
                    if let Some(v94) = v93 {
12480
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12481
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12482
0
                        let v104 = constructor_construct_overflow_op_alu(ctx, v94, &CC::B, &AluRmiROpcode::Sub, v41, v42);
12483
0
                        // Rule at src/isa/x64/lower.isle line 154.
12484
0
                        return Some(v104);
12485
0
                    }
12486
0
                    if v92 == I128 {
12487
0
                        let v106 = constructor_construct_overflow_op_alu_128(ctx, &CC::B, &AluRmiROpcode::Sub, &AluRmiROpcode::Sbb, v38.0, v38.1);
12488
0
                        // Rule at src/isa/x64/lower.isle line 157.
12489
0
                        return Some(v106);
12490
0
                    }
12491
                }
12492
                &Opcode::SsubOverflow => {
12493
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12494
0
                    let v92 = C::value_type(ctx, v38.1);
12495
0
                    let v93 = C::fits_in_64(ctx, v92);
12496
0
                    if let Some(v94) = v93 {
12497
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12498
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12499
0
                        let v107 = constructor_construct_overflow_op_alu(ctx, v94, &CC::O, &AluRmiROpcode::Sub, v41, v42);
12500
0
                        // Rule at src/isa/x64/lower.isle line 162.
12501
0
                        return Some(v107);
12502
0
                    }
12503
0
                    if v92 == I128 {
12504
0
                        let v108 = constructor_construct_overflow_op_alu_128(ctx, &CC::O, &AluRmiROpcode::Sub, &AluRmiROpcode::Sbb, v38.0, v38.1);
12505
0
                        // Rule at src/isa/x64/lower.isle line 165.
12506
0
                        return Some(v108);
12507
0
                    }
12508
                }
12509
                &Opcode::UmulOverflow => {
12510
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12511
0
                    let v92 = C::value_type(ctx, v38.1);
12512
0
                    let v93 = C::fits_in_64(ctx, v92);
12513
0
                    if let Some(v94) = v93 {
12514
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12515
0
                        let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12516
0
                        let v110 = &constructor_x64_umullo_with_flags_paired(ctx, v94, v41, v109);
12517
0
                        let v111 = constructor_construct_overflow_op(ctx, &CC::O, v110);
12518
0
                        // Rule at src/isa/x64/lower.isle line 170.
12519
0
                        return Some(v111);
12520
0
                    }
12521
                }
12522
                &Opcode::SmulOverflow => {
12523
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12524
0
                    let v92 = C::value_type(ctx, v38.1);
12525
0
                    let v112 = C::ty_int_ref_16_to_64(ctx, v92);
12526
0
                    if let Some(v113) = v112 {
12527
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12528
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12529
0
                        let v115 = constructor_construct_overflow_op_alu(ctx, v113, &CC::O, &AluRmiROpcode::Mul, v41, v42);
12530
0
                        // Rule at src/isa/x64/lower.isle line 175.
12531
0
                        return Some(v115);
12532
0
                    }
12533
0
                    if v92 == I8 {
12534
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12535
0
                        let v117 = &C::put_in_reg_mem(ctx, v38.1);
12536
0
                        let v118 = &constructor_reg_mem_to_reg_mem_imm(ctx, v117);
12537
0
                        let v119 = &C::gpr_mem_imm_new(ctx, v118);
12538
0
                        let v120 = &constructor_x64_alurmi_with_flags_paired(ctx, &AluRmiROpcode::Mul, I8, v41, v119);
12539
0
                        let v121 = constructor_construct_overflow_op(ctx, &CC::O, v120);
12540
0
                        // Rule at src/isa/x64/lower.isle line 179.
12541
0
                        return Some(v121);
12542
0
                    }
12543
                }
12544
                &Opcode::Band => {
12545
68.2k
                    let v1 = C::first_result(ctx, arg0);
12546
68.2k
                    if let Some(v2) = v1 {
12547
68.2k
                        let v3 = C::value_type(ctx, v2);
12548
68.2k
                        let v45 = C::ty_32_or_64(ctx, v3);
12549
68.2k
                        if let Some(v46) = v45 {
12550
68.2k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12551
68.2k
                            let v196 = constructor_val_minus_one(ctx, v38.1);
12552
68.2k
                            if let Some(
v19784
) = v196 {
12553
84
                                let v211 = C::use_bmi2(ctx);
12554
84
                                if v211 == true {
12555
84
                                    let v212 = C::def_inst(ctx, v197);
12556
84
                                    if let Some(
v21342
) = v212 {
12557
42
                                        let v214 = &C::inst_data(ctx, v213);
12558
                                        if let &InstructionData::Binary {
12559
19
                                            opcode: ref v215,
12560
19
                                            args: ref v216,
12561
42
                                        } = v214 {
12562
19
                                            if let &Opcode::Ishl = v215 {
12563
0
                                                let v217 = C::unpack_value_array_2(ctx, v216);
12564
0
                                                let v220 = C::def_inst(ctx, v217.0);
12565
0
                                                if let Some(v221) = v220 {
12566
0
                                                    let v222 = &C::inst_data(ctx, v221);
12567
                                                    if let &InstructionData::UnaryImm {
12568
0
                                                        opcode: ref v223,
12569
0
                                                        imm: v224,
12570
0
                                                    } = v222 {
12571
0
                                                        if let &Opcode::Iconst = v223 {
12572
0
                                                            let v225 = C::u64_from_imm64(ctx, v224);
12573
0
                                                            if v225 == 0x1 {
12574
0
                                                                let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12575
0
                                                                let v226 = constructor_put_in_gpr(ctx, v217.1);
12576
0
                                                                let v227 = C::ty_bits(ctx, v46);
12577
0
                                                                let v228 = C::u8_as_u32(ctx, v227);
12578
0
                                                                let v230 = C::u32_sub(ctx, v228, 0x1);
12579
0
                                                                let v231 = RegMemImm::Imm {
12580
0
                                                                    simm32: v230,
12581
0
                                                                };
12582
0
                                                                let v232 = &C::gpr_mem_imm_new(ctx, &v231);
12583
0
                                                                let v233 = constructor_x64_and(ctx, v46, v226, v232);
12584
0
                                                                let v234 = constructor_x64_bzhi(ctx, v46, v198, v233);
12585
0
                                                                let v235 = constructor_output_gpr(ctx, v234);
12586
0
                                                                // Rule at src/isa/x64/lower.isle line 382.
12587
0
                                                                return Some(v235);
12588
0
                                                            }
12589
0
                                                        }
12590
0
                                                    }
12591
0
                                                }
12592
19
                                            }
12593
23
                                        }
12594
42
                                    }
12595
0
                                }
12596
68.1k
                            }
12597
68.2k
                            let v188 = C::use_bmi1(ctx);
12598
68.2k
                            if v188 == true {
12599
68.2k
                                let v171 = C::def_inst(ctx, v38.1);
12600
68.2k
                                if let Some(
v17268.1k
) = v171 {
12601
68.1k
                                    let v173 = &C::inst_data(ctx, v172);
12602
                                    if let &InstructionData::Unary {
12603
1.55k
                                        opcode: ref v174,
12604
1.55k
                                        arg: v175,
12605
68.1k
                                    } = v173 {
12606
1.55k
                                        if let &Opcode::Ineg = v174 {
12607
309
                                            if v38.0 == v175 {
12608
0
                                                let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12609
0
                                                let v209 = constructor_x64_blsi(ctx, v46, v198);
12610
0
                                                let v210 = constructor_output_gpr(ctx, v209);
12611
0
                                                // Rule at src/isa/x64/lower.isle line 369.
12612
0
                                                return Some(v210);
12613
309
                                            }
12614
1.24k
                                        }
12615
66.5k
                                    }
12616
115
                                }
12617
68.2k
                                let v180 = C::def_inst(ctx, v38.0);
12618
68.2k
                                if let Some(
v18161.4k
) = v180 {
12619
61.4k
                                    let v182 = &C::inst_data(ctx, v181);
12620
                                    if let &InstructionData::Unary {
12621
2.30k
                                        opcode: ref v183,
12622
2.30k
                                        arg: v184,
12623
61.4k
                                    } = v182 {
12624
2.30k
                                        if let &Opcode::Ineg = v183 {
12625
366
                                            if v38.1 == v184 {
12626
0
                                                let v206 = &constructor_put_in_gpr_mem(ctx, v184);
12627
0
                                                let v207 = constructor_x64_blsi(ctx, v46, v206);
12628
0
                                                let v208 = constructor_output_gpr(ctx, v207);
12629
0
                                                // Rule at src/isa/x64/lower.isle line 366.
12630
0
                                                return Some(v208);
12631
366
                                            }
12632
1.94k
                                        }
12633
59.1k
                                    }
12634
6.77k
                                }
12635
68.2k
                                let v201 = constructor_val_minus_one(ctx, v38.0);
12636
68.2k
                                if let Some(
v2021.40k
) = v201 {
12637
1.40k
                                    if v38.1 == v202 {
12638
58
                                        let v203 = &constructor_put_in_gpr_mem(ctx, v38.1);
12639
58
                                        let v204 = constructor_x64_blsr(ctx, v46, v203);
12640
58
                                        let v205 = constructor_output_gpr(ctx, v204);
12641
58
                                        // Rule at src/isa/x64/lower.isle line 359.
12642
58
                                        return Some(v205);
12643
1.34k
                                    }
12644
66.8k
                                }
12645
68.1k
                                if let Some(
v19784
) = v196 {
12646
84
                                    if v38.0 == v197 {
12647
0
                                        let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12648
0
                                        let v199 = constructor_x64_blsr(ctx, v46, v198);
12649
0
                                        let v200 = constructor_output_gpr(ctx, v199);
12650
0
                                        // Rule at src/isa/x64/lower.isle line 355.
12651
0
                                        return Some(v200);
12652
84
                                    }
12653
68.1k
                                }
12654
0
                            }
12655
0
                        }
12656
68.1k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
12657
68.1k
                        if let Some(v153) = v152 {
12658
68.1k
                            let v188 = C::use_bmi1(ctx);
12659
68.1k
                            if v188 == true {
12660
68.1k
                                let v38 = C::unpack_value_array_2(ctx, v37);
12661
68.1k
                                let v180 = C::def_inst(ctx, v38.0);
12662
68.1k
                                if let Some(
v18161.4k
) = v180 {
12663
61.4k
                                    let v182 = &C::inst_data(ctx, v181);
12664
                                    if let &InstructionData::Unary {
12665
2.30k
                                        opcode: ref v183,
12666
2.30k
                                        arg: v184,
12667
61.4k
                                    } = v182 {
12668
2.30k
                                        if let &Opcode::Bnot = v183 {
12669
134
                                            let v193 = constructor_put_in_gpr(ctx, v184);
12670
134
                                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12671
134
                                            let v194 = constructor_x64_andn(ctx, v3, v193, v109);
12672
134
                                            let v195 = constructor_output_gpr(ctx, v194);
12673
134
                                            // Rule at src/isa/x64/lower.isle line 343.
12674
134
                                            return Some(v195);
12675
2.17k
                                        }
12676
59.1k
                                    }
12677
6.77k
                                }
12678
68.0k
                                let v171 = C::def_inst(ctx, v38.1);
12679
68.0k
                                if let Some(
v17267.9k
) = v171 {
12680
67.9k
                                    let v173 = &C::inst_data(ctx, v172);
12681
                                    if let &InstructionData::Unary {
12682
1.55k
                                        opcode: ref v174,
12683
1.55k
                                        arg: v175,
12684
67.9k
                                    } = v173 {
12685
1.55k
                                        if let &Opcode::Bnot = v174 {
12686
143
                                            let v189 = constructor_put_in_gpr(ctx, v175);
12687
143
                                            let v190 = &constructor_put_in_gpr_mem(ctx, v38.0);
12688
143
                                            let v191 = constructor_x64_andn(ctx, v3, v189, v190);
12689
143
                                            let v192 = constructor_output_gpr(ctx, v191);
12690
143
                                            // Rule at src/isa/x64/lower.isle line 338.
12691
143
                                            return Some(v192);
12692
1.41k
                                        }
12693
66.4k
                                    }
12694
60
                                }
12695
0
                            }
12696
0
                        }
12697
67.9k
                        let v64 = C::multi_lane(ctx, v3);
12698
67.9k
                        if let Some(
v650
) = v64 {
12699
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12700
0
                            let v180 = C::def_inst(ctx, v38.0);
12701
0
                            if let Some(v181) = v180 {
12702
0
                                let v182 = &C::inst_data(ctx, v181);
12703
                                if let &InstructionData::Unary {
12704
0
                                    opcode: ref v183,
12705
0
                                    arg: v184,
12706
0
                                } = v182 {
12707
0
                                    if let &Opcode::Bnot = v183 {
12708
0
                                        let v185 = constructor_put_in_xmm(ctx, v184);
12709
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12710
0
                                        let v186 = constructor_sse_and_not(ctx, v3, v185, v69);
12711
0
                                        let v187 = constructor_output_xmm(ctx, v186);
12712
0
                                        // Rule at src/isa/x64/lower.isle line 335.
12713
0
                                        return Some(v187);
12714
0
                                    }
12715
0
                                }
12716
0
                            }
12717
0
                            let v171 = C::def_inst(ctx, v38.1);
12718
0
                            if let Some(v172) = v171 {
12719
0
                                let v173 = &C::inst_data(ctx, v172);
12720
                                if let &InstructionData::Unary {
12721
0
                                    opcode: ref v174,
12722
0
                                    arg: v175,
12723
0
                                } = v173 {
12724
0
                                    if let &Opcode::Bnot = v174 {
12725
0
                                        let v176 = constructor_put_in_xmm(ctx, v175);
12726
0
                                        let v177 = &C::put_in_xmm_mem(ctx, v38.0);
12727
0
                                        let v178 = constructor_sse_and_not(ctx, v3, v176, v177);
12728
0
                                        let v179 = constructor_output_xmm(ctx, v178);
12729
0
                                        // Rule at src/isa/x64/lower.isle line 333.
12730
0
                                        return Some(v179);
12731
0
                                    }
12732
0
                                }
12733
0
                            }
12734
67.9k
                        }
12735
67.9k
                        if v3 == I128 {
12736
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12737
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12738
0
                            let v168 = C::put_in_regs(ctx, v38.1);
12739
0
                            let v169 = constructor_and_i128(ctx, v78, v168);
12740
0
                            let v170 = C::output(ctx, v169);
12741
0
                            // Rule at src/isa/x64/lower.isle line 314.
12742
0
                            return Some(v170);
12743
67.9k
                        }
12744
67.9k
                        if let Some(
v650
) = v64 {
12745
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12746
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12747
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12748
0
                            let v166 = constructor_sse_and(ctx, v3, v68, v69);
12749
0
                            let v167 = constructor_output_xmm(ctx, v166);
12750
0
                            // Rule at src/isa/x64/lower.isle line 297.
12751
0
                            return Some(v167);
12752
67.9k
                        }
12753
67.9k
                        let v162 = C::ty_scalar_float(ctx, v3);
12754
67.9k
                        if let Some(
v1630
) = v162 {
12755
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12756
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12757
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12758
0
                            let v164 = constructor_sse_and(ctx, v163, v68, v69);
12759
0
                            let v165 = constructor_output_xmm(ctx, v164);
12760
0
                            // Rule at src/isa/x64/lower.isle line 285.
12761
0
                            return Some(v165);
12762
67.9k
                        }
12763
67.9k
                        if let Some(v153) = v152 {
12764
67.9k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12765
67.9k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12766
67.9k
                            if let Some(
v1590
) = v158 {
12767
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12768
0
                                let v160 = constructor_x64_and(ctx, v3, v60, v159);
12769
0
                                let v161 = constructor_output_gpr(ctx, v160);
12770
0
                                // Rule at src/isa/x64/lower.isle line 279.
12771
0
                                return Some(v161);
12772
67.9k
                            }
12773
67.9k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12774
67.9k
                            if let Some(
v592.08k
) = v58 {
12775
2.08k
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12776
2.08k
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12777
2.08k
                                let v156 = constructor_x64_and(ctx, v3, v60, v61);
12778
2.08k
                                let v157 = constructor_output_gpr(ctx, v156);
12779
2.08k
                                // Rule at src/isa/x64/lower.isle line 275.
12780
2.08k
                                return Some(v157);
12781
65.8k
                            }
12782
65.8k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12783
65.8k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12784
65.8k
                            let v154 = constructor_x64_and(ctx, v3, v41, v42);
12785
65.8k
                            let v155 = constructor_output_gpr(ctx, v154);
12786
65.8k
                            // Rule at src/isa/x64/lower.isle line 268.
12787
65.8k
                            return Some(v155);
12788
0
                        }
12789
0
                    }
12790
                }
12791
                &Opcode::Bor => {
12792
21.1k
                    let v1 = C::first_result(ctx, arg0);
12793
21.1k
                    if let Some(v2) = v1 {
12794
21.1k
                        let v3 = C::value_type(ctx, v2);
12795
21.1k
                        if v3 == I128 {
12796
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12797
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12798
0
                            let v168 = C::put_in_regs(ctx, v38.1);
12799
0
                            let v246 = constructor_or_i128(ctx, v78, v168);
12800
0
                            let v247 = C::output(ctx, v246);
12801
0
                            // Rule at src/isa/x64/lower.isle line 436.
12802
0
                            return Some(v247);
12803
21.1k
                        }
12804
21.1k
                        let v64 = C::multi_lane(ctx, v3);
12805
21.1k
                        if let Some(
v650
) = v64 {
12806
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12807
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12808
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12809
0
                            let v244 = constructor_sse_or(ctx, v3, v68, v69);
12810
0
                            let v245 = constructor_output_xmm(ctx, v244);
12811
0
                            // Rule at src/isa/x64/lower.isle line 421.
12812
0
                            return Some(v245);
12813
21.1k
                        }
12814
21.1k
                        let v162 = C::ty_scalar_float(ctx, v3);
12815
21.1k
                        if let Some(
v1630
) = v162 {
12816
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12817
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12818
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12819
0
                            let v242 = constructor_sse_or(ctx, v163, v68, v69);
12820
0
                            let v243 = constructor_output_xmm(ctx, v242);
12821
0
                            // Rule at src/isa/x64/lower.isle line 409.
12822
0
                            return Some(v243);
12823
21.1k
                        }
12824
21.1k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
12825
21.1k
                        if let Some(v153) = v152 {
12826
21.1k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12827
21.1k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12828
21.1k
                            if let Some(
v1590
) = v158 {
12829
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12830
0
                                let v240 = constructor_x64_or(ctx, v3, v60, v159);
12831
0
                                let v241 = constructor_output_gpr(ctx, v240);
12832
0
                                // Rule at src/isa/x64/lower.isle line 403.
12833
0
                                return Some(v241);
12834
21.1k
                            }
12835
21.1k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12836
21.1k
                            if let Some(
v5911
) = v58 {
12837
11
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12838
11
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12839
11
                                let v238 = constructor_x64_or(ctx, v3, v60, v61);
12840
11
                                let v239 = constructor_output_gpr(ctx, v238);
12841
11
                                // Rule at src/isa/x64/lower.isle line 399.
12842
11
                                return Some(v239);
12843
21.1k
                            }
12844
21.1k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12845
21.1k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12846
21.1k
                            let v236 = constructor_x64_or(ctx, v3, v41, v42);
12847
21.1k
                            let v237 = constructor_output_gpr(ctx, v236);
12848
21.1k
                            // Rule at src/isa/x64/lower.isle line 392.
12849
21.1k
                            return Some(v237);
12850
0
                        }
12851
0
                    }
12852
                }
12853
                &Opcode::Bxor => {
12854
3.33k
                    let v1 = C::first_result(ctx, arg0);
12855
3.33k
                    if let Some(v2) = v1 {
12856
3.33k
                        let v3 = C::value_type(ctx, v2);
12857
3.33k
                        let v45 = C::ty_32_or_64(ctx, v3);
12858
3.33k
                        if let Some(v46) = v45 {
12859
3.33k
                            let v188 = C::use_bmi1(ctx);
12860
3.33k
                            if v188 == true {
12861
3.33k
                                let v38 = C::unpack_value_array_2(ctx, v37);
12862
3.33k
                                let v201 = constructor_val_minus_one(ctx, v38.0);
12863
3.33k
                                if let Some(
v2020
) = v201 {
12864
0
                                    if v38.1 == v202 {
12865
0
                                        let v203 = &constructor_put_in_gpr_mem(ctx, v38.1);
12866
0
                                        let v264 = constructor_x64_blsmsk(ctx, v46, v203);
12867
0
                                        let v265 = constructor_output_gpr(ctx, v264);
12868
0
                                        // Rule at src/isa/x64/lower.isle line 487.
12869
0
                                        return Some(v265);
12870
0
                                    }
12871
3.33k
                                }
12872
3.33k
                                let v196 = constructor_val_minus_one(ctx, v38.1);
12873
3.33k
                                if let Some(
v1970
) = v196 {
12874
0
                                    if v38.0 == v197 {
12875
0
                                        let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12876
0
                                        let v262 = constructor_x64_blsmsk(ctx, v46, v198);
12877
0
                                        let v263 = constructor_output_gpr(ctx, v262);
12878
0
                                        // Rule at src/isa/x64/lower.isle line 483.
12879
0
                                        return Some(v263);
12880
0
                                    }
12881
3.33k
                                }
12882
0
                            }
12883
0
                        }
12884
3.33k
                        if v3 == I128 {
12885
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12886
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12887
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
12888
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
12889
0
                            let v83 = C::put_in_regs(ctx, v38.1);
12890
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
12891
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
12892
0
                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
12893
0
                            let v258 = constructor_x64_xor(ctx, I64, v80, v86);
12894
0
                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
12895
0
                            let v259 = constructor_x64_xor(ctx, I64, v82, v88);
12896
0
                            let v260 = constructor_value_gprs(ctx, v258, v259);
12897
0
                            let v261 = C::output(ctx, v260);
12898
0
                            // Rule at src/isa/x64/lower.isle line 471.
12899
0
                            return Some(v261);
12900
3.33k
                        }
12901
3.33k
                        let v64 = C::multi_lane(ctx, v3);
12902
3.33k
                        if let Some(
v650
) = v64 {
12903
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12904
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12905
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12906
0
                            let v256 = constructor_x64_xor_vector(ctx, v3, v68, v69);
12907
0
                            let v257 = constructor_output_xmm(ctx, v256);
12908
0
                            // Rule at src/isa/x64/lower.isle line 466.
12909
0
                            return Some(v257);
12910
3.33k
                        }
12911
3.33k
                        let v162 = C::ty_scalar_float(ctx, v3);
12912
3.33k
                        if let Some(
v1630
) = v162 {
12913
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12914
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12915
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12916
0
                            let v254 = constructor_x64_xor_vector(ctx, v163, v68, v69);
12917
0
                            let v255 = constructor_output_xmm(ctx, v254);
12918
0
                            // Rule at src/isa/x64/lower.isle line 461.
12919
0
                            return Some(v255);
12920
3.33k
                        }
12921
3.33k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
12922
3.33k
                        if let Some(v153) = v152 {
12923
3.33k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12924
3.33k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12925
3.33k
                            if let Some(
v1590
) = v158 {
12926
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12927
0
                                let v252 = constructor_x64_xor(ctx, v3, v60, v159);
12928
0
                                let v253 = constructor_output_gpr(ctx, v252);
12929
0
                                // Rule at src/isa/x64/lower.isle line 455.
12930
0
                                return Some(v253);
12931
3.33k
                            }
12932
3.33k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12933
3.33k
                            if let Some(
v592
) = v58 {
12934
2
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12935
2
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12936
2
                                let v250 = constructor_x64_xor(ctx, v3, v60, v61);
12937
2
                                let v251 = constructor_output_gpr(ctx, v250);
12938
2
                                // Rule at src/isa/x64/lower.isle line 451.
12939
2
                                return Some(v251);
12940
3.33k
                            }
12941
3.33k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12942
3.33k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12943
3.33k
                            let v248 = constructor_x64_xor(ctx, v3, v41, v42);
12944
3.33k
                            let v249 = constructor_output_gpr(ctx, v248);
12945
3.33k
                            // Rule at src/isa/x64/lower.isle line 444.
12946
3.33k
                            return Some(v249);
12947
0
                        }
12948
0
                    }
12949
                }
12950
                &Opcode::Rotl => {
12951
1.00k
                    let v1 = C::first_result(ctx, arg0);
12952
1.00k
                    if let Some(v2) = v1 {
12953
1.00k
                        let v3 = C::value_type(ctx, v2);
12954
1.00k
                        if v3 == I128 {
12955
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12956
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12957
0
                            let v364 = constructor_lo_gpr(ctx, v38.1);
12958
0
                            let v365 = constructor_shl_i128(ctx, v78, v364);
12959
0
                            let v367 = constructor_imm(ctx, I64, 0x80);
12960
0
                            let v368 = C::gpr_new(ctx, v367);
12961
0
                            let v369 = &C::gpr_to_gpr_mem_imm(ctx, v364);
12962
0
                            let v370 = constructor_x64_sub(ctx, I64, v368, v369);
12963
0
                            let v371 = constructor_shr_i128(ctx, v78, v370);
12964
0
                            let v372 = constructor_or_i128(ctx, v365, v371);
12965
0
                            let v373 = C::output(ctx, v372);
12966
0
                            // Rule at src/isa/x64/lower.isle line 893.
12967
0
                            return Some(v373);
12968
1.00k
                        }
12969
1.00k
                        let v4 = C::fits_in_64(ctx, v3);
12970
1.00k
                        if let Some(v5) = v4 {
12971
1.00k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12972
1.00k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12973
1.00k
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
12974
1.00k
                            let v362 = constructor_x64_rotl(ctx, v5, v41, v266);
12975
1.00k
                            let v363 = constructor_output_gpr(ctx, v362);
12976
1.00k
                            // Rule at src/isa/x64/lower.isle line 887.
12977
1.00k
                            return Some(v363);
12978
0
                        }
12979
0
                    }
12980
                }
12981
                &Opcode::Rotr => {
12982
26
                    let v1 = C::first_result(ctx, arg0);
12983
26
                    if let Some(v2) = v1 {
12984
26
                        let v3 = C::value_type(ctx, v2);
12985
26
                        if v3 == I128 {
12986
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12987
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12988
0
                            let v364 = constructor_lo_gpr(ctx, v38.1);
12989
0
                            let v376 = constructor_shr_i128(ctx, v78, v364);
12990
0
                            let v367 = constructor_imm(ctx, I64, 0x80);
12991
0
                            let v368 = C::gpr_new(ctx, v367);
12992
0
                            let v369 = &C::gpr_to_gpr_mem_imm(ctx, v364);
12993
0
                            let v370 = constructor_x64_sub(ctx, I64, v368, v369);
12994
0
                            let v377 = constructor_shl_i128(ctx, v78, v370);
12995
0
                            let v378 = constructor_or_i128(ctx, v376, v377);
12996
0
                            let v379 = C::output(ctx, v378);
12997
0
                            // Rule at src/isa/x64/lower.isle line 914.
12998
0
                            return Some(v379);
12999
26
                        }
13000
26
                        let v4 = C::fits_in_64(ctx, v3);
13001
26
                        if let Some(v5) = v4 {
13002
26
                            let v38 = C::unpack_value_array_2(ctx, v37);
13003
26
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
13004
26
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13005
26
                            let v374 = constructor_x64_rotr(ctx, v5, v41, v266);
13006
26
                            let v375 = constructor_output_gpr(ctx, v374);
13007
26
                            // Rule at src/isa/x64/lower.isle line 908.
13008
26
                            return Some(v375);
13009
0
                        }
13010
0
                    }
13011
                }
13012
                &Opcode::Ishl => {
13013
24.2k
                    let v1 = C::first_result(ctx, arg0);
13014
24.2k
                    if let Some(v2) = v1 {
13015
24.2k
                        let v3 = C::value_type(ctx, v2);
13016
24.2k
                        match v3 {
13017
                            I128 => {
13018
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13019
0
                                let v269 = constructor_lo_gpr(ctx, v38.1);
13020
0
                                let v270 = C::put_in_regs(ctx, v38.0);
13021
0
                                let v271 = constructor_shl_i128(ctx, v270, v269);
13022
0
                                let v272 = C::output(ctx, v271);
13023
0
                                // Rule at src/isa/x64/lower.isle line 535.
13024
0
                                return Some(v272);
13025
                            }
13026
                            I8X16 => {
13027
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13028
0
                                let v273 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13029
0
                                let v274 = constructor_put_in_xmm(ctx, v38.0);
13030
0
                                let v275 = &constructor_mov_rmi_to_xmm(ctx, v273);
13031
0
                                let v276 = constructor_x64_psllw(ctx, v274, v275);
13032
0
                                let v277 = &constructor_ishl_i8x16_mask(ctx, v273);
13033
0
                                let v280 = constructor_x64_load(ctx, I8X16, v277, &ExtKind::None);
13034
0
                                let v281 = RegMem::Reg {
13035
0
                                    reg: v280,
13036
0
                                };
13037
0
                                let v282 = &C::reg_mem_to_xmm_mem(ctx, &v281);
13038
0
                                let v283 = constructor_sse_and(ctx, I8X16, v276, v282);
13039
0
                                let v284 = constructor_output_xmm(ctx, v283);
13040
0
                                // Rule at src/isa/x64/lower.isle line 547.
13041
0
                                return Some(v284);
13042
                            }
13043
                            I16X8 => {
13044
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13045
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13046
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13047
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13048
0
                                let v287 = constructor_x64_psllw(ctx, v68, v286);
13049
0
                                let v288 = constructor_output_xmm(ctx, v287);
13050
0
                                // Rule at src/isa/x64/lower.isle line 592.
13051
0
                                return Some(v288);
13052
                            }
13053
                            I32X4 => {
13054
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13055
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13056
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13057
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13058
0
                                let v289 = constructor_x64_pslld(ctx, v68, v286);
13059
0
                                let v290 = constructor_output_xmm(ctx, v289);
13060
0
                                // Rule at src/isa/x64/lower.isle line 595.
13061
0
                                return Some(v290);
13062
                            }
13063
                            I64X2 => {
13064
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13065
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13066
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13067
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13068
0
                                let v291 = constructor_x64_psllq(ctx, v68, v286);
13069
0
                                let v292 = constructor_output_xmm(ctx, v291);
13070
0
                                // Rule at src/isa/x64/lower.isle line 598.
13071
0
                                return Some(v292);
13072
                            }
13073
24.2k
                            _ => {}
13074
24.2k
                        }
13075
24.2k
                        let v4 = C::fits_in_64(ctx, v3);
13076
24.2k
                        if let Some(v5) = v4 {
13077
24.2k
                            let v38 = C::unpack_value_array_2(ctx, v37);
13078
24.2k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
13079
24.2k
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13080
24.2k
                            let v267 = constructor_x64_shl(ctx, v5, v41, v266);
13081
24.2k
                            let v268 = constructor_output_gpr(ctx, v267);
13082
24.2k
                            // Rule at src/isa/x64/lower.isle line 496.
13083
24.2k
                            return Some(v268);
13084
0
                        }
13085
0
                    }
13086
                }
13087
                &Opcode::Ushr => {
13088
15.3k
                    let v1 = C::first_result(ctx, arg0);
13089
15.3k
                    if let Some(v2) = v1 {
13090
15.3k
                        let v3 = C::value_type(ctx, v2);
13091
15.3k
                        match v3 {
13092
                            I128 => {
13093
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13094
0
                                let v269 = constructor_lo_gpr(ctx, v38.1);
13095
0
                                let v270 = C::put_in_regs(ctx, v38.0);
13096
0
                                let v297 = constructor_shr_i128(ctx, v270, v269);
13097
0
                                let v298 = C::output(ctx, v297);
13098
0
                                // Rule at src/isa/x64/lower.isle line 642.
13099
0
                                return Some(v298);
13100
                            }
13101
                            I8X16 => {
13102
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13103
0
                                let v273 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13104
0
                                let v274 = constructor_put_in_xmm(ctx, v38.0);
13105
0
                                let v275 = &constructor_mov_rmi_to_xmm(ctx, v273);
13106
0
                                let v299 = constructor_x64_psrlw(ctx, v274, v275);
13107
0
                                let v300 = &constructor_ushr_i8x16_mask(ctx, v273);
13108
0
                                let v301 = &constructor_synthetic_amode_to_xmm_mem(ctx, v300);
13109
0
                                let v302 = constructor_sse_and(ctx, I8X16, v299, v301);
13110
0
                                let v303 = constructor_output_xmm(ctx, v302);
13111
0
                                // Rule at src/isa/x64/lower.isle line 652.
13112
0
                                return Some(v303);
13113
                            }
13114
                            I16X8 => {
13115
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13116
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13117
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13118
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13119
0
                                let v304 = constructor_x64_psrlw(ctx, v68, v286);
13120
0
                                let v305 = constructor_output_xmm(ctx, v304);
13121
0
                                // Rule at src/isa/x64/lower.isle line 698.
13122
0
                                return Some(v305);
13123
                            }
13124
                            I32X4 => {
13125
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13126
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13127
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13128
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13129
0
                                let v306 = constructor_x64_psrld(ctx, v68, v286);
13130
0
                                let v307 = constructor_output_xmm(ctx, v306);
13131
0
                                // Rule at src/isa/x64/lower.isle line 701.
13132
0
                                return Some(v307);
13133
                            }
13134
                            I64X2 => {
13135
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13136
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13137
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13138
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13139
0
                                let v308 = constructor_x64_psrlq(ctx, v68, v286);
13140
0
                                let v309 = constructor_output_xmm(ctx, v308);
13141
0
                                // Rule at src/isa/x64/lower.isle line 704.
13142
0
                                return Some(v309);
13143
                            }
13144
15.3k
                            _ => {}
13145
15.3k
                        }
13146
15.3k
                        let v4 = C::fits_in_64(ctx, v3);
13147
15.3k
                        if let Some(v5) = v4 {
13148
15.3k
                            let v38 = C::unpack_value_array_2(ctx, v37);
13149
15.3k
                            let v294 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Zero);
13150
15.3k
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13151
15.3k
                            let v295 = constructor_x64_shr(ctx, v5, v294, v266);
13152
15.3k
                            let v296 = constructor_output_gpr(ctx, v295);
13153
15.3k
                            // Rule at src/isa/x64/lower.isle line 605.
13154
15.3k
                            return Some(v296);
13155
0
                        }
13156
0
                    }
13157
                }
13158
                &Opcode::Sshr => {
13159
301
                    let v1 = C::first_result(ctx, arg0);
13160
301
                    if let Some(v2) = v1 {
13161
301
                        let v3 = C::value_type(ctx, v2);
13162
301
                        match v3 {
13163
                            I128 => {
13164
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13165
0
                                let v269 = constructor_lo_gpr(ctx, v38.1);
13166
0
                                let v270 = C::put_in_regs(ctx, v38.0);
13167
0
                                let v314 = constructor_sar_i128(ctx, v270, v269);
13168
0
                                let v315 = C::output(ctx, v314);
13169
0
                                // Rule at src/isa/x64/lower.isle line 754.
13170
0
                                return Some(v315);
13171
                            }
13172
                            I8X16 => {
13173
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13174
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13175
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13176
0
                                let v316 = &C::xmm_to_xmm_mem(ctx, v68);
13177
0
                                let v317 = constructor_x64_punpcklbw(ctx, v68, v316);
13178
0
                                let v318 = &C::xmm_to_xmm_mem(ctx, v68);
13179
0
                                let v319 = constructor_x64_punpckhbw(ctx, v68, v318);
13180
0
                                let v92 = C::value_type(ctx, v38.1);
13181
0
                                let v320 = &constructor_sshr_i8x16_bigger_shift(ctx, v92, v285);
13182
0
                                let v321 = constructor_x64_psraw(ctx, v317, v320);
13183
0
                                let v322 = constructor_x64_psraw(ctx, v319, v320);
13184
0
                                let v323 = &C::xmm_to_xmm_mem(ctx, v322);
13185
0
                                let v324 = constructor_x64_packsswb(ctx, v321, v323);
13186
0
                                let v325 = constructor_output_xmm(ctx, v324);
13187
0
                                // Rule at src/isa/x64/lower.isle line 775.
13188
0
                                return Some(v325);
13189
                            }
13190
                            I16X8 => {
13191
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13192
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13193
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13194
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13195
0
                                let v326 = constructor_x64_psraw(ctx, v68, v286);
13196
0
                                let v327 = constructor_output_xmm(ctx, v326);
13197
0
                                // Rule at src/isa/x64/lower.isle line 804.
13198
0
                                return Some(v327);
13199
                            }
13200
                            I32X4 => {
13201
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13202
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13203
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13204
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13205
0
                                let v328 = constructor_x64_psrad(ctx, v68, v286);
13206
0
                                let v329 = constructor_output_xmm(ctx, v328);
13207
0
                                // Rule at src/isa/x64/lower.isle line 807.
13208
0
                                return Some(v329);
13209
                            }
13210
                            I64X2 => {
13211
0
                                let v332 = C::use_avx512vl(ctx);
13212
0
                                if v332 == true {
13213
0
                                    let v333 = C::use_avx512f(ctx);
13214
0
                                    if v333 == true {
13215
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
13216
0
                                        let v171 = C::def_inst(ctx, v38.1);
13217
0
                                        if let Some(v172) = v171 {
13218
0
                                            let v173 = &C::inst_data(ctx, v172);
13219
                                            if let &InstructionData::UnaryImm {
13220
0
                                                opcode: ref v330,
13221
0
                                                imm: v331,
13222
0
                                            } = v173 {
13223
0
                                                if let &Opcode::Iconst = v330 {
13224
0
                                                    let v334 = &C::put_in_xmm_mem(ctx, v38.0);
13225
0
                                                    let v335 = C::shift_amount_masked(ctx, v3, v331);
13226
0
                                                    let v336 = constructor_x64_vpsraq_imm(ctx, v334, v335);
13227
0
                                                    let v337 = constructor_output_xmm(ctx, v336);
13228
0
                                                    // Rule at src/isa/x64/lower.isle line 813.
13229
0
                                                    return Some(v337);
13230
0
                                                }
13231
0
                                            }
13232
0
                                        }
13233
0
                                        let v60 = constructor_put_in_gpr(ctx, v38.1);
13234
0
                                        let v338 = C::shift_mask(ctx, v3);
13235
0
                                        let v339 = C::u8_as_u32(ctx, v338);
13236
0
                                        let v340 = RegMemImm::Imm {
13237
0
                                            simm32: v339,
13238
0
                                        };
13239
0
                                        let v341 = &C::gpr_mem_imm_new(ctx, &v340);
13240
0
                                        let v342 = constructor_x64_and(ctx, I64, v60, v341);
13241
0
                                        let v343 = constructor_put_in_xmm(ctx, v38.0);
13242
0
                                        let v344 = &C::gpr_to_gpr_mem(ctx, v342);
13243
0
                                        let v345 = constructor_x64_movd_to_xmm(ctx, v344);
13244
0
                                        let v346 = &C::xmm_to_xmm_mem(ctx, v345);
13245
0
                                        let v347 = constructor_x64_vpsraq(ctx, v343, v346);
13246
0
                                        let v348 = constructor_output_xmm(ctx, v347);
13247
0
                                        // Rule at src/isa/x64/lower.isle line 818.
13248
0
                                        return Some(v348);
13249
0
                                    }
13250
0
                                }
13251
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13252
0
                                let v171 = C::def_inst(ctx, v38.1);
13253
0
                                if let Some(v172) = v171 {
13254
0
                                    let v173 = &C::inst_data(ctx, v172);
13255
                                    if let &InstructionData::UnaryImm {
13256
0
                                        opcode: ref v330,
13257
0
                                        imm: v331,
13258
0
                                    } = v173 {
13259
0
                                        if let &Opcode::Iconst = v330 {
13260
0
                                            let v349 = C::u64_from_imm64(ctx, v331);
13261
0
                                            let v350 = C::u64_as_u32(ctx, v349);
13262
0
                                            if let Some(v351) = v350 {
13263
0
                                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13264
0
                                                let v353 = C::u32_and(ctx, v351, 0x3F);
13265
0
                                                let v354 = constructor_lower_i64x2_sshr_imm(ctx, v68, v353);
13266
0
                                                let v355 = constructor_output_xmm(ctx, v354);
13267
0
                                                // Rule at src/isa/x64/lower.isle line 824.
13268
0
                                                return Some(v355);
13269
0
                                            }
13270
0
                                        }
13271
0
                                    }
13272
0
                                }
13273
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13274
0
                                let v356 = constructor_put_in_gpr(ctx, v38.1);
13275
0
                                let v357 = RegMemImm::Imm {
13276
0
                                    simm32: 0x3F,
13277
0
                                };
13278
0
                                let v358 = &C::gpr_mem_imm_new(ctx, &v357);
13279
0
                                let v359 = constructor_x64_and(ctx, I64, v356, v358);
13280
0
                                let v360 = constructor_lower_i64x2_sshr_gpr(ctx, v68, v359);
13281
0
                                let v361 = constructor_output_xmm(ctx, v360);
13282
0
                                // Rule at src/isa/x64/lower.isle line 827.
13283
0
                                return Some(v361);
13284
                            }
13285
301
                            _ => {}
13286
301
                        }
13287
301
                        let v4 = C::fits_in_64(ctx, v3);
13288
301
                        if let Some(v5) = v4 {
13289
301
                            let v38 = C::unpack_value_array_2(ctx, v37);
13290
301
                            let v311 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Sign);
13291
301
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13292
301
                            let v312 = constructor_x64_sar(ctx, v5, v311, v266);
13293
301
                            let v313 = constructor_output_gpr(ctx, v312);
13294
301
                            // Rule at src/isa/x64/lower.isle line 717.
13295
301
                            return Some(v313);
13296
0
                        }
13297
0
                    }
13298
                }
13299
                &Opcode::Fadd => {
13300
0
                    let v1 = C::first_result(ctx, arg0);
13301
0
                    if let Some(v2) = v1 {
13302
0
                        let v3 = C::value_type(ctx, v2);
13303
0
                        match v3 {
13304
                            F32 => {
13305
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13306
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13307
0
                                if let Some(v59) = v58 {
13308
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13309
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13310
0
                                    let v1261 = constructor_x64_addss(ctx, v1249, v1260);
13311
0
                                    let v1262 = constructor_output_xmm(ctx, v1261);
13312
0
                                    // Rule at src/isa/x64/lower.isle line 2501.
13313
0
                                    return Some(v1262);
13314
0
                                }
13315
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13316
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13317
0
                                let v1252 = constructor_x64_addss(ctx, v68, v69);
13318
0
                                let v1253 = constructor_output_xmm(ctx, v1252);
13319
0
                                // Rule at src/isa/x64/lower.isle line 2490.
13320
0
                                return Some(v1253);
13321
                            }
13322
                            F64 => {
13323
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13324
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13325
0
                                if let Some(v59) = v58 {
13326
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13327
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13328
0
                                    let v1263 = constructor_x64_addsd(ctx, v1249, v1260);
13329
0
                                    let v1264 = constructor_output_xmm(ctx, v1263);
13330
0
                                    // Rule at src/isa/x64/lower.isle line 2503.
13331
0
                                    return Some(v1264);
13332
0
                                }
13333
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13334
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13335
0
                                let v1254 = constructor_x64_addsd(ctx, v68, v69);
13336
0
                                let v1255 = constructor_output_xmm(ctx, v1254);
13337
0
                                // Rule at src/isa/x64/lower.isle line 2492.
13338
0
                                return Some(v1255);
13339
                            }
13340
                            F32X4 => {
13341
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13342
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13343
0
                                if let Some(v59) = v58 {
13344
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13345
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13346
0
                                    let v1265 = constructor_x64_addps(ctx, v1249, v1260);
13347
0
                                    let v1266 = constructor_output_xmm(ctx, v1265);
13348
0
                                    // Rule at src/isa/x64/lower.isle line 2505.
13349
0
                                    return Some(v1266);
13350
0
                                }
13351
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13352
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13353
0
                                let v1256 = constructor_x64_addps(ctx, v68, v69);
13354
0
                                let v1257 = constructor_output_xmm(ctx, v1256);
13355
0
                                // Rule at src/isa/x64/lower.isle line 2494.
13356
0
                                return Some(v1257);
13357
                            }
13358
                            F64X2 => {
13359
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13360
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13361
0
                                if let Some(v59) = v58 {
13362
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13363
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13364
0
                                    let v1267 = constructor_x64_addpd(ctx, v1249, v1260);
13365
0
                                    let v1268 = constructor_output_xmm(ctx, v1267);
13366
0
                                    // Rule at src/isa/x64/lower.isle line 2507.
13367
0
                                    return Some(v1268);
13368
0
                                }
13369
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13370
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13371
0
                                let v1258 = constructor_x64_addpd(ctx, v68, v69);
13372
0
                                let v1259 = constructor_output_xmm(ctx, v1258);
13373
0
                                // Rule at src/isa/x64/lower.isle line 2496.
13374
0
                                return Some(v1259);
13375
                            }
13376
0
                            _ => {}
13377
                        }
13378
0
                    }
13379
                }
13380
                &Opcode::Fsub => {
13381
0
                    let v1 = C::first_result(ctx, arg0);
13382
0
                    if let Some(v2) = v1 {
13383
0
                        let v3 = C::value_type(ctx, v2);
13384
0
                        match v3 {
13385
                            F32 => {
13386
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13387
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13388
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13389
0
                                let v1269 = constructor_x64_subss(ctx, v68, v69);
13390
0
                                let v1270 = constructor_output_xmm(ctx, v1269);
13391
0
                                // Rule at src/isa/x64/lower.isle line 2512.
13392
0
                                return Some(v1270);
13393
                            }
13394
                            F64 => {
13395
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13396
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13397
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13398
0
                                let v1271 = constructor_x64_subsd(ctx, v68, v69);
13399
0
                                let v1272 = constructor_output_xmm(ctx, v1271);
13400
0
                                // Rule at src/isa/x64/lower.isle line 2514.
13401
0
                                return Some(v1272);
13402
                            }
13403
                            F32X4 => {
13404
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13405
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13406
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13407
0
                                let v1273 = constructor_x64_subps(ctx, v68, v69);
13408
0
                                let v1274 = constructor_output_xmm(ctx, v1273);
13409
0
                                // Rule at src/isa/x64/lower.isle line 2516.
13410
0
                                return Some(v1274);
13411
                            }
13412
                            F64X2 => {
13413
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13414
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13415
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13416
0
                                let v1275 = constructor_x64_subpd(ctx, v68, v69);
13417
0
                                let v1276 = constructor_output_xmm(ctx, v1275);
13418
0
                                // Rule at src/isa/x64/lower.isle line 2518.
13419
0
                                return Some(v1276);
13420
                            }
13421
0
                            _ => {}
13422
                        }
13423
0
                    }
13424
                }
13425
                &Opcode::Fmul => {
13426
0
                    let v1 = C::first_result(ctx, arg0);
13427
0
                    if let Some(v2) = v1 {
13428
0
                        let v3 = C::value_type(ctx, v2);
13429
0
                        match v3 {
13430
                            F32 => {
13431
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13432
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13433
0
                                if let Some(v59) = v58 {
13434
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13435
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13436
0
                                    let v1285 = constructor_x64_mulss(ctx, v1249, v1260);
13437
0
                                    let v1286 = constructor_output_xmm(ctx, v1285);
13438
0
                                    // Rule at src/isa/x64/lower.isle line 2534.
13439
0
                                    return Some(v1286);
13440
0
                                }
13441
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13442
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13443
0
                                let v1277 = constructor_x64_mulss(ctx, v68, v69);
13444
0
                                let v1278 = constructor_output_xmm(ctx, v1277);
13445
0
                                // Rule at src/isa/x64/lower.isle line 2523.
13446
0
                                return Some(v1278);
13447
                            }
13448
                            F64 => {
13449
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13450
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13451
0
                                if let Some(v59) = v58 {
13452
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13453
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13454
0
                                    let v1287 = constructor_x64_mulsd(ctx, v1249, v1260);
13455
0
                                    let v1288 = constructor_output_xmm(ctx, v1287);
13456
0
                                    // Rule at src/isa/x64/lower.isle line 2536.
13457
0
                                    return Some(v1288);
13458
0
                                }
13459
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13460
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13461
0
                                let v1279 = constructor_x64_mulsd(ctx, v68, v69);
13462
0
                                let v1280 = constructor_output_xmm(ctx, v1279);
13463
0
                                // Rule at src/isa/x64/lower.isle line 2525.
13464
0
                                return Some(v1280);
13465
                            }
13466
                            F32X4 => {
13467
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13468
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13469
0
                                if let Some(v59) = v58 {
13470
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13471
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13472
0
                                    let v1289 = constructor_x64_mulps(ctx, v1249, v1260);
13473
0
                                    let v1290 = constructor_output_xmm(ctx, v1289);
13474
0
                                    // Rule at src/isa/x64/lower.isle line 2538.
13475
0
                                    return Some(v1290);
13476
0
                                }
13477
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13478
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13479
0
                                let v1281 = constructor_x64_mulps(ctx, v68, v69);
13480
0
                                let v1282 = constructor_output_xmm(ctx, v1281);
13481
0
                                // Rule at src/isa/x64/lower.isle line 2527.
13482
0
                                return Some(v1282);
13483
                            }
13484
                            F64X2 => {
13485
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13486
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13487
0
                                if let Some(v59) = v58 {
13488
0
                                    let v1249 = constructor_put_in_xmm(ctx, v38.1);
13489
0
                                    let v1260 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13490
0
                                    let v1291 = constructor_x64_mulpd(ctx, v1249, v1260);
13491
0
                                    let v1292 = constructor_output_xmm(ctx, v1291);
13492
0
                                    // Rule at src/isa/x64/lower.isle line 2540.
13493
0
                                    return Some(v1292);
13494
0
                                }
13495
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13496
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13497
0
                                let v1283 = constructor_x64_mulpd(ctx, v68, v69);
13498
0
                                let v1284 = constructor_output_xmm(ctx, v1283);
13499
0
                                // Rule at src/isa/x64/lower.isle line 2529.
13500
0
                                return Some(v1284);
13501
                            }
13502
0
                            _ => {}
13503
                        }
13504
0
                    }
13505
                }
13506
                &Opcode::Fdiv => {
13507
0
                    let v1 = C::first_result(ctx, arg0);
13508
0
                    if let Some(v2) = v1 {
13509
0
                        let v3 = C::value_type(ctx, v2);
13510
0
                        match v3 {
13511
                            F32 => {
13512
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13513
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13514
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13515
0
                                let v1293 = constructor_x64_divss(ctx, v68, v69);
13516
0
                                let v1294 = constructor_output_xmm(ctx, v1293);
13517
0
                                // Rule at src/isa/x64/lower.isle line 2545.
13518
0
                                return Some(v1294);
13519
                            }
13520
                            F64 => {
13521
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13522
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13523
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13524
0
                                let v1295 = constructor_x64_divsd(ctx, v68, v69);
13525
0
                                let v1296 = constructor_output_xmm(ctx, v1295);
13526
0
                                // Rule at src/isa/x64/lower.isle line 2547.
13527
0
                                return Some(v1296);
13528
                            }
13529
                            F32X4 => {
13530
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13531
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13532
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13533
0
                                let v1297 = constructor_x64_divps(ctx, v68, v69);
13534
0
                                let v1298 = constructor_output_xmm(ctx, v1297);
13535
0
                                // Rule at src/isa/x64/lower.isle line 2549.
13536
0
                                return Some(v1298);
13537
                            }
13538
                            F64X2 => {
13539
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13540
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13541
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13542
0
                                let v1299 = constructor_x64_divpd(ctx, v68, v69);
13543
0
                                let v1300 = constructor_output_xmm(ctx, v1299);
13544
0
                                // Rule at src/isa/x64/lower.isle line 2551.
13545
0
                                return Some(v1300);
13546
                            }
13547
0
                            _ => {}
13548
                        }
13549
0
                    }
13550
                }
13551
                &Opcode::Fcopysign => {
13552
0
                    let v1 = C::first_result(ctx, arg0);
13553
0
                    if let Some(v2) = v1 {
13554
0
                        let v3 = C::value_type(ctx, v2);
13555
0
                        match v3 {
13556
                            F32 => {
13557
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13558
0
                                let v2080 = C::value_type(ctx, v38.0);
13559
0
                                if v2080 == F32 {
13560
0
                                    let v2130 = constructor_imm(ctx, F32, 0x80000000);
13561
0
                                    let v2131 = C::xmm_new(ctx, v2130);
13562
0
                                    let v2132 = &C::put_in_xmm_mem(ctx, v38.0);
13563
0
                                    let v2133 = constructor_x64_andnps(ctx, v2131, v2132);
13564
0
                                    let v2134 = &C::put_in_xmm_mem(ctx, v38.1);
13565
0
                                    let v2135 = constructor_x64_andps(ctx, v2131, v2134);
13566
0
                                    let v2136 = &C::xmm_to_xmm_mem(ctx, v2135);
13567
0
                                    let v2137 = constructor_x64_orps(ctx, v2133, v2136);
13568
0
                                    let v2138 = constructor_output_xmm(ctx, v2137);
13569
0
                                    // Rule at src/isa/x64/lower.isle line 3916.
13570
0
                                    return Some(v2138);
13571
0
                                }
13572
                            }
13573
                            F64 => {
13574
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13575
0
                                let v2080 = C::value_type(ctx, v38.0);
13576
0
                                if v2080 == F64 {
13577
0
                                    let v2139 = constructor_imm(ctx, F64, 0x8000000000000000);
13578
0
                                    let v2140 = C::xmm_new(ctx, v2139);
13579
0
                                    let v2132 = &C::put_in_xmm_mem(ctx, v38.0);
13580
0
                                    let v2141 = constructor_x64_andnpd(ctx, v2140, v2132);
13581
0
                                    let v2134 = &C::put_in_xmm_mem(ctx, v38.1);
13582
0
                                    let v2142 = constructor_x64_andpd(ctx, v2140, v2134);
13583
0
                                    let v2143 = &C::xmm_to_xmm_mem(ctx, v2142);
13584
0
                                    let v2144 = constructor_x64_orpd(ctx, v2141, v2143);
13585
0
                                    let v2145 = constructor_output_xmm(ctx, v2144);
13586
0
                                    // Rule at src/isa/x64/lower.isle line 3922.
13587
0
                                    return Some(v2145);
13588
0
                                }
13589
                            }
13590
0
                            _ => {}
13591
                        }
13592
0
                    }
13593
                }
13594
                &Opcode::Fmin => {
13595
0
                    let v1 = C::first_result(ctx, arg0);
13596
0
                    if let Some(v2) = v1 {
13597
0
                        let v3 = C::value_type(ctx, v2);
13598
0
                        match v3 {
13599
                            F32 => {
13600
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13601
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13602
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13603
0
                                let v1319 = constructor_xmm_min_max_seq(ctx, F32, true, v68, v444);
13604
0
                                let v1320 = constructor_output_xmm(ctx, v1319);
13605
0
                                // Rule at src/isa/x64/lower.isle line 2582.
13606
0
                                return Some(v1320);
13607
                            }
13608
                            F64 => {
13609
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13610
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13611
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13612
0
                                let v1321 = constructor_xmm_min_max_seq(ctx, F64, true, v68, v444);
13613
0
                                let v1322 = constructor_output_xmm(ctx, v1321);
13614
0
                                // Rule at src/isa/x64/lower.isle line 2584.
13615
0
                                return Some(v1322);
13616
                            }
13617
                            F32X4 => {
13618
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13619
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13620
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13621
0
                                let v1323 = constructor_x64_minps(ctx, v68, v69);
13622
0
                                let v1324 = constructor_put_in_xmm(ctx, v38.1);
13623
0
                                let v1325 = &C::put_in_xmm_mem(ctx, v38.0);
13624
0
                                let v1326 = constructor_x64_minps(ctx, v1324, v1325);
13625
0
                                let v1327 = &C::xmm_to_xmm_mem(ctx, v1326);
13626
0
                                let v1328 = constructor_x64_orps(ctx, v1323, v1327);
13627
0
                                let v1329 = &C::xmm_to_xmm_mem(ctx, v1326);
13628
0
                                let v1330 = constructor_x64_cmpps(ctx, v1328, v1329, &FcmpImm::Unordered);
13629
0
                                let v1331 = &C::xmm_to_xmm_mem(ctx, v1330);
13630
0
                                let v1332 = constructor_x64_orps(ctx, v1328, v1331);
13631
0
                                let v1334 = &C::xmi_imm(ctx, 0xA);
13632
0
                                let v1335 = constructor_x64_psrld(ctx, v1330, v1334);
13633
0
                                let v1336 = &C::xmm_to_xmm_mem(ctx, v1332);
13634
0
                                let v1337 = constructor_x64_andnps(ctx, v1335, v1336);
13635
0
                                let v1338 = constructor_output_xmm(ctx, v1337);
13636
0
                                // Rule at src/isa/x64/lower.isle line 2599.
13637
0
                                return Some(v1338);
13638
                            }
13639
                            F64X2 => {
13640
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13641
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13642
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13643
0
                                let v1339 = constructor_x64_minpd(ctx, v68, v69);
13644
0
                                let v1324 = constructor_put_in_xmm(ctx, v38.1);
13645
0
                                let v1325 = &C::put_in_xmm_mem(ctx, v38.0);
13646
0
                                let v1340 = constructor_x64_minpd(ctx, v1324, v1325);
13647
0
                                let v1341 = &C::xmm_to_xmm_mem(ctx, v1340);
13648
0
                                let v1342 = constructor_x64_orpd(ctx, v1339, v1341);
13649
0
                                let v1343 = &C::xmm_to_xmm_mem(ctx, v1340);
13650
0
                                let v1344 = constructor_x64_cmppd(ctx, v1339, v1343, &FcmpImm::Unordered);
13651
0
                                let v1345 = &C::xmm_to_xmm_mem(ctx, v1344);
13652
0
                                let v1346 = constructor_x64_orpd(ctx, v1342, v1345);
13653
0
                                let v1348 = &C::xmi_imm(ctx, 0xD);
13654
0
                                let v1349 = constructor_x64_psrlq(ctx, v1344, v1348);
13655
0
                                let v1350 = &C::xmm_to_xmm_mem(ctx, v1346);
13656
0
                                let v1351 = constructor_x64_andnpd(ctx, v1349, v1350);
13657
0
                                let v1352 = constructor_output_xmm(ctx, v1351);
13658
0
                                // Rule at src/isa/x64/lower.isle line 2642.
13659
0
                                return Some(v1352);
13660
                            }
13661
0
                            _ => {}
13662
                        }
13663
0
                    }
13664
                }
13665
                &Opcode::Fmax => {
13666
0
                    let v1 = C::first_result(ctx, arg0);
13667
0
                    if let Some(v2) = v1 {
13668
0
                        let v3 = C::value_type(ctx, v2);
13669
0
                        match v3 {
13670
                            F32 => {
13671
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13672
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13673
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13674
0
                                let v1354 = constructor_xmm_min_max_seq(ctx, F32, false, v68, v444);
13675
0
                                let v1355 = constructor_output_xmm(ctx, v1354);
13676
0
                                // Rule at src/isa/x64/lower.isle line 2654.
13677
0
                                return Some(v1355);
13678
                            }
13679
                            F64 => {
13680
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13681
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13682
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13683
0
                                let v1356 = constructor_xmm_min_max_seq(ctx, F64, false, v68, v444);
13684
0
                                let v1357 = constructor_output_xmm(ctx, v1356);
13685
0
                                // Rule at src/isa/x64/lower.isle line 2656.
13686
0
                                return Some(v1357);
13687
                            }
13688
                            F32X4 => {
13689
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13690
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13691
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13692
0
                                let v1358 = constructor_x64_maxps(ctx, v68, v69);
13693
0
                                let v1324 = constructor_put_in_xmm(ctx, v38.1);
13694
0
                                let v1325 = &C::put_in_xmm_mem(ctx, v38.0);
13695
0
                                let v1359 = constructor_x64_maxps(ctx, v1324, v1325);
13696
0
                                let v1360 = &C::xmm_to_xmm_mem(ctx, v1359);
13697
0
                                let v1361 = constructor_x64_xorps(ctx, v1358, v1360);
13698
0
                                let v1362 = &C::xmm_to_xmm_mem(ctx, v1361);
13699
0
                                let v1363 = constructor_x64_orps(ctx, v1358, v1362);
13700
0
                                let v1364 = &C::xmm_to_xmm_mem(ctx, v1361);
13701
0
                                let v1365 = constructor_x64_subps(ctx, v1363, v1364);
13702
0
                                let v1366 = &C::xmm_to_xmm_mem(ctx, v1363);
13703
0
                                let v1367 = constructor_x64_cmpps(ctx, v1363, v1366, &FcmpImm::Unordered);
13704
0
                                let v1368 = &C::xmi_imm(ctx, 0xA);
13705
0
                                let v1369 = constructor_x64_psrld(ctx, v1367, v1368);
13706
0
                                let v1370 = &C::xmm_to_xmm_mem(ctx, v1365);
13707
0
                                let v1371 = constructor_x64_andnps(ctx, v1369, v1370);
13708
0
                                let v1372 = constructor_output_xmm(ctx, v1371);
13709
0
                                // Rule at src/isa/x64/lower.isle line 2662.
13710
0
                                return Some(v1372);
13711
                            }
13712
                            F64X2 => {
13713
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13714
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13715
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13716
0
                                let v1373 = constructor_x64_maxpd(ctx, v68, v69);
13717
0
                                let v1324 = constructor_put_in_xmm(ctx, v38.1);
13718
0
                                let v1325 = &C::put_in_xmm_mem(ctx, v38.0);
13719
0
                                let v1374 = constructor_x64_maxpd(ctx, v1324, v1325);
13720
0
                                let v1375 = &C::xmm_to_xmm_mem(ctx, v1374);
13721
0
                                let v1376 = constructor_x64_xorpd(ctx, v1373, v1375);
13722
0
                                let v1377 = &C::xmm_to_xmm_mem(ctx, v1376);
13723
0
                                let v1378 = constructor_x64_orpd(ctx, v1373, v1377);
13724
0
                                let v1379 = &C::xmm_to_xmm_mem(ctx, v1376);
13725
0
                                let v1380 = constructor_x64_subpd(ctx, v1378, v1379);
13726
0
                                let v1381 = &C::xmm_to_xmm_mem(ctx, v1378);
13727
0
                                let v1382 = constructor_x64_cmppd(ctx, v1378, v1381, &FcmpImm::Unordered);
13728
0
                                let v1383 = &C::xmi_imm(ctx, 0xD);
13729
0
                                let v1384 = constructor_x64_psrlq(ctx, v1382, v1383);
13730
0
                                let v1385 = &C::xmm_to_xmm_mem(ctx, v1380);
13731
0
                                let v1386 = constructor_x64_andnpd(ctx, v1384, v1385);
13732
0
                                let v1387 = constructor_output_xmm(ctx, v1386);
13733
0
                                // Rule at src/isa/x64/lower.isle line 2705.
13734
0
                                return Some(v1387);
13735
                            }
13736
0
                            _ => {}
13737
                        }
13738
0
                    }
13739
                }
13740
                &Opcode::Snarrow => {
13741
0
                    let v1 = C::first_result(ctx, arg0);
13742
0
                    if let Some(v2) = v1 {
13743
0
                        let v3 = C::value_type(ctx, v2);
13744
0
                        match v3 {
13745
                            I8X16 => {
13746
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13747
0
                                let v2080 = C::value_type(ctx, v38.0);
13748
0
                                if v2080 == I16X8 {
13749
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13750
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13751
0
                                    let v2081 = constructor_x64_packsswb(ctx, v68, v69);
13752
0
                                    let v2082 = constructor_output_xmm(ctx, v2081);
13753
0
                                    // Rule at src/isa/x64/lower.isle line 3802.
13754
0
                                    return Some(v2082);
13755
0
                                }
13756
                            }
13757
                            I16X8 => {
13758
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13759
0
                                let v2080 = C::value_type(ctx, v38.0);
13760
0
                                if v2080 == I32X4 {
13761
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13762
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13763
0
                                    let v2083 = constructor_x64_packssdw(ctx, v68, v69);
13764
0
                                    let v2084 = constructor_output_xmm(ctx, v2083);
13765
0
                                    // Rule at src/isa/x64/lower.isle line 3805.
13766
0
                                    return Some(v2084);
13767
0
                                }
13768
                            }
13769
                            I32X4 => {
13770
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13771
0
                                let v171 = C::def_inst(ctx, v38.1);
13772
0
                                if let Some(v172) = v171 {
13773
0
                                    let v173 = &C::inst_data(ctx, v172);
13774
                                    if let &InstructionData::UnaryConst {
13775
0
                                        opcode: ref v2088,
13776
0
                                        constant_handle: v2089,
13777
0
                                    } = v173 {
13778
0
                                        if let &Opcode::Vconst = v2088 {
13779
0
                                            let v180 = C::def_inst(ctx, v38.0);
13780
0
                                            if let Some(v181) = v180 {
13781
0
                                                let v182 = &C::inst_data(ctx, v181);
13782
                                                if let &InstructionData::Unary {
13783
0
                                                    opcode: ref v183,
13784
0
                                                    arg: v184,
13785
0
                                                } = v182 {
13786
0
                                                    match v183 {
13787
                                                        &Opcode::FcvtToSintSat => {
13788
0
                                                            let v2085 = C::first_result(ctx, v181);
13789
0
                                                            if let Some(v2086) = v2085 {
13790
0
                                                                let v2087 = C::value_type(ctx, v2086);
13791
0
                                                                if v2087 == I64X2 {
13792
0
                                                                    let v2090 = C::u128_from_constant(ctx, v2089);
13793
0
                                                                    if let Some(v2091) = v2090 {
13794
0
                                                                        if v2091 == 0x0 {
13795
0
                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
13796
0
                                                                            let v2092 = &C::xmm_to_xmm_mem(ctx, v185);
13797
0
                                                                            let v2093 = constructor_x64_cmppd(ctx, v185, v2092, &FcmpImm::Equal);
13798
0
                                                                            let v2095 = C::emit_u128_le_const(ctx, 0x41DFFFFFFFC0000041DFFFFFFFC00000);
13799
0
                                                                            let v2096 = &constructor_const_to_xmm_mem(ctx, v2095);
13800
0
                                                                            let v2097 = constructor_x64_andps(ctx, v2093, v2096);
13801
0
                                                                            let v2098 = &C::xmm_to_xmm_mem(ctx, v2097);
13802
0
                                                                            let v2099 = constructor_x64_minpd(ctx, v185, v2098);
13803
0
                                                                            let v2100 = &C::xmm_to_xmm_mem(ctx, v2099);
13804
0
                                                                            let v2101 = constructor_x64_cvttpd2dq(ctx, v2100);
13805
0
                                                                            let v2102 = constructor_output_xmm(ctx, v2101);
13806
0
                                                                            // Rule at src/isa/x64/lower.isle line 3814.
13807
0
                                                                            return Some(v2102);
13808
0
                                                                        }
13809
0
                                                                    }
13810
0
                                                                }
13811
0
                                                            }
13812
                                                        }
13813
                                                        &Opcode::X86Cvtt2dq => {
13814
0
                                                            let v2085 = C::first_result(ctx, v181);
13815
0
                                                            if let Some(v2086) = v2085 {
13816
0
                                                                let v2087 = C::value_type(ctx, v2086);
13817
0
                                                                if v2087 == I64X2 {
13818
0
                                                                    let v2090 = C::u128_from_constant(ctx, v2089);
13819
0
                                                                    if let Some(v2091) = v2090 {
13820
0
                                                                        if v2091 == 0x0 {
13821
0
                                                                            let v499 = &C::put_in_xmm_mem(ctx, v184);
13822
0
                                                                            let v2103 = constructor_x64_cvttpd2dq(ctx, v499);
13823
0
                                                                            let v2104 = constructor_output_xmm(ctx, v2103);
13824
0
                                                                            // Rule at src/isa/x64/lower.isle line 3838.
13825
0
                                                                            return Some(v2104);
13826
0
                                                                        }
13827
0
                                                                    }
13828
0
                                                                }
13829
0
                                                            }
13830
                                                        }
13831
0
                                                        _ => {}
13832
                                                    }
13833
0
                                                }
13834
0
                                            }
13835
0
                                        }
13836
0
                                    }
13837
0
                                }
13838
                            }
13839
0
                            _ => {}
13840
                        }
13841
0
                    }
13842
                }
13843
                &Opcode::Unarrow => {
13844
0
                    let v1 = C::first_result(ctx, arg0);
13845
0
                    if let Some(v2) = v1 {
13846
0
                        let v3 = C::value_type(ctx, v2);
13847
0
                        match v3 {
13848
                            I8X16 => {
13849
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13850
0
                                let v2080 = C::value_type(ctx, v38.0);
13851
0
                                if v2080 == I16X8 {
13852
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13853
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13854
0
                                    let v2105 = constructor_x64_packuswb(ctx, v68, v69);
13855
0
                                    let v2106 = constructor_output_xmm(ctx, v2105);
13856
0
                                    // Rule at src/isa/x64/lower.isle line 3844.
13857
0
                                    return Some(v2106);
13858
0
                                }
13859
                            }
13860
                            I16X8 => {
13861
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13862
0
                                let v2080 = C::value_type(ctx, v38.0);
13863
0
                                if v2080 == I32X4 {
13864
0
                                    let v441 = C::use_sse41(ctx);
13865
0
                                    if v441 == true {
13866
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
13867
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13868
0
                                        let v2107 = constructor_x64_packusdw(ctx, v68, v69);
13869
0
                                        let v2108 = constructor_output_xmm(ctx, v2107);
13870
0
                                        // Rule at src/isa/x64/lower.isle line 3847.
13871
0
                                        return Some(v2108);
13872
0
                                    }
13873
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13874
0
                                    let v2109 = constructor_unarrow_i32x4_lanes_to_low_u16_lanes(ctx, v68);
13875
0
                                    let v2110 = constructor_put_in_xmm(ctx, v38.1);
13876
0
                                    let v2111 = constructor_unarrow_i32x4_lanes_to_low_u16_lanes(ctx, v2110);
13877
0
                                    let v2112 = &C::xmm_to_xmm_mem(ctx, v2111);
13878
0
                                    let v2113 = constructor_x64_punpcklqdq(ctx, v2109, v2112);
13879
0
                                    let v2114 = constructor_output_xmm(ctx, v2113);
13880
0
                                    // Rule at src/isa/x64/lower.isle line 3857.
13881
0
                                    return Some(v2114);
13882
0
                                }
13883
                            }
13884
0
                            _ => {}
13885
                        }
13886
0
                    }
13887
                }
13888
                &Opcode::Uunarrow => {
13889
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
13890
0
                    let v171 = C::def_inst(ctx, v38.1);
13891
0
                    if let Some(v172) = v171 {
13892
0
                        let v173 = &C::inst_data(ctx, v172);
13893
                        if let &InstructionData::UnaryConst {
13894
0
                            opcode: ref v2088,
13895
0
                            constant_handle: v2089,
13896
0
                        } = v173 {
13897
0
                            if let &Opcode::Vconst = v2088 {
13898
0
                                let v180 = C::def_inst(ctx, v38.0);
13899
0
                                if let Some(v181) = v180 {
13900
0
                                    let v182 = &C::inst_data(ctx, v181);
13901
                                    if let &InstructionData::Unary {
13902
0
                                        opcode: ref v183,
13903
0
                                        arg: v184,
13904
0
                                    } = v182 {
13905
0
                                        if let &Opcode::FcvtToUintSat = v183 {
13906
0
                                            let v481 = C::value_type(ctx, v184);
13907
0
                                            if v481 == F64X2 {
13908
0
                                                let v2090 = C::u128_from_constant(ctx, v2089);
13909
0
                                                if let Some(v2091) = v2090 {
13910
0
                                                    if v2091 == 0x0 {
13911
0
                                                        let v185 = constructor_put_in_xmm(ctx, v184);
13912
0
                                                        let v2575 = constructor_xmm_zero(ctx, F64X2);
13913
0
                                                        let v2576 = &C::xmm_to_xmm_mem(ctx, v2575);
13914
0
                                                        let v2577 = constructor_x64_maxpd(ctx, v185, v2576);
13915
0
                                                        let v2579 = C::emit_u128_le_const(ctx, 0x41EFFFFFFFE0000041EFFFFFFFE00000);
13916
0
                                                        let v2580 = &constructor_const_to_xmm_mem(ctx, v2579);
13917
0
                                                        let v2581 = constructor_x64_minpd(ctx, v2577, v2580);
13918
0
                                                        let v2582 = C::xmm_to_reg(ctx, v2581);
13919
0
                                                        let v2583 = &constructor_xmm_to_reg_mem(ctx, v2582);
13920
0
                                                        let v2584 = &C::xmm_mem_to_reg_mem(ctx, v2583);
13921
0
                                                        let v2585 = constructor_x64_round(ctx, F64X2, v2584, &RoundImm::RoundZero);
13922
0
                                                        let v2586 = C::emit_u128_le_const(ctx, 0x43300000000000004330000000000000);
13923
0
                                                        let v2587 = &constructor_const_to_xmm_mem(ctx, v2586);
13924
0
                                                        let v2588 = constructor_x64_addpd(ctx, v2585, v2587);
13925
0
                                                        let v2589 = &C::xmm_to_xmm_mem(ctx, v2575);
13926
0
                                                        let v2590 = constructor_x64_shufps(ctx, v2588, v2589, 0x88);
13927
0
                                                        let v2591 = constructor_output_xmm(ctx, v2590);
13928
0
                                                        // Rule at src/isa/x64/lower.isle line 4691.
13929
0
                                                        return Some(v2591);
13930
0
                                                    }
13931
0
                                                }
13932
0
                                            }
13933
0
                                        }
13934
0
                                    }
13935
0
                                }
13936
0
                            }
13937
0
                        }
13938
0
                    }
13939
                }
13940
                &Opcode::IaddPairwise => {
13941
0
                    let v1 = C::first_result(ctx, arg0);
13942
0
                    if let Some(v2) = v1 {
13943
0
                        let v3 = C::value_type(ctx, v2);
13944
0
                        match v3 {
13945
                            I8X16 => {
13946
0
                                let v1913 = C::emit_u128_le_const(ctx, 0xFF00FF00FF00FF00FF00FF00FF00FF);
13947
0
                                let v1914 = &constructor_const_to_xmm_mem(ctx, v1913);
13948
0
                                let v1915 = constructor_x64_movdqu_load(ctx, v1914);
13949
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13950
0
                                let v1916 = constructor_put_in_xmm(ctx, v38.0);
13951
0
                                let v1917 = &C::xmm_to_xmm_mem(ctx, v1915);
13952
0
                                let v1918 = constructor_x64_pand(ctx, v1916, v1917);
13953
0
                                let v1919 = constructor_put_in_xmm(ctx, v38.1);
13954
0
                                let v1920 = &C::xmm_to_xmm_mem(ctx, v1915);
13955
0
                                let v1921 = constructor_x64_pand(ctx, v1919, v1920);
13956
0
                                let v1922 = &C::xmm_to_xmm_mem(ctx, v1921);
13957
0
                                let v1923 = constructor_x64_packuswb(ctx, v1918, v1922);
13958
0
                                let v1924 = constructor_put_in_xmm(ctx, v38.0);
13959
0
                                let v1926 = &C::xmi_imm(ctx, 0x8);
13960
0
                                let v1927 = constructor_x64_psrlw(ctx, v1924, v1926);
13961
0
                                let v1928 = constructor_put_in_xmm(ctx, v38.1);
13962
0
                                let v1929 = &C::xmi_imm(ctx, 0x8);
13963
0
                                let v1930 = constructor_x64_psrlw(ctx, v1928, v1929);
13964
0
                                let v1931 = &C::xmm_to_xmm_mem(ctx, v1930);
13965
0
                                let v1932 = constructor_x64_packuswb(ctx, v1927, v1931);
13966
0
                                let v1933 = &C::xmm_to_xmm_mem(ctx, v1932);
13967
0
                                let v1934 = constructor_x64_paddb(ctx, v1923, v1933);
13968
0
                                let v1935 = constructor_output_xmm(ctx, v1934);
13969
0
                                // Rule at src/isa/x64/lower.isle line 3591.
13970
0
                                return Some(v1935);
13971
                            }
13972
                            I16X8 => {
13973
0
                                let v525 = C::use_ssse3(ctx);
13974
0
                                if v525 == true {
13975
0
                                    let v38 = C::unpack_value_array_2(ctx, v37);
13976
0
                                    let v171 = C::def_inst(ctx, v38.1);
13977
0
                                    if let Some(v172) = v171 {
13978
0
                                        let v173 = &C::inst_data(ctx, v172);
13979
                                        if let &InstructionData::Unary {
13980
0
                                            opcode: ref v174,
13981
0
                                            arg: v175,
13982
0
                                        } = v173 {
13983
0
                                            match v174 {
13984
                                                &Opcode::SwidenHigh => {
13985
0
                                                    let v180 = C::def_inst(ctx, v38.0);
13986
0
                                                    if let Some(v181) = v180 {
13987
0
                                                        let v182 = &C::inst_data(ctx, v181);
13988
                                                        if let &InstructionData::Unary {
13989
0
                                                            opcode: ref v183,
13990
0
                                                            arg: v184,
13991
0
                                                        } = v182 {
13992
0
                                                            if let &Opcode::SwidenLow = v183 {
13993
0
                                                                if v175 == v184 {
13994
0
                                                                    let v481 = C::value_type(ctx, v184);
13995
0
                                                                    if v481 == I8X16 {
13996
0
                                                                        let v1972 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
13997
0
                                                                        let v1973 = constructor_x64_xmm_load_const(ctx, I8X16, v1972);
13998
0
                                                                        let v1974 = &C::put_in_xmm_mem(ctx, v184);
13999
0
                                                                        let v1975 = constructor_x64_pmaddubsw(ctx, v1973, v1974);
14000
0
                                                                        let v1976 = constructor_output_xmm(ctx, v1975);
14001
0
                                                                        // Rule at src/isa/x64/lower.isle line 3653.
14002
0
                                                                        return Some(v1976);
14003
0
                                                                    }
14004
0
                                                                }
14005
0
                                                            }
14006
0
                                                        }
14007
0
                                                    }
14008
                                                }
14009
                                                &Opcode::UwidenHigh => {
14010
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14011
0
                                                    if let Some(v181) = v180 {
14012
0
                                                        let v182 = &C::inst_data(ctx, v181);
14013
                                                        if let &InstructionData::Unary {
14014
0
                                                            opcode: ref v183,
14015
0
                                                            arg: v184,
14016
0
                                                        } = v182 {
14017
0
                                                            if let &Opcode::UwidenLow = v183 {
14018
0
                                                                if v175 == v184 {
14019
0
                                                                    let v481 = C::value_type(ctx, v184);
14020
0
                                                                    if v481 == I8X16 {
14021
0
                                                                        let v1972 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
14022
0
                                                                        let v1983 = &constructor_const_to_xmm_mem(ctx, v1972);
14023
0
                                                                        let v1980 = constructor_put_in_xmm(ctx, v184);
14024
0
                                                                        let v1984 = constructor_x64_pmaddubsw(ctx, v1980, v1983);
14025
0
                                                                        let v1985 = constructor_output_xmm(ctx, v1984);
14026
0
                                                                        // Rule at src/isa/x64/lower.isle line 3671.
14027
0
                                                                        return Some(v1985);
14028
0
                                                                    }
14029
0
                                                                }
14030
0
                                                            }
14031
0
                                                        }
14032
0
                                                    }
14033
                                                }
14034
0
                                                _ => {}
14035
                                            }
14036
0
                                        }
14037
0
                                    }
14038
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
14039
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
14040
0
                                    let v1936 = constructor_x64_phaddw(ctx, v68, v69);
14041
0
                                    let v1937 = constructor_output_xmm(ctx, v1936);
14042
0
                                    // Rule at src/isa/x64/lower.isle line 3607.
14043
0
                                    return Some(v1937);
14044
0
                                }
14045
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14046
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
14047
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
14048
0
                                let v316 = &C::xmm_to_xmm_mem(ctx, v68);
14049
0
                                let v1939 = constructor_x64_pshuflw(ctx, v316, 0xE8);
14050
0
                                let v1940 = &C::xmm_to_xmm_mem(ctx, v1939);
14051
0
                                let v1941 = constructor_x64_pshufhw(ctx, v1940, 0xE8);
14052
0
                                let v1942 = &C::xmm_to_xmm_mem(ctx, v1941);
14053
0
                                let v1943 = constructor_x64_pshufd(ctx, v1942, 0xE8);
14054
0
                                let v1944 = &C::xmm_to_xmm_mem(ctx, v444);
14055
0
                                let v1945 = constructor_x64_pshuflw(ctx, v1944, 0xE8);
14056
0
                                let v1946 = &C::xmm_to_xmm_mem(ctx, v1945);
14057
0
                                let v1947 = constructor_x64_pshufhw(ctx, v1946, 0xE8);
14058
0
                                let v1948 = &C::xmm_to_xmm_mem(ctx, v1947);
14059
0
                                let v1949 = constructor_x64_pshufd(ctx, v1948, 0xE8);
14060
0
                                let v1950 = &C::xmm_to_xmm_mem(ctx, v1949);
14061
0
                                let v1951 = constructor_x64_punpcklqdq(ctx, v1943, v1950);
14062
0
                                let v1952 = &C::xmi_imm(ctx, 0x10);
14063
0
                                let v1953 = constructor_x64_psrad(ctx, v68, v1952);
14064
0
                                let v1954 = &C::xmi_imm(ctx, 0x10);
14065
0
                                let v1955 = constructor_x64_psrad(ctx, v444, v1954);
14066
0
                                let v1956 = &C::xmm_to_xmm_mem(ctx, v1955);
14067
0
                                let v1957 = constructor_x64_packssdw(ctx, v1953, v1956);
14068
0
                                let v1958 = &C::xmm_to_xmm_mem(ctx, v1957);
14069
0
                                let v1959 = constructor_x64_paddw(ctx, v1951, v1958);
14070
0
                                let v1960 = constructor_output_xmm(ctx, v1959);
14071
0
                                // Rule at src/isa/x64/lower.isle line 3611.
14072
0
                                return Some(v1960);
14073
                            }
14074
                            I32X4 => {
14075
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14076
0
                                let v171 = C::def_inst(ctx, v38.1);
14077
0
                                if let Some(v172) = v171 {
14078
0
                                    let v173 = &C::inst_data(ctx, v172);
14079
0
                                    match v173 {
14080
                                        &InstructionData::Binary {
14081
0
                                            opcode: ref v2013,
14082
0
                                            args: ref v2014,
14083
0
                                        } => {
14084
0
                                            if let &Opcode::Imul = v2013 {
14085
0
                                                let v180 = C::def_inst(ctx, v38.0);
14086
0
                                                if let Some(v181) = v180 {
14087
0
                                                    let v182 = &C::inst_data(ctx, v181);
14088
                                                    if let &InstructionData::Binary {
14089
0
                                                        opcode: ref v1998,
14090
0
                                                        args: ref v1999,
14091
0
                                                    } = v182 {
14092
0
                                                        if let &Opcode::Imul = v1998 {
14093
0
                                                            let v2000 = C::unpack_value_array_2(ctx, v1999);
14094
0
                                                            let v2003 = C::def_inst(ctx, v2000.0);
14095
0
                                                            if let Some(v2004) = v2003 {
14096
0
                                                                let v2005 = &C::inst_data(ctx, v2004);
14097
                                                                if let &InstructionData::Unary {
14098
0
                                                                    opcode: ref v2006,
14099
0
                                                                    arg: v2007,
14100
0
                                                                } = v2005 {
14101
0
                                                                    if let &Opcode::SwidenLow = v2006 {
14102
0
                                                                        let v2008 = C::def_inst(ctx, v2000.1);
14103
0
                                                                        if let Some(v2009) = v2008 {
14104
0
                                                                            let v2010 = &C::inst_data(ctx, v2009);
14105
                                                                            if let &InstructionData::Unary {
14106
0
                                                                                opcode: ref v2011,
14107
0
                                                                                arg: v2012,
14108
0
                                                                            } = v2010 {
14109
0
                                                                                if let &Opcode::SwidenLow = v2011 {
14110
0
                                                                                    let v2015 = C::unpack_value_array_2(ctx, v2014);
14111
0
                                                                                    let v2018 = C::def_inst(ctx, v2015.0);
14112
0
                                                                                    if let Some(v2019) = v2018 {
14113
0
                                                                                        let v2020 = &C::inst_data(ctx, v2019);
14114
                                                                                        if let &InstructionData::Unary {
14115
0
                                                                                            opcode: ref v2021,
14116
0
                                                                                            arg: v2022,
14117
0
                                                                                        } = v2020 {
14118
0
                                                                                            if let &Opcode::SwidenHigh = v2021 {
14119
0
                                                                                                if v2007 == v2022 {
14120
0
                                                                                                    let v2023 = C::def_inst(ctx, v2015.1);
14121
0
                                                                                                    if let Some(v2024) = v2023 {
14122
0
                                                                                                        let v2025 = &C::inst_data(ctx, v2024);
14123
                                                                                                        if let &InstructionData::Unary {
14124
0
                                                                                                            opcode: ref v2026,
14125
0
                                                                                                            arg: v2027,
14126
0
                                                                                                        } = v2025 {
14127
0
                                                                                                            if let &Opcode::SwidenHigh = v2026 {
14128
0
                                                                                                                if v2012 == v2027 {
14129
0
                                                                                                                    let v2028 = constructor_put_in_xmm(ctx, v2007);
14130
0
                                                                                                                    let v2029 = &C::put_in_xmm_mem(ctx, v2012);
14131
0
                                                                                                                    let v2030 = constructor_x64_pmaddwd(ctx, v2028, v2029);
14132
0
                                                                                                                    let v2031 = constructor_output_xmm(ctx, v2030);
14133
0
                                                                                                                    // Rule at src/isa/x64/lower.isle line 3694.
14134
0
                                                                                                                    return Some(v2031);
14135
0
                                                                                                                }
14136
0
                                                                                                            }
14137
0
                                                                                                        }
14138
0
                                                                                                    }
14139
0
                                                                                                }
14140
0
                                                                                            }
14141
0
                                                                                        }
14142
0
                                                                                    }
14143
0
                                                                                }
14144
0
                                                                            }
14145
0
                                                                        }
14146
0
                                                                    }
14147
0
                                                                }
14148
0
                                                            }
14149
0
                                                        }
14150
0
                                                    }
14151
0
                                                }
14152
0
                                            }
14153
                                        }
14154
                                        &InstructionData::Unary {
14155
0
                                            opcode: ref v174,
14156
0
                                            arg: v175,
14157
0
                                        } => {
14158
0
                                            match v174 {
14159
                                                &Opcode::SwidenHigh => {
14160
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14161
0
                                                    if let Some(v181) = v180 {
14162
0
                                                        let v182 = &C::inst_data(ctx, v181);
14163
                                                        if let &InstructionData::Unary {
14164
0
                                                            opcode: ref v183,
14165
0
                                                            arg: v184,
14166
0
                                                        } = v182 {
14167
0
                                                            if let &Opcode::SwidenLow = v183 {
14168
0
                                                                if v175 == v184 {
14169
0
                                                                    let v481 = C::value_type(ctx, v184);
14170
0
                                                                    if v481 == I16X8 {
14171
0
                                                                        let v1978 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
14172
0
                                                                        let v1979 = &constructor_const_to_xmm_mem(ctx, v1978);
14173
0
                                                                        let v1980 = constructor_put_in_xmm(ctx, v184);
14174
0
                                                                        let v1981 = constructor_x64_pmaddwd(ctx, v1980, v1979);
14175
0
                                                                        let v1982 = constructor_output_xmm(ctx, v1981);
14176
0
                                                                        // Rule at src/isa/x64/lower.isle line 3663.
14177
0
                                                                        return Some(v1982);
14178
0
                                                                    }
14179
0
                                                                }
14180
0
                                                            }
14181
0
                                                        }
14182
0
                                                    }
14183
                                                }
14184
                                                &Opcode::UwidenHigh => {
14185
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14186
0
                                                    if let Some(v181) = v180 {
14187
0
                                                        let v182 = &C::inst_data(ctx, v181);
14188
                                                        if let &InstructionData::Unary {
14189
0
                                                            opcode: ref v183,
14190
0
                                                            arg: v184,
14191
0
                                                        } = v182 {
14192
0
                                                            if let &Opcode::UwidenLow = v183 {
14193
0
                                                                if v175 == v184 {
14194
0
                                                                    let v481 = C::value_type(ctx, v184);
14195
0
                                                                    if v481 == I16X8 {
14196
0
                                                                        let v1987 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
14197
0
                                                                        let v1988 = &constructor_const_to_xmm_mem(ctx, v1987);
14198
0
                                                                        let v1980 = constructor_put_in_xmm(ctx, v184);
14199
0
                                                                        let v1989 = constructor_x64_pxor(ctx, v1980, v1988);
14200
0
                                                                        let v1990 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
14201
0
                                                                        let v1991 = &constructor_const_to_xmm_mem(ctx, v1990);
14202
0
                                                                        let v1992 = constructor_x64_pmaddwd(ctx, v1989, v1991);
14203
0
                                                                        let v1994 = C::emit_u128_le_const(ctx, 0x10000000100000001000000010000);
14204
0
                                                                        let v1995 = &constructor_const_to_xmm_mem(ctx, v1994);
14205
0
                                                                        let v1996 = constructor_x64_paddd(ctx, v1992, v1995);
14206
0
                                                                        let v1997 = constructor_output_xmm(ctx, v1996);
14207
0
                                                                        // Rule at src/isa/x64/lower.isle line 3680.
14208
0
                                                                        return Some(v1997);
14209
0
                                                                    }
14210
0
                                                                }
14211
0
                                                            }
14212
0
                                                        }
14213
0
                                                    }
14214
                                                }
14215
0
                                                _ => {}
14216
                                            }
14217
                                        }
14218
0
                                        _ => {}
14219
                                    }
14220
0
                                }
14221
0
                                let v525 = C::use_ssse3(ctx);
14222
0
                                if v525 == true {
14223
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
14224
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
14225
0
                                    let v1961 = constructor_x64_phaddd(ctx, v68, v69);
14226
0
                                    let v1962 = constructor_output_xmm(ctx, v1961);
14227
0
                                    // Rule at src/isa/x64/lower.isle line 3637.
14228
0
                                    return Some(v1962);
14229
0
                                }
14230
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
14231
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
14232
0
                                let v1963 = &C::xmm_to_xmm_mem(ctx, v444);
14233
0
                                let v1965 = constructor_x64_shufps(ctx, v68, v1963, 0x88);
14234
0
                                let v447 = &C::xmm_to_xmm_mem(ctx, v444);
14235
0
                                let v1967 = constructor_x64_shufps(ctx, v68, v447, 0xDD);
14236
0
                                let v1968 = &C::xmm_to_xmm_mem(ctx, v1967);
14237
0
                                let v1969 = constructor_x64_paddd(ctx, v1965, v1968);
14238
0
                                let v1970 = constructor_output_xmm(ctx, v1969);
14239
0
                                // Rule at src/isa/x64/lower.isle line 3641.
14240
0
                                return Some(v1970);
14241
                            }
14242
0
                            _ => {}
14243
                        }
14244
0
                    }
14245
                }
14246
                &Opcode::X86Pmaddubsw => {
14247
0
                    let v1 = C::first_result(ctx, arg0);
14248
0
                    if let Some(v2) = v1 {
14249
0
                        let v3 = C::value_type(ctx, v2);
14250
0
                        if v3 == I16X8 {
14251
0
                            let v525 = C::use_ssse3(ctx);
14252
0
                            if v525 == true {
14253
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14254
0
                                let v1249 = constructor_put_in_xmm(ctx, v38.1);
14255
0
                                let v177 = &C::put_in_xmm_mem(ctx, v38.0);
14256
0
                                let v1250 = constructor_x64_pmaddubsw(ctx, v1249, v177);
14257
0
                                let v1251 = constructor_output_xmm(ctx, v1250);
14258
0
                                // Rule at src/isa/x64/lower.isle line 2484.
14259
0
                                return Some(v1251);
14260
0
                            }
14261
0
                        }
14262
0
                    }
14263
                }
14264
                &Opcode::Iconcat => {
14265
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
14266
0
                    let v2080 = C::value_type(ctx, v38.0);
14267
0
                    if v2080 == I64 {
14268
0
                        let v2528 = C::put_in_reg(ctx, v38.0);
14269
0
                        let v2529 = C::put_in_reg(ctx, v38.1);
14270
0
                        let v2530 = C::value_regs(ctx, v2528, v2529);
14271
0
                        let v2531 = C::output(ctx, v2530);
14272
0
                        // Rule at src/isa/x64/lower.isle line 4607.
14273
0
                        return Some(v2531);
14274
0
                    }
14275
                }
14276
0
                _ => {}
14277
            }
14278
        }
14279
        &InstructionData::BinaryImm8 {
14280
0
            opcode: ref v2364,
14281
0
            arg: v2365,
14282
0
            imm: v2366,
14283
0
        } => {
14284
0
            if let &Opcode::Extractlane = v2364 {
14285
0
                if v2366 == 0x0 {
14286
0
                    let v1 = C::first_result(ctx, arg0);
14287
0
                    if let Some(v2) = v1 {
14288
0
                        let v3 = C::value_type(ctx, v2);
14289
0
                        let v162 = C::ty_scalar_float(ctx, v3);
14290
0
                        if let Some(v163) = v162 {
14291
0
                            let v2367 = constructor_output_value(ctx, v2365);
14292
0
                            // Rule at src/isa/x64/lower.isle line 4370.
14293
0
                            return Some(v2367);
14294
0
                        }
14295
0
                    }
14296
0
                }
14297
0
                let v2368 = C::value_type(ctx, v2365);
14298
0
                match v2368 {
14299
                    I8X16 => {
14300
0
                        let v441 = C::use_sse41(ctx);
14301
0
                        if v441 == true {
14302
0
                            let v2375 = constructor_put_in_xmm(ctx, v2365);
14303
0
                            let v2369 = C::u8_from_uimm8(ctx, v2366);
14304
0
                            let v2376 = constructor_x64_pextrb(ctx, v2375, v2369);
14305
0
                            let v2377 = constructor_output_gpr(ctx, v2376);
14306
0
                            // Rule at src/isa/x64/lower.isle line 4385.
14307
0
                            return Some(v2377);
14308
0
                        }
14309
0
                        let v2369 = C::u8_from_uimm8(ctx, v2366);
14310
0
                        let v2378 = C::u8_and(ctx, v2369, 0x1);
14311
0
                        match v2378 {
14312
                            0x0 => {
14313
0
                                let v2375 = constructor_put_in_xmm(ctx, v2365);
14314
0
                                let v2379 = C::u8_shr(ctx, v2369, 0x1);
14315
0
                                let v2380 = constructor_x64_pextrw(ctx, v2375, v2379);
14316
0
                                let v2384 = constructor_output_gpr(ctx, v2380);
14317
0
                                // Rule at src/isa/x64/lower.isle line 4396.
14318
0
                                return Some(v2384);
14319
                            }
14320
                            0x1 => {
14321
0
                                let v2375 = constructor_put_in_xmm(ctx, v2365);
14322
0
                                let v2379 = C::u8_shr(ctx, v2369, 0x1);
14323
0
                                let v2380 = constructor_x64_pextrw(ctx, v2375, v2379);
14324
0
                                let v1204 = Imm8Reg::Imm8 {
14325
0
                                    imm: 0x8,
14326
0
                                };
14327
0
                                let v2381 = &C::imm8_reg_to_imm8_gpr(ctx, &v1204);
14328
0
                                let v2382 = constructor_x64_shr(ctx, I16, v2380, v2381);
14329
0
                                let v2383 = constructor_output_gpr(ctx, v2382);
14330
0
                                // Rule at src/isa/x64/lower.isle line 4389.
14331
0
                                return Some(v2383);
14332
                            }
14333
0
                            _ => {}
14334
                        }
14335
                    }
14336
                    I16X8 => {
14337
0
                        let v2375 = constructor_put_in_xmm(ctx, v2365);
14338
0
                        let v2369 = C::u8_from_uimm8(ctx, v2366);
14339
0
                        let v2385 = constructor_x64_pextrw(ctx, v2375, v2369);
14340
0
                        let v2386 = constructor_output_gpr(ctx, v2385);
14341
0
                        // Rule at src/isa/x64/lower.isle line 4401.
14342
0
                        return Some(v2386);
14343
                    }
14344
                    I32X4 => {
14345
0
                        let v441 = C::use_sse41(ctx);
14346
0
                        if v441 == true {
14347
0
                            let v2375 = constructor_put_in_xmm(ctx, v2365);
14348
0
                            let v2369 = C::u8_from_uimm8(ctx, v2366);
14349
0
                            let v2387 = constructor_x64_pextrd(ctx, v2375, v2369);
14350
0
                            let v2388 = constructor_output_gpr(ctx, v2387);
14351
0
                            // Rule at src/isa/x64/lower.isle line 4405.
14352
0
                            return Some(v2388);
14353
0
                        }
14354
0
                        if v2366 == 0x0 {
14355
0
                            let v2375 = constructor_put_in_xmm(ctx, v2365);
14356
0
                            let v2389 = constructor_x64_movd_to_gpr(ctx, v2375);
14357
0
                            let v2390 = constructor_output_gpr(ctx, v2389);
14358
0
                            // Rule at src/isa/x64/lower.isle line 4408.
14359
0
                            return Some(v2390);
14360
0
                        }
14361
0
                        let v2370 = &C::put_in_xmm_mem(ctx, v2365);
14362
0
                        let v2369 = C::u8_from_uimm8(ctx, v2366);
14363
0
                        let v2371 = constructor_x64_pshufd(ctx, v2370, v2369);
14364
0
                        let v2391 = constructor_x64_movd_to_gpr(ctx, v2371);
14365
0
                        let v2392 = constructor_output_gpr(ctx, v2391);
14366
0
                        // Rule at src/isa/x64/lower.isle line 4410.
14367
0
                        return Some(v2392);
14368
                    }
14369
                    I64X2 => {
14370
0
                        let v441 = C::use_sse41(ctx);
14371
0
                        if v441 == true {
14372
0
                            let v2375 = constructor_put_in_xmm(ctx, v2365);
14373
0
                            let v2369 = C::u8_from_uimm8(ctx, v2366);
14374
0
                            let v2393 = constructor_x64_pextrq(ctx, v2375, v2369);
14375
0
                            let v2394 = constructor_output_gpr(ctx, v2393);
14376
0
                            // Rule at src/isa/x64/lower.isle line 4414.
14377
0
                            return Some(v2394);
14378
0
                        }
14379
0
                        match v2366 {
14380
                            0x0 => {
14381
0
                                let v2375 = constructor_put_in_xmm(ctx, v2365);
14382
0
                                let v2395 = constructor_x64_movq_to_gpr(ctx, v2375);
14383
0
                                let v2396 = constructor_output_gpr(ctx, v2395);
14384
0
                                // Rule at src/isa/x64/lower.isle line 4417.
14385
0
                                return Some(v2396);
14386
                            }
14387
                            0x1 => {
14388
0
                                let v2370 = &C::put_in_xmm_mem(ctx, v2365);
14389
0
                                let v2397 = constructor_x64_pshufd(ctx, v2370, 0xE);
14390
0
                                let v2398 = constructor_x64_movq_to_gpr(ctx, v2397);
14391
0
                                let v2399 = constructor_output_gpr(ctx, v2398);
14392
0
                                // Rule at src/isa/x64/lower.isle line 4419.
14393
0
                                return Some(v2399);
14394
                            }
14395
0
                            _ => {}
14396
                        }
14397
                    }
14398
                    F32X4 => {
14399
0
                        let v2370 = &C::put_in_xmm_mem(ctx, v2365);
14400
0
                        let v2369 = C::u8_from_uimm8(ctx, v2366);
14401
0
                        let v2371 = constructor_x64_pshufd(ctx, v2370, v2369);
14402
0
                        let v2372 = constructor_output_xmm(ctx, v2371);
14403
0
                        // Rule at src/isa/x64/lower.isle line 4374.
14404
0
                        return Some(v2372);
14405
                    }
14406
                    F64X2 => {
14407
0
                        if v2366 == 0x1 {
14408
0
                            let v2370 = &C::put_in_xmm_mem(ctx, v2365);
14409
0
                            let v2373 = constructor_x64_pshufd(ctx, v2370, 0xEE);
14410
0
                            let v2374 = constructor_output_xmm(ctx, v2373);
14411
0
                            // Rule at src/isa/x64/lower.isle line 4378.
14412
0
                            return Some(v2374);
14413
0
                        }
14414
                    }
14415
0
                    _ => {}
14416
                }
14417
0
            }
14418
        }
14419
        &InstructionData::Call {
14420
266k
            opcode: ref v1755,
14421
266k
            args: v1756,
14422
266k
            func_ref: v1757,
14423
266k
        } => {
14424
266k
            match v1755 {
14425
                &Opcode::Call => {
14426
266k
                    let v1759 = C::func_ref_data(ctx, v1757);
14427
266k
                    let v1758 = C::value_list_slice(ctx, v1756);
14428
266k
                    let v1763 = C::gen_call(ctx, v1759.0, v1759.1, v1759.2, v1758);
14429
266k
                    // Rule at src/isa/x64/lower.isle line 3237.
14430
266k
                    return Some(v1763);
14431
                }
14432
                &Opcode::ReturnCall => {
14433
0
                    let v1759 = C::func_ref_data(ctx, v1757);
14434
0
                    let v1758 = C::value_list_slice(ctx, v1756);
14435
0
                    let v1773 = C::gen_return_call(ctx, v1759.0, v1759.1, v1759.2, v1758);
14436
0
                    // Rule at src/isa/x64/lower.isle line 3245.
14437
0
                    return Some(v1773);
14438
                }
14439
0
                _ => {}
14440
            }
14441
        }
14442
        &InstructionData::CallIndirect {
14443
75.6k
            opcode: ref v1764,
14444
75.6k
            args: v1765,
14445
75.6k
            sig_ref: v1766,
14446
75.6k
        } => {
14447
75.6k
            match v1764 {
14448
                &Opcode::CallIndirect => {
14449
75.6k
                    let v1767 = C::value_list_slice(ctx, v1765);
14450
75.6k
                    let v1768 = C::value_slice_unwrap(ctx, v1767);
14451
75.6k
                    if let Some(v1769) = v1768 {
14452
75.6k
                        let v1772 = C::gen_call_indirect(ctx, v1766, v1769.0, v1769.1);
14453
75.6k
                        // Rule at src/isa/x64/lower.isle line 3240.
14454
75.6k
                        return Some(v1772);
14455
0
                    }
14456
                }
14457
                &Opcode::ReturnCallIndirect => {
14458
0
                    let v1767 = C::value_list_slice(ctx, v1765);
14459
0
                    let v1768 = C::value_slice_unwrap(ctx, v1767);
14460
0
                    if let Some(v1769) = v1768 {
14461
0
                        let v1774 = C::gen_return_call_indirect(ctx, v1766, v1769.0, v1769.1);
14462
0
                        // Rule at src/isa/x64/lower.isle line 3248.
14463
0
                        return Some(v1774);
14464
0
                    }
14465
                }
14466
0
                _ => {}
14467
            }
14468
        }
14469
        &InstructionData::FloatCompare {
14470
0
            opcode: ref v957,
14471
0
            args: ref v958,
14472
0
            cond: ref v959,
14473
0
        } => {
14474
0
            if let &Opcode::Fcmp = v957 {
14475
0
                match v959 {
14476
                    &FloatCC::Equal => {
14477
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14478
0
                        let v963 = C::value_type(ctx, v960.0);
14479
0
                        let v969 = C::ty_vec128(ctx, v963);
14480
0
                        if let Some(v970) = v969 {
14481
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14482
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14483
0
                            let v974 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::Equal);
14484
0
                            let v975 = constructor_output_xmm(ctx, v974);
14485
0
                            // Rule at src/isa/x64/lower.isle line 2003.
14486
0
                            return Some(v975);
14487
0
                        }
14488
                    }
14489
                    &FloatCC::GreaterThan => {
14490
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14491
0
                        let v963 = C::value_type(ctx, v960.0);
14492
0
                        let v969 = C::ty_vec128(ctx, v963);
14493
0
                        if let Some(v970) = v969 {
14494
0
                            let v997 = constructor_put_in_xmm(ctx, v960.1);
14495
0
                            let v998 = &C::put_in_xmm_mem(ctx, v960.0);
14496
0
                            let v999 = constructor_x64_cmpp(ctx, v970, v997, v998, &FcmpImm::LessThan);
14497
0
                            let v1000 = constructor_output_xmm(ctx, v999);
14498
0
                            // Rule at src/isa/x64/lower.isle line 2023.
14499
0
                            return Some(v1000);
14500
0
                        }
14501
                    }
14502
                    &FloatCC::GreaterThanOrEqual => {
14503
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14504
0
                        let v963 = C::value_type(ctx, v960.0);
14505
0
                        let v969 = C::ty_vec128(ctx, v963);
14506
0
                        if let Some(v970) = v969 {
14507
0
                            let v997 = constructor_put_in_xmm(ctx, v960.1);
14508
0
                            let v998 = &C::put_in_xmm_mem(ctx, v960.0);
14509
0
                            let v1001 = constructor_x64_cmpp(ctx, v970, v997, v998, &FcmpImm::LessThanOrEqual);
14510
0
                            let v1002 = constructor_output_xmm(ctx, v1001);
14511
0
                            // Rule at src/isa/x64/lower.isle line 2025.
14512
0
                            return Some(v1002);
14513
0
                        }
14514
                    }
14515
                    &FloatCC::LessThan => {
14516
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14517
0
                        let v963 = C::value_type(ctx, v960.0);
14518
0
                        let v969 = C::ty_vec128(ctx, v963);
14519
0
                        if let Some(v970) = v969 {
14520
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14521
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14522
0
                            let v980 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::LessThan);
14523
0
                            let v981 = constructor_output_xmm(ctx, v980);
14524
0
                            // Rule at src/isa/x64/lower.isle line 2007.
14525
0
                            return Some(v981);
14526
0
                        }
14527
                    }
14528
                    &FloatCC::LessThanOrEqual => {
14529
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14530
0
                        let v963 = C::value_type(ctx, v960.0);
14531
0
                        let v969 = C::ty_vec128(ctx, v963);
14532
0
                        if let Some(v970) = v969 {
14533
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14534
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14535
0
                            let v983 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::LessThanOrEqual);
14536
0
                            let v984 = constructor_output_xmm(ctx, v983);
14537
0
                            // Rule at src/isa/x64/lower.isle line 2009.
14538
0
                            return Some(v984);
14539
0
                        }
14540
                    }
14541
                    &FloatCC::NotEqual => {
14542
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14543
0
                        let v963 = C::value_type(ctx, v960.0);
14544
0
                        let v969 = C::ty_vec128(ctx, v963);
14545
0
                        if let Some(v970) = v969 {
14546
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14547
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14548
0
                            let v977 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::NotEqual);
14549
0
                            let v978 = constructor_output_xmm(ctx, v977);
14550
0
                            // Rule at src/isa/x64/lower.isle line 2005.
14551
0
                            return Some(v978);
14552
0
                        }
14553
                    }
14554
                    &FloatCC::Ordered => {
14555
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14556
0
                        let v963 = C::value_type(ctx, v960.0);
14557
0
                        let v969 = C::ty_vec128(ctx, v963);
14558
0
                        if let Some(v970) = v969 {
14559
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14560
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14561
0
                            let v986 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::Ordered);
14562
0
                            let v987 = constructor_output_xmm(ctx, v986);
14563
0
                            // Rule at src/isa/x64/lower.isle line 2011.
14564
0
                            return Some(v987);
14565
0
                        }
14566
                    }
14567
                    &FloatCC::Unordered => {
14568
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14569
0
                        let v963 = C::value_type(ctx, v960.0);
14570
0
                        let v969 = C::ty_vec128(ctx, v963);
14571
0
                        if let Some(v970) = v969 {
14572
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14573
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14574
0
                            let v989 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::Unordered);
14575
0
                            let v990 = constructor_output_xmm(ctx, v989);
14576
0
                            // Rule at src/isa/x64/lower.isle line 2013.
14577
0
                            return Some(v990);
14578
0
                        }
14579
                    }
14580
                    &FloatCC::UnorderedOrGreaterThan => {
14581
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14582
0
                        let v963 = C::value_type(ctx, v960.0);
14583
0
                        let v969 = C::ty_vec128(ctx, v963);
14584
0
                        if let Some(v970) = v969 {
14585
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14586
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14587
0
                            let v992 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::UnorderedOrGreaterThan);
14588
0
                            let v993 = constructor_output_xmm(ctx, v992);
14589
0
                            // Rule at src/isa/x64/lower.isle line 2015.
14590
0
                            return Some(v993);
14591
0
                        }
14592
                    }
14593
                    &FloatCC::UnorderedOrGreaterThanOrEqual => {
14594
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14595
0
                        let v963 = C::value_type(ctx, v960.0);
14596
0
                        let v969 = C::ty_vec128(ctx, v963);
14597
0
                        if let Some(v970) = v969 {
14598
0
                            let v971 = constructor_put_in_xmm(ctx, v960.0);
14599
0
                            let v972 = &C::put_in_xmm_mem(ctx, v960.1);
14600
0
                            let v995 = constructor_x64_cmpp(ctx, v970, v971, v972, &FcmpImm::UnorderedOrGreaterThanOrEqual);
14601
0
                            let v996 = constructor_output_xmm(ctx, v995);
14602
0
                            // Rule at src/isa/x64/lower.isle line 2017.
14603
0
                            return Some(v996);
14604
0
                        }
14605
                    }
14606
                    &FloatCC::UnorderedOrLessThan => {
14607
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14608
0
                        let v963 = C::value_type(ctx, v960.0);
14609
0
                        let v969 = C::ty_vec128(ctx, v963);
14610
0
                        if let Some(v970) = v969 {
14611
0
                            let v997 = constructor_put_in_xmm(ctx, v960.1);
14612
0
                            let v998 = &C::put_in_xmm_mem(ctx, v960.0);
14613
0
                            let v1003 = constructor_x64_cmpp(ctx, v970, v997, v998, &FcmpImm::UnorderedOrGreaterThan);
14614
0
                            let v1004 = constructor_output_xmm(ctx, v1003);
14615
0
                            // Rule at src/isa/x64/lower.isle line 2027.
14616
0
                            return Some(v1004);
14617
0
                        }
14618
                    }
14619
                    &FloatCC::UnorderedOrLessThanOrEqual => {
14620
0
                        let v960 = C::unpack_value_array_2(ctx, v958);
14621
0
                        let v963 = C::value_type(ctx, v960.0);
14622
0
                        let v969 = C::ty_vec128(ctx, v963);
14623
0
                        if let Some(v970) = v969 {
14624
0
                            let v997 = constructor_put_in_xmm(ctx, v960.1);
14625
0
                            let v998 = &C::put_in_xmm_mem(ctx, v960.0);
14626
0
                            let v1005 = constructor_x64_cmpp(ctx, v970, v997, v998, &FcmpImm::UnorderedOrGreaterThanOrEqual);
14627
0
                            let v1006 = constructor_output_xmm(ctx, v1005);
14628
0
                            // Rule at src/isa/x64/lower.isle line 2029.
14629
0
                            return Some(v1006);
14630
0
                        }
14631
                    }
14632
0
                    _ => {}
14633
                }
14634
0
                let v960 = C::unpack_value_array_2(ctx, v958);
14635
0
                let v963 = C::value_type(ctx, v960.0);
14636
0
                let v964 = C::ty_scalar_float(ctx, v963);
14637
0
                if let Some(v965) = v964 {
14638
0
                    let v966 = &constructor_emit_fcmp(ctx, v959, v960.0, v960.1);
14639
0
                    let v967 = constructor_lower_fcmp_bool(ctx, v966);
14640
0
                    let v968 = C::output(ctx, v967);
14641
0
                    // Rule at src/isa/x64/lower.isle line 1996.
14642
0
                    return Some(v968);
14643
0
                }
14644
0
            }
14645
        }
14646
        &InstructionData::FuncAddr {
14647
0
            opcode: ref v1679,
14648
0
            func_ref: v1680,
14649
0
        } => {
14650
0
            if let &Opcode::FuncAddr = v1679 {
14651
0
                let v1681 = C::func_ref_data(ctx, v1680);
14652
0
                let v1686 = constructor_load_ext_name(ctx, v1681.1, 0x0, v1681.2);
14653
0
                let v1687 = constructor_output_reg(ctx, v1686);
14654
0
                // Rule at src/isa/x64/lower.isle line 3179.
14655
0
                return Some(v1687);
14656
0
            }
14657
        }
14658
        &InstructionData::IntAddTrap {
14659
0
            opcode: ref v791,
14660
0
            args: ref v792,
14661
0
            code: ref v793,
14662
0
        } => {
14663
0
            if let &Opcode::UaddOverflowTrap = v791 {
14664
0
                let v1 = C::first_result(ctx, arg0);
14665
0
                if let Some(v2) = v1 {
14666
0
                    let v3 = C::value_type(ctx, v2);
14667
0
                    let v4 = C::fits_in_64(ctx, v3);
14668
0
                    if let Some(v5) = v4 {
14669
0
                        let v794 = C::unpack_value_array_2(ctx, v792);
14670
0
                        let v810 = &C::sinkable_load(ctx, v794.0);
14671
0
                        if let Some(v811) = v810 {
14672
0
                            let v805 = constructor_put_in_gpr(ctx, v794.1);
14673
0
                            let v812 = &constructor_sink_load_to_gpr_mem_imm(ctx, v811);
14674
0
                            let v813 = &constructor_x64_add_with_flags_paired(ctx, v5, v805, v812);
14675
0
                            let v800 = &constructor_trap_if(ctx, &CC::B, v793);
14676
0
                            let v814 = constructor_with_flags(ctx, v813, v800);
14677
0
                            let v815 = C::output(ctx, v814);
14678
0
                            // Rule at src/isa/x64/lower.isle line 1784.
14679
0
                            return Some(v815);
14680
0
                        }
14681
0
                        let v803 = &C::simm32_from_value(ctx, v794.0);
14682
0
                        if let Some(v804) = v803 {
14683
0
                            let v805 = constructor_put_in_gpr(ctx, v794.1);
14684
0
                            let v806 = &constructor_x64_add_with_flags_paired(ctx, v5, v805, v804);
14685
0
                            let v807 = &constructor_trap_if(ctx, &CC::B, v793);
14686
0
                            let v808 = constructor_with_flags(ctx, v806, v807);
14687
0
                            let v809 = C::output(ctx, v808);
14688
0
                            // Rule at src/isa/x64/lower.isle line 1778.
14689
0
                            return Some(v809);
14690
0
                        }
14691
0
                        let v797 = constructor_put_in_gpr(ctx, v794.0);
14692
0
                        let v798 = &constructor_put_in_gpr_mem_imm(ctx, v794.1);
14693
0
                        let v799 = &constructor_x64_add_with_flags_paired(ctx, v5, v797, v798);
14694
0
                        let v800 = &constructor_trap_if(ctx, &CC::B, v793);
14695
0
                        let v801 = constructor_with_flags(ctx, v799, v800);
14696
0
                        let v802 = C::output(ctx, v801);
14697
0
                        // Rule at src/isa/x64/lower.isle line 1770.
14698
0
                        return Some(v802);
14699
0
                    }
14700
0
                }
14701
0
            }
14702
        }
14703
        &InstructionData::IntCompare {
14704
17.6k
            opcode: ref v820,
14705
17.6k
            args: ref v821,
14706
17.6k
            cond: ref v822,
14707
17.6k
        } => {
14708
17.6k
            if let &Opcode::Icmp = v820 {
14709
17.6k
                match v822 {
14710
                    &IntCC::Equal => {
14711
3.21k
                        let v823 = C::unpack_value_array_2(ctx, v821);
14712
3.21k
                        let v826 = C::value_type(ctx, v823.0);
14713
3.21k
                        let v874 = C::ty_vec128(ctx, v826);
14714
3.21k
                        if let Some(
v8750
) = v874 {
14715
0
                            let v876 = constructor_put_in_xmm(ctx, v823.0);
14716
0
                            let v877 = &C::put_in_xmm_mem(ctx, v823.1);
14717
0
                            let v878 = constructor_x64_pcmpeq(ctx, v875, v876, v877);
14718
0
                            let v879 = constructor_output_xmm(ctx, v878);
14719
0
                            // Rule at src/isa/x64/lower.isle line 1846.
14720
0
                            return Some(v879);
14721
3.21k
                        }
14722
                    }
14723
                    &IntCC::NotEqual => {
14724
3.38k
                        let v823 = C::unpack_value_array_2(ctx, v821);
14725
3.38k
                        let v826 = C::value_type(ctx, v823.0);
14726
3.38k
                        let v874 = C::ty_vec128(ctx, v826);
14727
3.38k
                        if let Some(
v8750
) = v874 {
14728
0
                            let v876 = constructor_put_in_xmm(ctx, v823.0);
14729
0
                            let v877 = &C::put_in_xmm_mem(ctx, v823.1);
14730
0
                            let v878 = constructor_x64_pcmpeq(ctx, v875, v876, v877);
14731
0
                            let v880 = constructor_vector_all_ones(ctx);
14732
0
                            let v881 = &C::xmm_to_xmm_mem(ctx, v880);
14733
0
                            let v882 = constructor_x64_pxor(ctx, v878, v881);
14734
0
                            let v883 = constructor_output_xmm(ctx, v882);
14735
0
                            // Rule at src/isa/x64/lower.isle line 1851.
14736
0
                            return Some(v883);
14737
3.38k
                        }
14738
                    }
14739
                    &IntCC::SignedGreaterThan => {
14740
202
                        let v1 = C::first_result(ctx, arg0);
14741
202
                        if let Some(v2) = v1 {
14742
202
                            let v3 = C::value_type(ctx, v2);
14743
202
                            if v3 == I8 {
14744
202
                                let v823 = C::unpack_value_array_2(ctx, v821);
14745
202
                                let v844 = C::def_inst(ctx, v823.0);
14746
202
                                if let Some(v845) = v844 {
14747
202
                                    let v846 = &C::inst_data(ctx, v845);
14748
                                    if let &InstructionData::UnaryImm {
14749
0
                                        opcode: ref v847,
14750
0
                                        imm: v848,
14751
202
                                    } = v846 {
14752
0
                                        if let &Opcode::Iconst = v847 {
14753
0
                                            let v849 = C::u64_from_imm64(ctx, v848);
14754
0
                                            if v849 == 0x0 {
14755
0
                                                let v850 = C::value_type(ctx, v823.1);
14756
0
                                                match v850 {
14757
                                                    I32 => {
14758
0
                                                        let v851 = constructor_put_in_gpr(ctx, v823.1);
14759
0
                                                        let v863 = Imm8Reg::Imm8 {
14760
0
                                                            imm: 0x1F,
14761
0
                                                        };
14762
0
                                                        let v864 = &C::imm8_reg_to_imm8_gpr(ctx, &v863);
14763
0
                                                        let v867 = constructor_x64_shr(ctx, I32, v851, v864);
14764
0
                                                        let v868 = constructor_output_gpr(ctx, v867);
14765
0
                                                        // Rule at src/isa/x64/lower.isle line 1830.
14766
0
                                                        return Some(v868);
14767
                                                    }
14768
                                                    I64 => {
14769
0
                                                        let v851 = constructor_put_in_gpr(ctx, v823.1);
14770
0
                                                        let v840 = Imm8Reg::Imm8 {
14771
0
                                                            imm: 0x3F,
14772
0
                                                        };
14773
0
                                                        let v841 = &C::imm8_reg_to_imm8_gpr(ctx, &v840);
14774
0
                                                        let v852 = constructor_x64_shr(ctx, I64, v851, v841);
14775
0
                                                        let v853 = constructor_output_gpr(ctx, v852);
14776
0
                                                        // Rule at src/isa/x64/lower.isle line 1814.
14777
0
                                                        return Some(v853);
14778
                                                    }
14779
0
                                                    _ => {}
14780
                                                }
14781
0
                                            }
14782
0
                                        }
14783
202
                                    }
14784
0
                                }
14785
0
                            }
14786
0
                        }
14787
202
                        let v823 = C::unpack_value_array_2(ctx, v821);
14788
202
                        let v826 = C::value_type(ctx, v823.0);
14789
202
                        let v874 = C::ty_vec128(ctx, v826);
14790
202
                        if let Some(
v8750
) = v874 {
14791
0
                            let v876 = constructor_put_in_xmm(ctx, v823.0);
14792
0
                            let v877 = &C::put_in_xmm_mem(ctx, v823.1);
14793
0
                            let v884 = constructor_x64_pcmpgt(ctx, v875, v876, v877);
14794
0
                            let v885 = constructor_output_xmm(ctx, v884);
14795
0
                            // Rule at src/isa/x64/lower.isle line 1858.
14796
0
                            return Some(v885);
14797
202
                        }
14798
                    }
14799
                    &IntCC::SignedGreaterThanOrEqual => {
14800
0
                        let v1 = C::first_result(ctx, arg0);
14801
0
                        if let Some(v2) = v1 {
14802
0
                            let v3 = C::value_type(ctx, v2);
14803
0
                            if v3 == I8 {
14804
0
                                let v823 = C::unpack_value_array_2(ctx, v821);
14805
0
                                let v826 = C::value_type(ctx, v823.0);
14806
0
                                match v826 {
14807
                                    I32 => {
14808
0
                                        let v832 = C::def_inst(ctx, v823.1);
14809
0
                                        if let Some(v833) = v832 {
14810
0
                                            let v834 = &C::inst_data(ctx, v833);
14811
                                            if let &InstructionData::UnaryImm {
14812
0
                                                opcode: ref v835,
14813
0
                                                imm: v836,
14814
0
                                            } = v834 {
14815
0
                                                if let &Opcode::Iconst = v835 {
14816
0
                                                    let v837 = C::u64_from_imm64(ctx, v836);
14817
0
                                                    if v837 == 0x0 {
14818
0
                                                        let v838 = constructor_put_in_gpr(ctx, v823.0);
14819
0
                                                        let v858 = constructor_x64_not(ctx, I64, v838);
14820
0
                                                        let v863 = Imm8Reg::Imm8 {
14821
0
                                                            imm: 0x1F,
14822
0
                                                        };
14823
0
                                                        let v869 = &C::imm8_reg_to_imm8_gpr(ctx, &v863);
14824
0
                                                        let v872 = constructor_x64_shr(ctx, I32, v858, v869);
14825
0
                                                        let v873 = constructor_output_gpr(ctx, v872);
14826
0
                                                        // Rule at src/isa/x64/lower.isle line 1838.
14827
0
                                                        return Some(v873);
14828
0
                                                    }
14829
0
                                                }
14830
0
                                            }
14831
0
                                        }
14832
                                    }
14833
                                    I64 => {
14834
0
                                        let v832 = C::def_inst(ctx, v823.1);
14835
0
                                        if let Some(v833) = v832 {
14836
0
                                            let v834 = &C::inst_data(ctx, v833);
14837
                                            if let &InstructionData::UnaryImm {
14838
0
                                                opcode: ref v835,
14839
0
                                                imm: v836,
14840
0
                                            } = v834 {
14841
0
                                                if let &Opcode::Iconst = v835 {
14842
0
                                                    let v837 = C::u64_from_imm64(ctx, v836);
14843
0
                                                    if v837 == 0x0 {
14844
0
                                                        let v838 = constructor_put_in_gpr(ctx, v823.0);
14845
0
                                                        let v858 = constructor_x64_not(ctx, I64, v838);
14846
0
                                                        let v840 = Imm8Reg::Imm8 {
14847
0
                                                            imm: 0x3F,
14848
0
                                                        };
14849
0
                                                        let v855 = &C::imm8_reg_to_imm8_gpr(ctx, &v840);
14850
0
                                                        let v859 = constructor_x64_shr(ctx, I64, v858, v855);
14851
0
                                                        let v860 = constructor_output_gpr(ctx, v859);
14852
0
                                                        // Rule at src/isa/x64/lower.isle line 1822.
14853
0
                                                        return Some(v860);
14854
0
                                                    }
14855
0
                                                }
14856
0
                                            }
14857
0
                                        }
14858
                                    }
14859
0
                                    _ => {}
14860
                                }
14861
0
                            }
14862
0
                        }
14863
0
                        let v823 = C::unpack_value_array_2(ctx, v821);
14864
0
                        let v826 = C::value_type(ctx, v823.0);
14865
0
                        let v874 = C::ty_vec128(ctx, v826);
14866
0
                        if let Some(v875) = v874 {
14867
0
                            let v918 = constructor_has_pmaxs(ctx, v875);
14868
0
                            if v918 == true {
14869
0
                                let v876 = constructor_put_in_xmm(ctx, v823.0);
14870
0
                                let v901 = constructor_put_in_xmm(ctx, v823.0);
14871
0
                                let v919 = &C::put_in_xmm_mem(ctx, v823.1);
14872
0
                                let v920 = constructor_x64_pmaxs(ctx, v875, v901, v919);
14873
0
                                let v921 = &C::xmm_to_xmm_mem(ctx, v920);
14874
0
                                let v922 = constructor_x64_pcmpeq(ctx, v875, v876, v921);
14875
0
                                let v923 = constructor_output_xmm(ctx, v922);
14876
0
                                // Rule at src/isa/x64/lower.isle line 1908.
14877
0
                                return Some(v923);
14878
0
                            }
14879
0
                            let v886 = constructor_put_in_xmm(ctx, v823.1);
14880
0
                            let v887 = &C::put_in_xmm_mem(ctx, v823.0);
14881
0
                            let v888 = constructor_x64_pcmpgt(ctx, v875, v886, v887);
14882
0
                            let v880 = constructor_vector_all_ones(ctx);
14883
0
                            let v881 = &C::xmm_to_xmm_mem(ctx, v880);
14884
0
                            let v924 = constructor_x64_pxor(ctx, v888, v881);
14885
0
                            let v925 = constructor_output_xmm(ctx, v924);
14886
0
                            // Rule at src/isa/x64/lower.isle line 1914.
14887
0
                            return Some(v925);
14888
0
                        }
14889
                    }
14890
                    &IntCC::SignedLessThan => {
14891
15
                        let v1 = C::first_result(ctx, arg0);
14892
15
                        if let Some(v2) = v1 {
14893
15
                            let v3 = C::value_type(ctx, v2);
14894
15
                            if v3 == I8 {
14895
15
                                let v823 = C::unpack_value_array_2(ctx, v821);
14896
15
                                let v826 = C::value_type(ctx, v823.0);
14897
15
                                match v826 {
14898
                                    I32 => {
14899
15
                                        let v832 = C::def_inst(ctx, v823.1);
14900
15
                                        if let Some(
v83314
) = v832 {
14901
14
                                            let v834 = &C::inst_data(ctx, v833);
14902
                                            if let &InstructionData::UnaryImm {
14903
8
                                                opcode: ref v835,
14904
8
                                                imm: v836,
14905
14
                                            } = v834 {
14906
8
                                                if let &Opcode::Iconst = v835 {
14907
8
                                                    let v837 = C::u64_from_imm64(ctx, v836);
14908
8
                                                    if v837 == 0x0 {
14909
8
                                                        let v838 = constructor_put_in_gpr(ctx, v823.0);
14910
8
                                                        let v863 = Imm8Reg::Imm8 {
14911
8
                                                            imm: 0x1F,
14912
8
                                                        };
14913
8
                                                        let v864 = &C::imm8_reg_to_imm8_gpr(ctx, &v863);
14914
8
                                                        let v865 = constructor_x64_shr(ctx, I32, v838, v864);
14915
8
                                                        let v866 = constructor_output_gpr(ctx, v865);
14916
8
                                                        // Rule at src/isa/x64/lower.isle line 1826.
14917
8
                                                        return Some(v866);
14918
0
                                                    }
14919
0
                                                }
14920
6
                                            }
14921
1
                                        }
14922
                                    }
14923
                                    I64 => {
14924
0
                                        let v832 = C::def_inst(ctx, v823.1);
14925
0
                                        if let Some(v833) = v832 {
14926
0
                                            let v834 = &C::inst_data(ctx, v833);
14927
                                            if let &InstructionData::UnaryImm {
14928
0
                                                opcode: ref v835,
14929
0
                                                imm: v836,
14930
0
                                            } = v834 {
14931
0
                                                if let &Opcode::Iconst = v835 {
14932
0
                                                    let v837 = C::u64_from_imm64(ctx, v836);
14933
0
                                                    if v837 == 0x0 {
14934
0
                                                        let v838 = constructor_put_in_gpr(ctx, v823.0);
14935
0
                                                        let v840 = Imm8Reg::Imm8 {
14936
0
                                                            imm: 0x3F,
14937
0
                                                        };
14938
0
                                                        let v841 = &C::imm8_reg_to_imm8_gpr(ctx, &v840);
14939
0
                                                        let v842 = constructor_x64_shr(ctx, I64, v838, v841);
14940
0
                                                        let v843 = constructor_output_gpr(ctx, v842);
14941
0
                                                        // Rule at src/isa/x64/lower.isle line 1810.
14942
0
                                                        return Some(v843);
14943
0
                                                    }
14944
0
                                                }
14945
0
                                            }
14946
0
                                        }
14947
                                    }
14948
0
                                    _ => {}
14949
                                }
14950
0
                            }
14951
0
                        }
14952
7
                        let v823 = C::unpack_value_array_2(ctx, v821);
14953
7
                        let v826 = C::value_type(ctx, v823.0);
14954
7
                        let v874 = C::ty_vec128(ctx, v826);
14955
7
                        if let Some(
v8750
) = v874 {
14956
0
                            let v886 = constructor_put_in_xmm(ctx, v823.1);
14957
0
                            let v887 = &C::put_in_xmm_mem(ctx, v823.0);
14958
0
                            let v888 = constructor_x64_pcmpgt(ctx, v875, v886, v887);
14959
0
                            let v889 = constructor_output_xmm(ctx, v888);
14960
0
                            // Rule at src/isa/x64/lower.isle line 1863.
14961
0
                            return Some(v889);
14962
7
                        }
14963
                    }
14964
                    &IntCC::SignedLessThanOrEqual => {
14965
0
                        let v1 = C::first_result(ctx, arg0);
14966
0
                        if let Some(v2) = v1 {
14967
0
                            let v3 = C::value_type(ctx, v2);
14968
0
                            if v3 == I8 {
14969
0
                                let v823 = C::unpack_value_array_2(ctx, v821);
14970
0
                                let v844 = C::def_inst(ctx, v823.0);
14971
0
                                if let Some(v845) = v844 {
14972
0
                                    let v846 = &C::inst_data(ctx, v845);
14973
                                    if let &InstructionData::UnaryImm {
14974
0
                                        opcode: ref v847,
14975
0
                                        imm: v848,
14976
0
                                    } = v846 {
14977
0
                                        if let &Opcode::Iconst = v847 {
14978
0
                                            let v849 = C::u64_from_imm64(ctx, v848);
14979
0
                                            if v849 == 0x0 {
14980
0
                                                let v850 = C::value_type(ctx, v823.1);
14981
0
                                                match v850 {
14982
                                                    I32 => {
14983
0
                                                        let v851 = constructor_put_in_gpr(ctx, v823.1);
14984
0
                                                        let v854 = constructor_x64_not(ctx, I64, v851);
14985
0
                                                        let v863 = Imm8Reg::Imm8 {
14986
0
                                                            imm: 0x1F,
14987
0
                                                        };
14988
0
                                                        let v869 = &C::imm8_reg_to_imm8_gpr(ctx, &v863);
14989
0
                                                        let v870 = constructor_x64_shr(ctx, I32, v854, v869);
14990
0
                                                        let v871 = constructor_output_gpr(ctx, v870);
14991
0
                                                        // Rule at src/isa/x64/lower.isle line 1834.
14992
0
                                                        return Some(v871);
14993
                                                    }
14994
                                                    I64 => {
14995
0
                                                        let v851 = constructor_put_in_gpr(ctx, v823.1);
14996
0
                                                        let v854 = constructor_x64_not(ctx, I64, v851);
14997
0
                                                        let v840 = Imm8Reg::Imm8 {
14998
0
                                                            imm: 0x3F,
14999
0
                                                        };
15000
0
                                                        let v855 = &C::imm8_reg_to_imm8_gpr(ctx, &v840);
15001
0
                                                        let v856 = constructor_x64_shr(ctx, I64, v854, v855);
15002
0
                                                        let v857 = constructor_output_gpr(ctx, v856);
15003
0
                                                        // Rule at src/isa/x64/lower.isle line 1818.
15004
0
                                                        return Some(v857);
15005
                                                    }
15006
0
                                                    _ => {}
15007
                                                }
15008
0
                                            }
15009
0
                                        }
15010
0
                                    }
15011
0
                                }
15012
0
                            }
15013
0
                        }
15014
0
                        let v823 = C::unpack_value_array_2(ctx, v821);
15015
0
                        let v826 = C::value_type(ctx, v823.0);
15016
0
                        let v874 = C::ty_vec128(ctx, v826);
15017
0
                        if let Some(v875) = v874 {
15018
0
                            let v926 = constructor_has_pmins(ctx, v875);
15019
0
                            if v926 == true {
15020
0
                                let v876 = constructor_put_in_xmm(ctx, v823.0);
15021
0
                                let v901 = constructor_put_in_xmm(ctx, v823.0);
15022
0
                                let v919 = &C::put_in_xmm_mem(ctx, v823.1);
15023
0
                                let v927 = constructor_x64_pmins(ctx, v875, v901, v919);
15024
0
                                let v928 = &C::xmm_to_xmm_mem(ctx, v927);
15025
0
                                let v929 = constructor_x64_pcmpeq(ctx, v875, v876, v928);
15026
0
                                let v930 = constructor_output_xmm(ctx, v929);
15027
0
                                // Rule at src/isa/x64/lower.isle line 1920.
15028
0
                                return Some(v930);
15029
0
                            }
15030
0
                            let v876 = constructor_put_in_xmm(ctx, v823.0);
15031
0
                            let v877 = &C::put_in_xmm_mem(ctx, v823.1);
15032
0
                            let v884 = constructor_x64_pcmpgt(ctx, v875, v876, v877);
15033
0
                            let v880 = constructor_vector_all_ones(ctx);
15034
0
                            let v881 = &C::xmm_to_xmm_mem(ctx, v880);
15035
0
                            let v931 = constructor_x64_pxor(ctx, v884, v881);
15036
0
                            let v932 = constructor_output_xmm(ctx, v931);
15037
0
                            // Rule at src/isa/x64/lower.isle line 1925.
15038
0
                            return Some(v932);
15039
0
                        }
15040
                    }
15041
                    &IntCC::UnsignedGreaterThan => {
15042
3.28k
                        let v823 = C::unpack_value_array_2(ctx, v821);
15043
3.28k
                        let v826 = C::value_type(ctx, v823.0);
15044
3.28k
                        let v874 = C::ty_vec128(ctx, v826);
15045
3.28k
                        if let Some(
v8750
) = v874 {
15046
0
                            let v890 = constructor_has_pmaxu(ctx, v875);
15047
0
                            if v890 == true {
15048
0
                                let v876 = constructor_put_in_xmm(ctx, v823.0);
15049
0
                                let v891 = constructor_put_in_xmm(ctx, v823.1);
15050
0
                                let v892 = &C::xmm_to_xmm_mem(ctx, v891);
15051
0
                                let v893 = constructor_x64_pmaxu(ctx, v875, v876, v892);
15052
0
                                let v894 = &C::xmm_to_xmm_mem(ctx, v891);
15053
0
                                let v895 = constructor_x64_pcmpeq(ctx, v875, v893, v894);
15054
0
                                let v896 = constructor_vector_all_ones(ctx);
15055
0
                                let v897 = &C::xmm_to_xmm_mem(ctx, v896);
15056
0
                                let v898 = constructor_x64_pxor(ctx, v895, v897);
15057
0
                                let v899 = constructor_output_xmm(ctx, v898);
15058
0
                                // Rule at src/isa/x64/lower.isle line 1870.
15059
0
                                return Some(v899);
15060
0
                            }
15061
0
                            let v900 = constructor_flip_high_bit_mask(ctx, v875);
15062
0
                            let v901 = constructor_put_in_xmm(ctx, v823.0);
15063
0
                            let v902 = &C::xmm_to_xmm_mem(ctx, v900);
15064
0
                            let v903 = constructor_x64_pxor(ctx, v901, v902);
15065
0
                            let v904 = constructor_put_in_xmm(ctx, v823.1);
15066
0
                            let v905 = &C::xmm_to_xmm_mem(ctx, v900);
15067
0
                            let v906 = constructor_x64_pxor(ctx, v904, v905);
15068
0
                            let v907 = &C::xmm_to_xmm_mem(ctx, v906);
15069
0
                            let v908 = constructor_x64_pcmpgt(ctx, v875, v903, v907);
15070
0
                            let v909 = constructor_output_xmm(ctx, v908);
15071
0
                            // Rule at src/isa/x64/lower.isle line 1880.
15072
0
                            return Some(v909);
15073
3.28k
                        }
15074
                    }
15075
                    &IntCC::UnsignedGreaterThanOrEqual => {
15076
259
                        let v823 = C::unpack_value_array_2(ctx, v821);
15077
259
                        let v826 = C::value_type(ctx, v823.0);
15078
259
                        let v874 = C::ty_vec128(ctx, v826);
15079
259
                        if let Some(
v8750
) = v874 {
15080
0
                            let v890 = constructor_has_pmaxu(ctx, v875);
15081
0
                            if v890 == true {
15082
0
                                let v876 = constructor_put_in_xmm(ctx, v823.0);
15083
0
                                let v901 = constructor_put_in_xmm(ctx, v823.0);
15084
0
                                let v919 = &C::put_in_xmm_mem(ctx, v823.1);
15085
0
                                let v933 = constructor_x64_pmaxu(ctx, v875, v901, v919);
15086
0
                                let v934 = &C::xmm_to_xmm_mem(ctx, v933);
15087
0
                                let v935 = constructor_x64_pcmpeq(ctx, v875, v876, v934);
15088
0
                                let v936 = constructor_output_xmm(ctx, v935);
15089
0
                                // Rule at src/isa/x64/lower.isle line 1930.
15090
0
                                return Some(v936);
15091
0
                            }
15092
259
                        }
15093
259
                        if v826 == I16X8 {
15094
0
                            let v886 = constructor_put_in_xmm(ctx, v823.1);
15095
0
                            let v887 = &C::put_in_xmm_mem(ctx, v823.0);
15096
0
                            let v937 = constructor_x64_psubusw(ctx, v886, v887);
15097
0
                            let v938 = constructor_xmm_zero(ctx, I16X8);
15098
0
                            let v939 = &C::xmm_to_xmm_mem(ctx, v938);
15099
0
                            let v940 = constructor_x64_pcmpeqw(ctx, v937, v939);
15100
0
                            let v941 = constructor_output_xmm(ctx, v940);
15101
0
                            // Rule at src/isa/x64/lower.isle line 1936.
15102
0
                            return Some(v941);
15103
259
                        }
15104
259
                        if let Some(
v8750
) = v874 {
15105
0
                            let v900 = constructor_flip_high_bit_mask(ctx, v875);
15106
0
                            let v901 = constructor_put_in_xmm(ctx, v823.0);
15107
0
                            let v902 = &C::xmm_to_xmm_mem(ctx, v900);
15108
0
                            let v903 = constructor_x64_pxor(ctx, v901, v902);
15109
0
                            let v904 = constructor_put_in_xmm(ctx, v823.1);
15110
0
                            let v905 = &C::xmm_to_xmm_mem(ctx, v900);
15111
0
                            let v906 = constructor_x64_pxor(ctx, v904, v905);
15112
0
                            let v915 = &C::xmm_to_xmm_mem(ctx, v903);
15113
0
                            let v916 = constructor_x64_pcmpgt(ctx, v875, v906, v915);
15114
0
                            let v942 = constructor_vector_all_ones(ctx);
15115
0
                            let v943 = &C::xmm_to_xmm_mem(ctx, v942);
15116
0
                            let v944 = constructor_x64_pxor(ctx, v916, v943);
15117
0
                            let v945 = constructor_output_xmm(ctx, v944);
15118
0
                            // Rule at src/isa/x64/lower.isle line 1942.
15119
0
                            return Some(v945);
15120
259
                        }
15121
                    }
15122
                    &IntCC::UnsignedLessThan => {
15123
7.03k
                        let v823 = C::unpack_value_array_2(ctx, v821);
15124
7.03k
                        let v826 = C::value_type(ctx, v823.0);
15125
7.03k
                        let v874 = C::ty_vec128(ctx, v826);
15126
7.03k
                        if let Some(
v8750
) = v874 {
15127
0
                            let v910 = constructor_has_pminu(ctx, v875);
15128
0
                            if v910 == true {
15129
0
                                let v876 = constructor_put_in_xmm(ctx, v823.0);
15130
0
                                let v891 = constructor_put_in_xmm(ctx, v823.1);
15131
0
                                let v892 = &C::xmm_to_xmm_mem(ctx, v891);
15132
0
                                let v911 = constructor_x64_pminu(ctx, v875, v876, v892);
15133
0
                                let v894 = &C::xmm_to_xmm_mem(ctx, v891);
15134
0
                                let v912 = constructor_x64_pcmpeq(ctx, v875, v911, v894);
15135
0
                                let v896 = constructor_vector_all_ones(ctx);
15136
0
                                let v897 = &C::xmm_to_xmm_mem(ctx, v896);
15137
0
                                let v913 = constructor_x64_pxor(ctx, v912, v897);
15138
0
                                let v914 = constructor_output_xmm(ctx, v913);
15139
0
                                // Rule at src/isa/x64/lower.isle line 1888.
15140
0
                                return Some(v914);
15141
0
                            }
15142
0
                            let v900 = constructor_flip_high_bit_mask(ctx, v875);
15143
0
                            let v901 = constructor_put_in_xmm(ctx, v823.0);
15144
0
                            let v902 = &C::xmm_to_xmm_mem(ctx, v900);
15145
0
                            let v903 = constructor_x64_pxor(ctx, v901, v902);
15146
0
                            let v904 = constructor_put_in_xmm(ctx, v823.1);
15147
0
                            let v905 = &C::xmm_to_xmm_mem(ctx, v900);
15148
0
                            let v906 = constructor_x64_pxor(ctx, v904, v905);
15149
0
                            let v915 = &C::xmm_to_xmm_mem(ctx, v903);
15150
0
                            let v916 = constructor_x64_pcmpgt(ctx, v875, v906, v915);
15151
0
                            let v917 = constructor_output_xmm(ctx, v916);
15152
0
                            // Rule at src/isa/x64/lower.isle line 1899.
15153
0
                            return Some(v917);
15154
7.03k
                        }
15155
                    }
15156
                    &IntCC::UnsignedLessThanOrEqual => {
15157
278
                        let v823 = C::unpack_value_array_2(ctx, v821);
15158
278
                        let v826 = C::value_type(ctx, v823.0);
15159
278
                        let v874 = C::ty_vec128(ctx, v826);
15160
278
                        if let Some(
v8750
) = v874 {
15161
0
                            let v910 = constructor_has_pminu(ctx, v875);
15162
0
                            if v910 == true {
15163
0
                                let v876 = constructor_put_in_xmm(ctx, v823.0);
15164
0
                                let v901 = constructor_put_in_xmm(ctx, v823.0);
15165
0
                                let v919 = &C::put_in_xmm_mem(ctx, v823.1);
15166
0
                                let v946 = constructor_x64_pminu(ctx, v875, v901, v919);
15167
0
                                let v947 = &C::xmm_to_xmm_mem(ctx, v946);
15168
0
                                let v948 = constructor_x64_pcmpeq(ctx, v875, v876, v947);
15169
0
                                let v949 = constructor_output_xmm(ctx, v948);
15170
0
                                // Rule at src/isa/x64/lower.isle line 1953.
15171
0
                                return Some(v949);
15172
0
                            }
15173
278
                        }
15174
278
                        if v826 == I16X8 {
15175
0
                            let v876 = constructor_put_in_xmm(ctx, v823.0);
15176
0
                            let v877 = &C::put_in_xmm_mem(ctx, v823.1);
15177
0
                            let v950 = constructor_x64_psubusw(ctx, v876, v877);
15178
0
                            let v951 = constructor_xmm_zero(ctx, I8X16);
15179
0
                            let v952 = &C::xmm_to_xmm_mem(ctx, v951);
15180
0
                            let v953 = constructor_x64_pcmpeqw(ctx, v950, v952);
15181
0
                            let v954 = constructor_output_xmm(ctx, v953);
15182
0
                            // Rule at src/isa/x64/lower.isle line 1960.
15183
0
                            return Some(v954);
15184
278
                        }
15185
278
                        if let Some(
v8750
) = v874 {
15186
0
                            let v900 = constructor_flip_high_bit_mask(ctx, v875);
15187
0
                            let v901 = constructor_put_in_xmm(ctx, v823.0);
15188
0
                            let v902 = &C::xmm_to_xmm_mem(ctx, v900);
15189
0
                            let v903 = constructor_x64_pxor(ctx, v901, v902);
15190
0
                            let v904 = constructor_put_in_xmm(ctx, v823.1);
15191
0
                            let v905 = &C::xmm_to_xmm_mem(ctx, v900);
15192
0
                            let v906 = constructor_x64_pxor(ctx, v904, v905);
15193
0
                            let v907 = &C::xmm_to_xmm_mem(ctx, v906);
15194
0
                            let v908 = constructor_x64_pcmpgt(ctx, v875, v903, v907);
15195
0
                            let v942 = constructor_vector_all_ones(ctx);
15196
0
                            let v943 = &C::xmm_to_xmm_mem(ctx, v942);
15197
0
                            let v955 = constructor_x64_pxor(ctx, v908, v943);
15198
0
                            let v956 = constructor_output_xmm(ctx, v955);
15199
0
                            // Rule at src/isa/x64/lower.isle line 1968.
15200
0
                            return Some(v956);
15201
278
                        }
15202
                    }
15203
0
                    _ => {}
15204
                }
15205
17.6k
                let v823 = C::unpack_value_array_2(ctx, v821);
15206
17.6k
                let v826 = C::value_type(ctx, v823.0);
15207
17.6k
                if v826 == I128 {
15208
0
                    let v829 = &constructor_emit_cmp(ctx, v822, v823.0, v823.1);
15209
0
                    let v830 = constructor_lower_icmp_bool(ctx, v829);
15210
0
                    let v831 = C::output(ctx, v830);
15211
0
                    // Rule at src/isa/x64/lower.isle line 1806.
15212
0
                    return Some(v831);
15213
17.6k
                }
15214
17.6k
                let v827 = C::fits_in_64(ctx, v826);
15215
17.6k
                if let Some(v828) = v827 {
15216
17.6k
                    let v829 = &constructor_emit_cmp(ctx, v822, v823.0, v823.1);
15217
17.6k
                    let v830 = constructor_lower_icmp_bool(ctx, v829);
15218
17.6k
                    let v831 = C::output(ctx, v830);
15219
17.6k
                    // Rule at src/isa/x64/lower.isle line 1803.
15220
17.6k
                    return Some(v831);
15221
0
                }
15222
0
            }
15223
        }
15224
        &InstructionData::Load {
15225
1.20M
            opcode: ref v1476,
15226
1.20M
            arg: v1477,
15227
1.20M
            flags: v1478,
15228
1.20M
            offset: v1479,
15229
1.20M
        } => {
15230
1.20M
            match v1476 {
15231
                &Opcode::Load => {
15232
1.13M
                    let v1 = C::first_result(ctx, arg0);
15233
1.13M
                    if let Some(v2) = v1 {
15234
1.13M
                        let v3 = C::value_type(ctx, v2);
15235
1.13M
                        match v3 {
15236
                            F32 => {
15237
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15238
0
                                let v1508 = &C::amode_to_synthetic_amode(ctx, v1489);
15239
0
                                let v1509 = constructor_x64_movss_load(ctx, v1508);
15240
0
                                let v1510 = constructor_output_xmm(ctx, v1509);
15241
0
                                // Rule at src/isa/x64/lower.isle line 2863.
15242
0
                                return Some(v1510);
15243
                            }
15244
                            F64 => {
15245
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15246
0
                                let v1508 = &C::amode_to_synthetic_amode(ctx, v1489);
15247
0
                                let v1511 = constructor_x64_movsd_load(ctx, v1508);
15248
0
                                let v1512 = constructor_output_xmm(ctx, v1511);
15249
0
                                // Rule at src/isa/x64/lower.isle line 2865.
15250
0
                                return Some(v1512);
15251
                            }
15252
                            F32X4 => {
15253
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15254
0
                                let v1508 = &C::amode_to_synthetic_amode(ctx, v1489);
15255
0
                                let v1513 = constructor_x64_movups_load(ctx, v1508);
15256
0
                                let v1514 = constructor_output_xmm(ctx, v1513);
15257
0
                                // Rule at src/isa/x64/lower.isle line 2867.
15258
0
                                return Some(v1514);
15259
                            }
15260
                            F64X2 => {
15261
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15262
0
                                let v1508 = &C::amode_to_synthetic_amode(ctx, v1489);
15263
0
                                let v1515 = constructor_x64_movupd_load(ctx, v1508);
15264
0
                                let v1516 = constructor_output_xmm(ctx, v1515);
15265
0
                                // Rule at src/isa/x64/lower.isle line 2869.
15266
0
                                return Some(v1516);
15267
                            }
15268
1.13M
                            _ => {}
15269
1.13M
                        }
15270
1.13M
                        let v1487 = C::ty_int_ref_64(ctx, v3);
15271
1.13M
                        if let Some(
v1488528k
) = v1487 {
15272
528k
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15273
528k
                            let v1490 = constructor_x64_mov(ctx, v1489);
15274
528k
                            let v1491 = constructor_output_reg(ctx, v1490);
15275
528k
                            // Rule at src/isa/x64/lower.isle line 2841.
15276
528k
                            return Some(v1491);
15277
607k
                        }
15278
607k
                        let v740 = C::ty_vec128(ctx, v3);
15279
607k
                        if let Some(
v7410
) = v740 {
15280
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15281
0
                            let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15282
0
                            let v1518 = constructor_x64_movdqu_load(ctx, v1517);
15283
0
                            let v1519 = constructor_output_xmm(ctx, v1518);
15284
0
                            // Rule at src/isa/x64/lower.isle line 2871.
15285
0
                            return Some(v1519);
15286
607k
                        }
15287
607k
                        if v3 == I128 {
15288
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15289
0
                            let v1521 = &C::amode_offset(ctx, v1489, 0x8);
15290
0
                            let v1522 = constructor_x64_mov(ctx, v1489);
15291
0
                            let v1523 = constructor_x64_mov(ctx, v1521);
15292
0
                            let v1524 = C::value_regs(ctx, v1522, v1523);
15293
0
                            let v1525 = C::output(ctx, v1524);
15294
0
                            // Rule at src/isa/x64/lower.isle line 2875.
15295
0
                            return Some(v1525);
15296
607k
                        }
15297
607k
                        let v1233 = C::fits_in_32(ctx, v3);
15298
607k
                        if let Some(v1234) = v1233 {
15299
607k
                            let v1473 = &C::type_register_class(ctx, v3);
15300
607k
                            if let Some(v1474) = v1473 {
15301
                                if let &RegisterClass::Gpr {
15302
607k
                                    single_register: v1475,
15303
607k
                                } = v1474 {
15304
607k
                                    let v1480 = C::ty_bits_u16(ctx, v1234);
15305
607k
                                    let v1482 = &C::ext_mode(ctx, v1480, 0x40);
15306
607k
                                    let v1483 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15307
607k
                                    let v1484 = &constructor_amode_to_gpr_mem(ctx, v1483);
15308
607k
                                    let v1485 = constructor_x64_movzx(ctx, v1482, v1484);
15309
607k
                                    let v1486 = constructor_output_gpr(ctx, v1485);
15310
607k
                                    // Rule at src/isa/x64/lower.isle line 2837.
15311
607k
                                    return Some(v1486);
15312
0
                                }
15313
0
                            }
15314
0
                        }
15315
0
                    }
15316
                }
15317
                &Opcode::Uload8 => {
15318
51.9k
                    let v1 = C::first_result(ctx, arg0);
15319
51.9k
                    if let Some(v2) = v1 {
15320
51.9k
                        let v3 = C::value_type(ctx, v2);
15321
51.9k
                        let v1473 = &C::type_register_class(ctx, v3);
15322
51.9k
                        if let Some(v1474) = v1473 {
15323
                            if let &RegisterClass::Gpr {
15324
51.9k
                                single_register: v1475,
15325
51.9k
                            } = v1474 {
15326
51.9k
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15327
51.9k
                                let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15328
51.9k
                                let v1494 = constructor_x64_movzx(ctx, &ExtMode::BQ, v1493);
15329
51.9k
                                let v1495 = constructor_output_gpr(ctx, v1494);
15330
51.9k
                                // Rule at src/isa/x64/lower.isle line 2846.
15331
51.9k
                                return Some(v1495);
15332
0
                            }
15333
0
                        }
15334
0
                    }
15335
                }
15336
                &Opcode::Sload8 => {
15337
751
                    let v1 = C::first_result(ctx, arg0);
15338
751
                    if let Some(v2) = v1 {
15339
751
                        let v3 = C::value_type(ctx, v2);
15340
751
                        let v1473 = &C::type_register_class(ctx, v3);
15341
751
                        if let Some(v1474) = v1473 {
15342
                            if let &RegisterClass::Gpr {
15343
751
                                single_register: v1475,
15344
751
                            } = v1474 {
15345
751
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15346
751
                                let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15347
751
                                let v1496 = constructor_x64_movsx(ctx, &ExtMode::BQ, v1493);
15348
751
                                let v1497 = constructor_output_gpr(ctx, v1496);
15349
751
                                // Rule at src/isa/x64/lower.isle line 2848.
15350
751
                                return Some(v1497);
15351
0
                            }
15352
0
                        }
15353
0
                    }
15354
                }
15355
                &Opcode::Uload16 => {
15356
16.7k
                    let v1 = C::first_result(ctx, arg0);
15357
16.7k
                    if let Some(v2) = v1 {
15358
16.7k
                        let v3 = C::value_type(ctx, v2);
15359
16.7k
                        let v1473 = &C::type_register_class(ctx, v3);
15360
16.7k
                        if let Some(v1474) = v1473 {
15361
                            if let &RegisterClass::Gpr {
15362
16.7k
                                single_register: v1475,
15363
16.7k
                            } = v1474 {
15364
16.7k
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15365
16.7k
                                let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15366
16.7k
                                let v1499 = constructor_x64_movzx(ctx, &ExtMode::WQ, v1493);
15367
16.7k
                                let v1500 = constructor_output_gpr(ctx, v1499);
15368
16.7k
                                // Rule at src/isa/x64/lower.isle line 2850.
15369
16.7k
                                return Some(v1500);
15370
0
                            }
15371
0
                        }
15372
0
                    }
15373
                }
15374
                &Opcode::Sload16 => {
15375
0
                    let v1 = C::first_result(ctx, arg0);
15376
0
                    if let Some(v2) = v1 {
15377
0
                        let v3 = C::value_type(ctx, v2);
15378
0
                        let v1473 = &C::type_register_class(ctx, v3);
15379
0
                        if let Some(v1474) = v1473 {
15380
                            if let &RegisterClass::Gpr {
15381
0
                                single_register: v1475,
15382
0
                            } = v1474 {
15383
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15384
0
                                let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15385
0
                                let v1501 = constructor_x64_movsx(ctx, &ExtMode::WQ, v1493);
15386
0
                                let v1502 = constructor_output_gpr(ctx, v1501);
15387
0
                                // Rule at src/isa/x64/lower.isle line 2852.
15388
0
                                return Some(v1502);
15389
0
                            }
15390
0
                        }
15391
0
                    }
15392
                }
15393
                &Opcode::Uload32 => {
15394
2.31k
                    let v1 = C::first_result(ctx, arg0);
15395
2.31k
                    if let Some(v2) = v1 {
15396
2.31k
                        let v3 = C::value_type(ctx, v2);
15397
2.31k
                        let v1473 = &C::type_register_class(ctx, v3);
15398
2.31k
                        if let Some(v1474) = v1473 {
15399
                            if let &RegisterClass::Gpr {
15400
2.31k
                                single_register: v1475,
15401
2.31k
                            } = v1474 {
15402
2.31k
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15403
2.31k
                                let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15404
2.31k
                                let v1504 = constructor_x64_movzx(ctx, &ExtMode::LQ, v1493);
15405
2.31k
                                let v1505 = constructor_output_gpr(ctx, v1504);
15406
2.31k
                                // Rule at src/isa/x64/lower.isle line 2854.
15407
2.31k
                                return Some(v1505);
15408
0
                            }
15409
0
                        }
15410
0
                    }
15411
                }
15412
                &Opcode::Sload32 => {
15413
0
                    let v1 = C::first_result(ctx, arg0);
15414
0
                    if let Some(v2) = v1 {
15415
0
                        let v3 = C::value_type(ctx, v2);
15416
0
                        let v1473 = &C::type_register_class(ctx, v3);
15417
0
                        if let Some(v1474) = v1473 {
15418
                            if let &RegisterClass::Gpr {
15419
0
                                single_register: v1475,
15420
0
                            } = v1474 {
15421
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15422
0
                                let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15423
0
                                let v1506 = constructor_x64_movsx(ctx, &ExtMode::LQ, v1493);
15424
0
                                let v1507 = constructor_output_gpr(ctx, v1506);
15425
0
                                // Rule at src/isa/x64/lower.isle line 2856.
15426
0
                                return Some(v1507);
15427
0
                            }
15428
0
                        }
15429
0
                    }
15430
                }
15431
                &Opcode::Uload8x8 => {
15432
0
                    let v1 = C::first_result(ctx, arg0);
15433
0
                    if let Some(v2) = v1 {
15434
0
                        let v3 = C::value_type(ctx, v2);
15435
0
                        if v3 == I16X8 {
15436
0
                            let v441 = C::use_sse41(ctx);
15437
0
                            if v441 == true {
15438
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15439
0
                                let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15440
0
                                let v1528 = constructor_x64_pmovzxbw(ctx, v1517);
15441
0
                                let v1529 = constructor_output_xmm(ctx, v1528);
15442
0
                                // Rule at src/isa/x64/lower.isle line 2888.
15443
0
                                return Some(v1529);
15444
0
                            }
15445
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15446
0
                            let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15447
0
                            let v1538 = constructor_x64_movq_to_xmm(ctx, v1493);
15448
0
                            let v1541 = constructor_lower_uwiden_low(ctx, I16X8, v1538);
15449
0
                            let v1542 = constructor_output_xmm(ctx, v1541);
15450
0
                            // Rule at src/isa/x64/lower.isle line 2906.
15451
0
                            return Some(v1542);
15452
0
                        }
15453
0
                    }
15454
                }
15455
                &Opcode::Sload8x8 => {
15456
0
                    let v1 = C::first_result(ctx, arg0);
15457
0
                    if let Some(v2) = v1 {
15458
0
                        let v3 = C::value_type(ctx, v2);
15459
0
                        if v3 == I16X8 {
15460
0
                            let v441 = C::use_sse41(ctx);
15461
0
                            if v441 == true {
15462
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15463
0
                                let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15464
0
                                let v1526 = constructor_x64_pmovsxbw(ctx, v1517);
15465
0
                                let v1527 = constructor_output_xmm(ctx, v1526);
15466
0
                                // Rule at src/isa/x64/lower.isle line 2885.
15467
0
                                return Some(v1527);
15468
0
                            }
15469
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15470
0
                            let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15471
0
                            let v1538 = constructor_x64_movq_to_xmm(ctx, v1493);
15472
0
                            let v1539 = constructor_lower_swiden_low(ctx, I16X8, v1538);
15473
0
                            let v1540 = constructor_output_xmm(ctx, v1539);
15474
0
                            // Rule at src/isa/x64/lower.isle line 2904.
15475
0
                            return Some(v1540);
15476
0
                        }
15477
0
                    }
15478
                }
15479
                &Opcode::Uload16x4 => {
15480
0
                    let v1 = C::first_result(ctx, arg0);
15481
0
                    if let Some(v2) = v1 {
15482
0
                        let v3 = C::value_type(ctx, v2);
15483
0
                        if v3 == I32X4 {
15484
0
                            let v441 = C::use_sse41(ctx);
15485
0
                            if v441 == true {
15486
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15487
0
                                let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15488
0
                                let v1532 = constructor_x64_pmovzxwd(ctx, v1517);
15489
0
                                let v1533 = constructor_output_xmm(ctx, v1532);
15490
0
                                // Rule at src/isa/x64/lower.isle line 2894.
15491
0
                                return Some(v1533);
15492
0
                            }
15493
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15494
0
                            let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15495
0
                            let v1538 = constructor_x64_movq_to_xmm(ctx, v1493);
15496
0
                            let v1545 = constructor_lower_uwiden_low(ctx, I32X4, v1538);
15497
0
                            let v1546 = constructor_output_xmm(ctx, v1545);
15498
0
                            // Rule at src/isa/x64/lower.isle line 2910.
15499
0
                            return Some(v1546);
15500
0
                        }
15501
0
                    }
15502
                }
15503
                &Opcode::Sload16x4 => {
15504
0
                    let v1 = C::first_result(ctx, arg0);
15505
0
                    if let Some(v2) = v1 {
15506
0
                        let v3 = C::value_type(ctx, v2);
15507
0
                        if v3 == I32X4 {
15508
0
                            let v441 = C::use_sse41(ctx);
15509
0
                            if v441 == true {
15510
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15511
0
                                let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15512
0
                                let v1530 = constructor_x64_pmovsxwd(ctx, v1517);
15513
0
                                let v1531 = constructor_output_xmm(ctx, v1530);
15514
0
                                // Rule at src/isa/x64/lower.isle line 2891.
15515
0
                                return Some(v1531);
15516
0
                            }
15517
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15518
0
                            let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15519
0
                            let v1538 = constructor_x64_movq_to_xmm(ctx, v1493);
15520
0
                            let v1543 = constructor_lower_swiden_low(ctx, I32X4, v1538);
15521
0
                            let v1544 = constructor_output_xmm(ctx, v1543);
15522
0
                            // Rule at src/isa/x64/lower.isle line 2908.
15523
0
                            return Some(v1544);
15524
0
                        }
15525
0
                    }
15526
                }
15527
                &Opcode::Uload32x2 => {
15528
0
                    let v1 = C::first_result(ctx, arg0);
15529
0
                    if let Some(v2) = v1 {
15530
0
                        let v3 = C::value_type(ctx, v2);
15531
0
                        if v3 == I64X2 {
15532
0
                            let v441 = C::use_sse41(ctx);
15533
0
                            if v441 == true {
15534
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15535
0
                                let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15536
0
                                let v1536 = constructor_x64_pmovzxdq(ctx, v1517);
15537
0
                                let v1537 = constructor_output_xmm(ctx, v1536);
15538
0
                                // Rule at src/isa/x64/lower.isle line 2900.
15539
0
                                return Some(v1537);
15540
0
                            }
15541
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15542
0
                            let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15543
0
                            let v1538 = constructor_x64_movq_to_xmm(ctx, v1493);
15544
0
                            let v1549 = constructor_lower_uwiden_low(ctx, I64X2, v1538);
15545
0
                            let v1550 = constructor_output_xmm(ctx, v1549);
15546
0
                            // Rule at src/isa/x64/lower.isle line 2914.
15547
0
                            return Some(v1550);
15548
0
                        }
15549
0
                    }
15550
                }
15551
                &Opcode::Sload32x2 => {
15552
0
                    let v1 = C::first_result(ctx, arg0);
15553
0
                    if let Some(v2) = v1 {
15554
0
                        let v3 = C::value_type(ctx, v2);
15555
0
                        if v3 == I64X2 {
15556
0
                            let v441 = C::use_sse41(ctx);
15557
0
                            if v441 == true {
15558
0
                                let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15559
0
                                let v1517 = &constructor_amode_to_xmm_mem(ctx, v1489);
15560
0
                                let v1534 = constructor_x64_pmovsxdq(ctx, v1517);
15561
0
                                let v1535 = constructor_output_xmm(ctx, v1534);
15562
0
                                // Rule at src/isa/x64/lower.isle line 2897.
15563
0
                                return Some(v1535);
15564
0
                            }
15565
0
                            let v1489 = &constructor_to_amode(ctx, v1478, v1477, v1479);
15566
0
                            let v1493 = &constructor_amode_to_gpr_mem(ctx, v1489);
15567
0
                            let v1538 = constructor_x64_movq_to_xmm(ctx, v1493);
15568
0
                            let v1547 = constructor_lower_swiden_low(ctx, I64X2, v1538);
15569
0
                            let v1548 = constructor_output_xmm(ctx, v1547);
15570
0
                            // Rule at src/isa/x64/lower.isle line 2912.
15571
0
                            return Some(v1548);
15572
0
                        }
15573
0
                    }
15574
                }
15575
0
                _ => {}
15576
            }
15577
        }
15578
        &InstructionData::LoadNoOffset {
15579
0
            opcode: ref v1697,
15580
0
            arg: v1698,
15581
0
            flags: v1699,
15582
0
        } => {
15583
0
            match v1697 {
15584
                &Opcode::Bitcast => {
15585
0
                    let v1 = C::first_result(ctx, arg0);
15586
0
                    if let Some(v2) = v1 {
15587
0
                        let v3 = C::value_type(ctx, v2);
15588
0
                        let v1473 = &C::type_register_class(ctx, v3);
15589
0
                        if let Some(v1474) = v1473 {
15590
0
                            match v1474 {
15591
                                &RegisterClass::Gpr {
15592
0
                                    single_register: v1475,
15593
0
                                } => {
15594
0
                                    let v2115 = C::value_type(ctx, v1698);
15595
0
                                    let v2126 = &C::type_register_class(ctx, v2115);
15596
0
                                    if let Some(v2127) = v2126 {
15597
                                        if let &RegisterClass::Gpr {
15598
0
                                            single_register: v2128,
15599
0
                                        } = v2127 {
15600
0
                                            let v2129 = constructor_output_value(ctx, v1698);
15601
0
                                            // Rule at src/isa/x64/lower.isle line 3907.
15602
0
                                            return Some(v2129);
15603
0
                                        }
15604
0
                                    }
15605
                                }
15606
                                &RegisterClass::Xmm => {
15607
0
                                    let v2115 = C::value_type(ctx, v1698);
15608
0
                                    let v2126 = &C::type_register_class(ctx, v2115);
15609
0
                                    if let Some(v2127) = v2126 {
15610
0
                                        if let &RegisterClass::Xmm = v2127 {
15611
0
                                            let v2129 = constructor_output_value(ctx, v1698);
15612
0
                                            // Rule at src/isa/x64/lower.isle line 3911.
15613
0
                                            return Some(v2129);
15614
0
                                        }
15615
0
                                    }
15616
                                }
15617
0
                                _ => {}
15618
                            }
15619
0
                        }
15620
0
                        match v3 {
15621
                            I32 => {
15622
0
                                let v2115 = C::value_type(ctx, v1698);
15623
0
                                if v2115 == F32 {
15624
0
                                    let v2116 = constructor_put_in_xmm(ctx, v1698);
15625
0
                                    let v2117 = constructor_bitcast_xmm_to_gpr(ctx, F32, v2116);
15626
0
                                    let v2118 = constructor_output_gpr(ctx, v2117);
15627
0
                                    // Rule at src/isa/x64/lower.isle line 3894.
15628
0
                                    return Some(v2118);
15629
0
                                }
15630
                            }
15631
                            I64 => {
15632
0
                                let v2115 = C::value_type(ctx, v1698);
15633
0
                                if v2115 == F64 {
15634
0
                                    let v2116 = constructor_put_in_xmm(ctx, v1698);
15635
0
                                    let v2122 = constructor_bitcast_xmm_to_gpr(ctx, F64, v2116);
15636
0
                                    let v2123 = constructor_output_gpr(ctx, v2122);
15637
0
                                    // Rule at src/isa/x64/lower.isle line 3900.
15638
0
                                    return Some(v2123);
15639
0
                                }
15640
                            }
15641
                            F32 => {
15642
0
                                let v2115 = C::value_type(ctx, v1698);
15643
0
                                if v2115 == I32 {
15644
0
                                    let v2119 = constructor_put_in_gpr(ctx, v1698);
15645
0
                                    let v2120 = constructor_bitcast_gpr_to_xmm(ctx, I32, v2119);
15646
0
                                    let v2121 = constructor_output_xmm(ctx, v2120);
15647
0
                                    // Rule at src/isa/x64/lower.isle line 3897.
15648
0
                                    return Some(v2121);
15649
0
                                }
15650
                            }
15651
                            F64 => {
15652
0
                                let v2115 = C::value_type(ctx, v1698);
15653
0
                                if v2115 == I64 {
15654
0
                                    let v2119 = constructor_put_in_gpr(ctx, v1698);
15655
0
                                    let v2124 = constructor_bitcast_gpr_to_xmm(ctx, I64, v2119);
15656
0
                                    let v2125 = constructor_output_xmm(ctx, v2124);
15657
0
                                    // Rule at src/isa/x64/lower.isle line 3903.
15658
0
                                    return Some(v2125);
15659
0
                                }
15660
                            }
15661
0
                            _ => {}
15662
                        }
15663
0
                    }
15664
                }
15665
                &Opcode::AtomicLoad => {
15666
0
                    let v1 = C::first_result(ctx, arg0);
15667
0
                    if let Some(v2) = v1 {
15668
0
                        let v3 = C::value_type(ctx, v2);
15669
0
                        if v3 == I64 {
15670
0
                            let v48 = C::zero_offset(ctx);
15671
0
                            let v1700 = &constructor_to_amode(ctx, v1699, v1698, v48);
15672
0
                            let v1701 = constructor_x64_mov(ctx, v1700);
15673
0
                            let v1702 = constructor_output_reg(ctx, v1701);
15674
0
                            // Rule at src/isa/x64/lower.isle line 3196.
15675
0
                            return Some(v1702);
15676
0
                        }
15677
0
                        let v1233 = C::fits_in_32(ctx, v3);
15678
0
                        if let Some(v1234) = v1233 {
15679
0
                            let v1703 = C::ty_int(ctx, v3);
15680
0
                            if let Some(v1704) = v1703 {
15681
0
                                let v1480 = C::ty_bits_u16(ctx, v1234);
15682
0
                                let v1482 = &C::ext_mode(ctx, v1480, 0x40);
15683
0
                                let v1705 = C::zero_offset(ctx);
15684
0
                                let v1706 = &constructor_to_amode(ctx, v1699, v1698, v1705);
15685
0
                                let v1707 = &constructor_amode_to_gpr_mem(ctx, v1706);
15686
0
                                let v1708 = constructor_x64_movzx(ctx, v1482, v1707);
15687
0
                                let v1709 = constructor_output_gpr(ctx, v1708);
15688
0
                                // Rule at src/isa/x64/lower.isle line 3198.
15689
0
                                return Some(v1709);
15690
0
                            }
15691
0
                        }
15692
0
                    }
15693
                }
15694
0
                _ => {}
15695
            }
15696
        }
15697
        &InstructionData::MultiAry {
15698
50.1k
            opcode: ref v816,
15699
50.1k
            args: v817,
15700
50.1k
        } => {
15701
50.1k
            if let &Opcode::Return = v816 {
15702
50.1k
                let v818 = C::value_list_slice(ctx, v817);
15703
50.1k
                let v819 = constructor_lower_return(ctx, v818);
15704
50.1k
                // Rule at src/isa/x64/lower.isle line 1798.
15705
50.1k
                return Some(v819);
15706
0
            }
15707
        }
15708
        &InstructionData::NullAry {
15709
21.2k
            opcode: ref v31,
15710
21.2k
        } => {
15711
21.2k
            match v31 {
15712
                &Opcode::Debugtrap => {
15713
0
                    let v1247 = &constructor_x64_hlt(ctx);
15714
0
                    let v1248 = constructor_side_effect(ctx, v1247);
15715
0
                    // Rule at src/isa/x64/lower.isle line 2479.
15716
0
                    return Some(v1248);
15717
                }
15718
                &Opcode::GetPinnedReg => {
15719
0
                    let v2238 = constructor_read_pinned_gpr(ctx);
15720
0
                    let v2239 = constructor_output_gpr(ctx, v2238);
15721
0
                    // Rule at src/isa/x64/lower.isle line 4172.
15722
0
                    return Some(v2239);
15723
                }
15724
                &Opcode::GetFramePointer => {
15725
2.46k
                    let v1775 = constructor_x64_rbp(ctx);
15726
2.46k
                    let v1776 = constructor_output_reg(ctx, v1775);
15727
2.46k
                    // Rule at src/isa/x64/lower.isle line 3253.
15728
2.46k
                    return Some(v1776);
15729
                }
15730
                &Opcode::GetStackPointer => {
15731
16.3k
                    let v1777 = constructor_x64_rsp(ctx);
15732
16.3k
                    let v1778 = constructor_output_reg(ctx, v1777);
15733
16.3k
                    // Rule at src/isa/x64/lower.isle line 3256.
15734
16.3k
                    return Some(v1778);
15735
                }
15736
                &Opcode::GetReturnAddress => {
15737
2.46k
                    let v1775 = constructor_x64_rbp(ctx);
15738
2.46k
                    let v47 = C::mem_flags_trusted(ctx);
15739
2.46k
                    let v1779 = Amode::ImmReg {
15740
2.46k
                        simm32: 0x8,
15741
2.46k
                        base: v1775,
15742
2.46k
                        flags: v47,
15743
2.46k
                    };
15744
2.46k
                    let v1780 = &C::amode_to_synthetic_amode(ctx, &v1779);
15745
2.46k
                    let v1781 = constructor_x64_load(ctx, I64, v1780, &ExtKind::None);
15746
2.46k
                    let v1782 = constructor_output_reg(ctx, v1781);
15747
2.46k
                    // Rule at src/isa/x64/lower.isle line 3259.
15748
2.46k
                    return Some(v1782);
15749
                }
15750
                &Opcode::Null => {
15751
0
                    let v1 = C::first_result(ctx, arg0);
15752
0
                    if let Some(v2) = v1 {
15753
0
                        let v3 = C::value_type(ctx, v2);
15754
0
                        let v32 = constructor_imm(ctx, v3, 0x0);
15755
0
                        let v33 = constructor_output_reg(ctx, v32);
15756
0
                        // Rule at src/isa/x64/lower.isle line 37.
15757
0
                        return Some(v33);
15758
0
                    }
15759
                }
15760
                &Opcode::Nop => {
15761
0
                    let v2592 = C::invalid_reg(ctx);
15762
0
                    let v2593 = constructor_output_reg(ctx, v2592);
15763
0
                    // Rule at src/isa/x64/lower.isle line 4719.
15764
0
                    return Some(v2593);
15765
                }
15766
                &Opcode::Fence => {
15767
0
                    let v1677 = &constructor_x64_mfence(ctx);
15768
0
                    let v1678 = constructor_side_effect(ctx, v1677);
15769
0
                    // Rule at src/isa/x64/lower.isle line 3174.
15770
0
                    return Some(v1678);
15771
                }
15772
0
                _ => {}
15773
            }
15774
        }
15775
        &InstructionData::Shuffle {
15776
0
            opcode: ref v2247,
15777
0
            args: ref v2248,
15778
0
            imm: v2249,
15779
0
        } => {
15780
0
            if let &Opcode::Shuffle = v2247 {
15781
0
                let v441 = C::use_sse41(ctx);
15782
0
                if v441 == true {
15783
0
                    let v2253 = C::pblendw_imm(ctx, v2249);
15784
0
                    if let Some(v2254) = v2253 {
15785
0
                        let v2250 = C::unpack_value_array_2(ctx, v2248);
15786
0
                        let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15787
0
                        let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15788
0
                        let v2257 = constructor_x64_pblendw(ctx, v2255, v2256, v2254);
15789
0
                        let v2258 = constructor_output_xmm(ctx, v2257);
15790
0
                        // Rule at src/isa/x64/lower.isle line 4192.
15791
0
                        return Some(v2258);
15792
0
                    }
15793
0
                }
15794
0
                let v525 = C::use_ssse3(ctx);
15795
0
                if v525 == true {
15796
0
                    let v2259 = C::palignr_imm_from_immediate(ctx, v2249);
15797
0
                    if let Some(v2260) = v2259 {
15798
0
                        let v2250 = C::unpack_value_array_2(ctx, v2248);
15799
0
                        let v2261 = constructor_put_in_xmm(ctx, v2250.1);
15800
0
                        let v2262 = &C::put_in_xmm_mem(ctx, v2250.0);
15801
0
                        let v2263 = constructor_x64_palignr(ctx, v2261, v2262, v2260);
15802
0
                        let v2264 = constructor_output_xmm(ctx, v2263);
15803
0
                        // Rule at src/isa/x64/lower.isle line 4203.
15804
0
                        return Some(v2264);
15805
0
                    }
15806
0
                }
15807
0
                let v2265 = C::pshuflw_lhs_imm(ctx, v2249);
15808
0
                if let Some(v2266) = v2265 {
15809
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15810
0
                    let v2267 = &C::put_in_xmm_mem(ctx, v2250.0);
15811
0
                    let v2268 = constructor_x64_pshuflw(ctx, v2267, v2266);
15812
0
                    let v2269 = constructor_output_xmm(ctx, v2268);
15813
0
                    // Rule at src/isa/x64/lower.isle line 4215.
15814
0
                    return Some(v2269);
15815
0
                }
15816
0
                let v2270 = C::pshuflw_rhs_imm(ctx, v2249);
15817
0
                if let Some(v2271) = v2270 {
15818
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15819
0
                    let v2272 = &C::put_in_xmm_mem(ctx, v2250.1);
15820
0
                    let v2273 = constructor_x64_pshuflw(ctx, v2272, v2271);
15821
0
                    let v2274 = constructor_output_xmm(ctx, v2273);
15822
0
                    // Rule at src/isa/x64/lower.isle line 4217.
15823
0
                    return Some(v2274);
15824
0
                }
15825
0
                let v2275 = C::pshufhw_lhs_imm(ctx, v2249);
15826
0
                if let Some(v2276) = v2275 {
15827
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15828
0
                    let v2267 = &C::put_in_xmm_mem(ctx, v2250.0);
15829
0
                    let v2277 = constructor_x64_pshufhw(ctx, v2267, v2276);
15830
0
                    let v2278 = constructor_output_xmm(ctx, v2277);
15831
0
                    // Rule at src/isa/x64/lower.isle line 4219.
15832
0
                    return Some(v2278);
15833
0
                }
15834
0
                let v2279 = C::pshufhw_rhs_imm(ctx, v2249);
15835
0
                if let Some(v2280) = v2279 {
15836
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15837
0
                    let v2272 = &C::put_in_xmm_mem(ctx, v2250.1);
15838
0
                    let v2281 = constructor_x64_pshufhw(ctx, v2272, v2280);
15839
0
                    let v2282 = constructor_output_xmm(ctx, v2281);
15840
0
                    // Rule at src/isa/x64/lower.isle line 4221.
15841
0
                    return Some(v2282);
15842
0
                }
15843
0
                let v2283 = C::pshufd_lhs_imm(ctx, v2249);
15844
0
                if let Some(v2284) = v2283 {
15845
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15846
0
                    let v2267 = &C::put_in_xmm_mem(ctx, v2250.0);
15847
0
                    let v2285 = constructor_x64_pshufd(ctx, v2267, v2284);
15848
0
                    let v2286 = constructor_output_xmm(ctx, v2285);
15849
0
                    // Rule at src/isa/x64/lower.isle line 4238.
15850
0
                    return Some(v2286);
15851
0
                }
15852
0
                let v2287 = C::pshufd_rhs_imm(ctx, v2249);
15853
0
                if let Some(v2288) = v2287 {
15854
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15855
0
                    let v2272 = &C::put_in_xmm_mem(ctx, v2250.1);
15856
0
                    let v2289 = constructor_x64_pshufd(ctx, v2272, v2288);
15857
0
                    let v2290 = constructor_output_xmm(ctx, v2289);
15858
0
                    // Rule at src/isa/x64/lower.isle line 4240.
15859
0
                    return Some(v2290);
15860
0
                }
15861
0
                let v2291 = C::u128_from_immediate(ctx, v2249);
15862
0
                if let Some(v2292) = v2291 {
15863
0
                    match v2292 {
15864
                        0x0 => {
15865
0
                            if v525 == true {
15866
0
                                let v2250 = C::unpack_value_array_2(ctx, v2248);
15867
0
                                let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15868
0
                                let v530 = constructor_xmm_zero(ctx, I8X16);
15869
0
                                let v2073 = &C::xmm_to_xmm_mem(ctx, v530);
15870
0
                                let v2309 = constructor_x64_pshufb(ctx, v2255, v2073);
15871
0
                                let v2310 = constructor_output_xmm(ctx, v2309);
15872
0
                                // Rule at src/isa/x64/lower.isle line 4277.
15873
0
                                return Some(v2310);
15874
0
                            }
15875
                        }
15876
                        0x17071606150514041303120211011000 => {
15877
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15878
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15879
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15880
0
                            let v2295 = constructor_x64_punpcklbw(ctx, v2255, v2256);
15881
0
                            let v2296 = constructor_output_xmm(ctx, v2295);
15882
0
                            // Rule at src/isa/x64/lower.isle line 4251.
15883
0
                            return Some(v2296);
15884
                        }
15885
                        0x17160706151405041312030211100100 => {
15886
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15887
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15888
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15889
0
                            let v2299 = constructor_x64_punpcklwd(ctx, v2255, v2256);
15890
0
                            let v2300 = constructor_output_xmm(ctx, v2299);
15891
0
                            // Rule at src/isa/x64/lower.isle line 4257.
15892
0
                            return Some(v2300);
15893
                        }
15894
                        0x17161514070605041312111003020100 => {
15895
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15896
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15897
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15898
0
                            let v2303 = constructor_x64_punpckldq(ctx, v2255, v2256);
15899
0
                            let v2304 = constructor_output_xmm(ctx, v2303);
15900
0
                            // Rule at src/isa/x64/lower.isle line 4263.
15901
0
                            return Some(v2304);
15902
                        }
15903
                        0x17161514131211100706050403020100 => {
15904
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15905
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15906
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15907
0
                            let v2307 = constructor_x64_punpcklqdq(ctx, v2255, v2256);
15908
0
                            let v2308 = constructor_output_xmm(ctx, v2307);
15909
0
                            // Rule at src/isa/x64/lower.isle line 4269.
15910
0
                            return Some(v2308);
15911
                        }
15912
                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
15913
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15914
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15915
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15916
0
                            let v2293 = constructor_x64_punpckhbw(ctx, v2255, v2256);
15917
0
                            let v2294 = constructor_output_xmm(ctx, v2293);
15918
0
                            // Rule at src/isa/x64/lower.isle line 4249.
15919
0
                            return Some(v2294);
15920
                        }
15921
                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
15922
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15923
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15924
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15925
0
                            let v2297 = constructor_x64_punpckhwd(ctx, v2255, v2256);
15926
0
                            let v2298 = constructor_output_xmm(ctx, v2297);
15927
0
                            // Rule at src/isa/x64/lower.isle line 4255.
15928
0
                            return Some(v2298);
15929
                        }
15930
                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
15931
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15932
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15933
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15934
0
                            let v2301 = constructor_x64_punpckhdq(ctx, v2255, v2256);
15935
0
                            let v2302 = constructor_output_xmm(ctx, v2301);
15936
0
                            // Rule at src/isa/x64/lower.isle line 4261.
15937
0
                            return Some(v2302);
15938
                        }
15939
                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
15940
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
15941
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15942
0
                            let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15943
0
                            let v2305 = constructor_x64_punpckhqdq(ctx, v2255, v2256);
15944
0
                            let v2306 = constructor_output_xmm(ctx, v2305);
15945
0
                            // Rule at src/isa/x64/lower.isle line 4267.
15946
0
                            return Some(v2306);
15947
                        }
15948
0
                        _ => {}
15949
                    }
15950
0
                }
15951
0
                let v2311 = C::shufps_imm(ctx, v2249);
15952
0
                if let Some(v2312) = v2311 {
15953
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15954
0
                    let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15955
0
                    let v2256 = &C::put_in_xmm_mem(ctx, v2250.1);
15956
0
                    let v2313 = constructor_x64_shufps(ctx, v2255, v2256, v2312);
15957
0
                    let v2314 = constructor_output_xmm(ctx, v2313);
15958
0
                    // Rule at src/isa/x64/lower.isle line 4291.
15959
0
                    return Some(v2314);
15960
0
                }
15961
0
                let v2315 = C::shufps_rev_imm(ctx, v2249);
15962
0
                if let Some(v2316) = v2315 {
15963
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
15964
0
                    let v2261 = constructor_put_in_xmm(ctx, v2250.1);
15965
0
                    let v2262 = &C::put_in_xmm_mem(ctx, v2250.0);
15966
0
                    let v2317 = constructor_x64_shufps(ctx, v2261, v2262, v2316);
15967
0
                    let v2318 = constructor_output_xmm(ctx, v2317);
15968
0
                    // Rule at src/isa/x64/lower.isle line 4293.
15969
0
                    return Some(v2318);
15970
0
                }
15971
0
                let v2319 = &C::vec_mask_from_immediate(ctx, v2249);
15972
0
                if let Some(v2320) = v2319 {
15973
0
                    if v525 == true {
15974
0
                        let v2250 = C::unpack_value_array_2(ctx, v2248);
15975
0
                        if v2250.0 == v2250.1 {
15976
0
                            let v2255 = constructor_put_in_xmm(ctx, v2250.0);
15977
0
                            let v2321 = C::shuffle_0_31_mask(ctx, v2320);
15978
0
                            let v2322 = &constructor_const_to_xmm_mem(ctx, v2321);
15979
0
                            let v2323 = constructor_x64_pshufb(ctx, v2255, v2322);
15980
0
                            let v2324 = constructor_output_xmm(ctx, v2323);
15981
0
                            // Rule at src/isa/x64/lower.isle line 4306.
15982
0
                            return Some(v2324);
15983
0
                        }
15984
0
                    }
15985
0
                    let v332 = C::use_avx512vl(ctx);
15986
0
                    if v332 == true {
15987
0
                        let v2329 = C::use_avx512vbmi(ctx);
15988
0
                        if v2329 == true {
15989
0
                            let v2325 = C::perm_from_mask_with_zeros(ctx, v2320);
15990
0
                            if let Some(v2326) = v2325 {
15991
0
                                let v2330 = constructor_x64_xmm_load_const(ctx, I8X16, v2326.0);
15992
0
                                let v2250 = C::unpack_value_array_2(ctx, v2248);
15993
0
                                let v2331 = constructor_put_in_xmm(ctx, v2250.0);
15994
0
                                let v2332 = &C::put_in_xmm_mem(ctx, v2250.1);
15995
0
                                let v2333 = constructor_x64_vpermi2b(ctx, v2330, v2331, v2332);
15996
0
                                let v2334 = &constructor_const_to_xmm_mem(ctx, v2326.1);
15997
0
                                let v2335 = constructor_x64_andps(ctx, v2333, v2334);
15998
0
                                let v2336 = constructor_output_xmm(ctx, v2335);
15999
0
                                // Rule at src/isa/x64/lower.isle line 4313.
16000
0
                                return Some(v2336);
16001
0
                            }
16002
0
                            let v2337 = C::perm_from_mask(ctx, v2320);
16003
0
                            let v2338 = constructor_x64_xmm_load_const(ctx, I8X16, v2337);
16004
0
                            let v2250 = C::unpack_value_array_2(ctx, v2248);
16005
0
                            let v2339 = constructor_put_in_xmm(ctx, v2250.0);
16006
0
                            let v2340 = &C::put_in_xmm_mem(ctx, v2250.1);
16007
0
                            let v2341 = constructor_x64_vpermi2b(ctx, v2338, v2339, v2340);
16008
0
                            let v2342 = constructor_output_xmm(ctx, v2341);
16009
0
                            // Rule at src/isa/x64/lower.isle line 4320.
16010
0
                            return Some(v2342);
16011
0
                        }
16012
0
                    }
16013
0
                    let v2250 = C::unpack_value_array_2(ctx, v2248);
16014
0
                    let v2255 = constructor_put_in_xmm(ctx, v2250.0);
16015
0
                    let v2343 = C::shuffle_0_15_mask(ctx, v2320);
16016
0
                    let v2344 = &constructor_const_to_reg_mem(ctx, v2343);
16017
0
                    let v2345 = constructor_lower_pshufb(ctx, v2255, v2344);
16018
0
                    let v2346 = constructor_put_in_xmm(ctx, v2250.1);
16019
0
                    let v2347 = C::shuffle_16_31_mask(ctx, v2320);
16020
0
                    let v2348 = &constructor_const_to_reg_mem(ctx, v2347);
16021
0
                    let v2349 = constructor_lower_pshufb(ctx, v2346, v2348);
16022
0
                    let v2350 = &C::xmm_to_xmm_mem(ctx, v2349);
16023
0
                    let v2351 = constructor_x64_por(ctx, v2345, v2350);
16024
0
                    let v2352 = constructor_output_xmm(ctx, v2351);
16025
0
                    // Rule at src/isa/x64/lower.isle line 4328.
16026
0
                    return Some(v2352);
16027
0
                }
16028
0
            }
16029
        }
16030
        &InstructionData::StackLoad {
16031
2.27k
            opcode: ref v2159,
16032
2.27k
            stack_slot: v2160,
16033
2.27k
            offset: v2161,
16034
2.27k
        } => {
16035
2.27k
            if let &Opcode::StackAddr = v2159 {
16036
2.27k
                let v2162 = constructor_stack_addr_impl(ctx, v2160, v2161);
16037
2.27k
                let v2163 = constructor_output_gpr(ctx, v2162);
16038
2.27k
                // Rule at src/isa/x64/lower.isle line 4003.
16039
2.27k
                return Some(v2163);
16040
0
            }
16041
        }
16042
        &InstructionData::Store {
16043
991k
            opcode: ref v1551,
16044
991k
            args: ref v1552,
16045
991k
            flags: v1553,
16046
991k
            offset: v1554,
16047
991k
        } => {
16048
991k
            match v1551 {
16049
                &Opcode::Store => {
16050
897k
                    let v1555 = C::unpack_value_array_2(ctx, v1552);
16051
897k
                    let v1573 = C::def_inst(ctx, v1555.0);
16052
897k
                    if let Some(
v1574853k
) = v1573 {
16053
853k
                        let v1575 = C::first_result(ctx, v1574);
16054
853k
                        if let Some(v1576) = v1575 {
16055
853k
                            let v1580 = &C::inst_data(ctx, v1574);
16056
853k
                            match v1580 {
16057
                                &InstructionData::Binary {
16058
131k
                                    opcode: ref v1630,
16059
131k
                                    args: ref v1631,
16060
131k
                                } => {
16061
131k
                                    match v1630 {
16062
                                        &Opcode::Iadd => {
16063
107k
                                            let v1577 = C::value_type(ctx, v1576);
16064
107k
                                            let v1628 = C::ty_32_or_64(ctx, v1577);
16065
107k
                                            if let Some(v1629) = v1628 {
16066
107k
                                                let v1632 = C::unpack_value_array_2(ctx, v1631);
16067
107k
                                                let v1635 = &C::sinkable_load(ctx, v1632.0);
16068
107k
                                                if let Some(
v16362.29k
) = v1635 {
16069
2.29k
                                                    let v1637 = C::def_inst(ctx, v1632.0);
16070
2.29k
                                                    if let Some(v1638) = v1637 {
16071
2.29k
                                                        let v1639 = &C::inst_data(ctx, v1638);
16072
                                                        if let &InstructionData::Load {
16073
2.29k
                                                            opcode: ref v1640,
16074
2.29k
                                                            arg: v1641,
16075
2.29k
                                                            flags: v1642,
16076
2.29k
                                                            offset: v1643,
16077
2.29k
                                                        } = v1639 {
16078
2.29k
                                                            if let &Opcode::Load = v1640 {
16079
2.29k
                                                                if v1553 == v1642 {
16080
2.29k
                                                                    if v1554 == v1643 {
16081
2.29k
                                                                        if v1555.1 == v1641 {
16082
1.84k
                                                                            let v1644 = &constructor_sink_load_to_reg_mem_imm(ctx, v1636);
16083
1.84k
                                                                            let v1645 = &constructor_to_amode(ctx, v1642, v1641, v1643);
16084
1.84k
                                                                            let v1646 = constructor_put_in_gpr(ctx, v1632.1);
16085
1.84k
                                                                            let v1647 = &constructor_x64_add_mem(ctx, v1629, v1645, v1646);
16086
1.84k
                                                                            let v1648 = constructor_side_effect(ctx, v1647);
16087
1.84k
                                                                            // Rule at src/isa/x64/lower.isle line 3047.
16088
1.84k
                                                                            return Some(v1648);
16089
447
                                                                        }
16090
0
                                                                    }
16091
0
                                                                }
16092
0
                                                            }
16093
0
                                                        }
16094
0
                                                    }
16095
105k
                                                }
16096
105k
                                                let v1649 = &C::sinkable_load(ctx, v1632.1);
16097
105k
                                                if let Some(
v165055
) = v1649 {
16098
55
                                                    let v1651 = C::def_inst(ctx, v1632.1);
16099
55
                                                    if let Some(v1652) = v1651 {
16100
55
                                                        let v1653 = &C::inst_data(ctx, v1652);
16101
                                                        if let &InstructionData::Load {
16102
55
                                                            opcode: ref v1654,
16103
55
                                                            arg: v1655,
16104
55
                                                            flags: v1656,
16105
55
                                                            offset: v1657,
16106
55
                                                        } = v1653 {
16107
55
                                                            if let &Opcode::Load = v1654 {
16108
55
                                                                if v1553 == v1656 {
16109
55
                                                                    if v1554 == v1657 {
16110
55
                                                                        if v1555.1 == v1655 {
16111
32
                                                                            let v1658 = &constructor_sink_load_to_reg_mem_imm(ctx, v1650);
16112
32
                                                                            let v1659 = &constructor_to_amode(ctx, v1656, v1655, v1657);
16113
32
                                                                            let v1660 = constructor_put_in_gpr(ctx, v1632.0);
16114
32
                                                                            let v1661 = &constructor_x64_add_mem(ctx, v1629, v1659, v1660);
16115
32
                                                                            let v1662 = constructor_side_effect(ctx, v1661);
16116
32
                                                                            // Rule at src/isa/x64/lower.isle line 3061.
16117
32
                                                                            return Some(v1662);
16118
23
                                                                        }
16119
0
                                                                    }
16120
0
                                                                }
16121
0
                                                            }
16122
0
                                                        }
16123
0
                                                    }
16124
105k
                                                }
16125
0
                                            }
16126
                                        }
16127
                                        &Opcode::Isub => {
16128
17.7k
                                            let v1577 = C::value_type(ctx, v1576);
16129
17.7k
                                            let v1628 = C::ty_32_or_64(ctx, v1577);
16130
17.7k
                                            if let Some(v1629) = v1628 {
16131
17.7k
                                                let v1632 = C::unpack_value_array_2(ctx, v1631);
16132
17.7k
                                                let v1635 = &C::sinkable_load(ctx, v1632.0);
16133
17.7k
                                                if let Some(
v16367
) = v1635 {
16134
7
                                                    let v1637 = C::def_inst(ctx, v1632.0);
16135
7
                                                    if let Some(v1638) = v1637 {
16136
7
                                                        let v1639 = &C::inst_data(ctx, v1638);
16137
                                                        if let &InstructionData::Load {
16138
7
                                                            opcode: ref v1640,
16139
7
                                                            arg: v1641,
16140
7
                                                            flags: v1642,
16141
7
                                                            offset: v1643,
16142
7
                                                        } = v1639 {
16143
7
                                                            if let &Opcode::Load = v1640 {
16144
7
                                                                if v1553 == v1642 {
16145
7
                                                                    if v1554 == v1643 {
16146
7
                                                                        if v1555.1 == v1641 {
16147
7
                                                                            let v1644 = &constructor_sink_load_to_reg_mem_imm(ctx, v1636);
16148
7
                                                                            let v1645 = &constructor_to_amode(ctx, v1642, v1641, v1643);
16149
7
                                                                            let v1646 = constructor_put_in_gpr(ctx, v1632.1);
16150
7
                                                                            let v1663 = &constructor_x64_sub_mem(ctx, v1629, v1645, v1646);
16151
7
                                                                            let v1664 = constructor_side_effect(ctx, v1663);
16152
7
                                                                            // Rule at src/isa/x64/lower.isle line 3075.
16153
7
                                                                            return Some(v1664);
16154
0
                                                                        }
16155
0
                                                                    }
16156
0
                                                                }
16157
0
                                                            }
16158
0
                                                        }
16159
0
                                                    }
16160
17.7k
                                                }
16161
0
                                            }
16162
                                        }
16163
                                        &Opcode::Band => {
16164
1.04k
                                            let v1577 = C::value_type(ctx, v1576);
16165
1.04k
                                            let v1628 = C::ty_32_or_64(ctx, v1577);
16166
1.04k
                                            if let Some(v1629) = v1628 {
16167
1.04k
                                                let v1632 = C::unpack_value_array_2(ctx, v1631);
16168
1.04k
                                                let v1635 = &C::sinkable_load(ctx, v1632.0);
16169
1.04k
                                                if let Some(
v163618
) = v1635 {
16170
18
                                                    let v1637 = C::def_inst(ctx, v1632.0);
16171
18
                                                    if let Some(v1638) = v1637 {
16172
18
                                                        let v1639 = &C::inst_data(ctx, v1638);
16173
                                                        if let &InstructionData::Load {
16174
18
                                                            opcode: ref v1640,
16175
18
                                                            arg: v1641,
16176
18
                                                            flags: v1642,
16177
18
                                                            offset: v1643,
16178
18
                                                        } = v1639 {
16179
18
                                                            if let &Opcode::Load = v1640 {
16180
18
                                                                if v1553 == v1642 {
16181
18
                                                                    if v1554 == v1643 {
16182
18
                                                                        if v1555.1 == v1641 {
16183
0
                                                                            let v1644 = &constructor_sink_load_to_reg_mem_imm(ctx, v1636);
16184
0
                                                                            let v1645 = &constructor_to_amode(ctx, v1642, v1641, v1643);
16185
0
                                                                            let v1646 = constructor_put_in_gpr(ctx, v1632.1);
16186
0
                                                                            let v1665 = &constructor_x64_and_mem(ctx, v1629, v1645, v1646);
16187
0
                                                                            let v1666 = constructor_side_effect(ctx, v1665);
16188
0
                                                                            // Rule at src/isa/x64/lower.isle line 3089.
16189
0
                                                                            return Some(v1666);
16190
18
                                                                        }
16191
0
                                                                    }
16192
0
                                                                }
16193
0
                                                            }
16194
0
                                                        }
16195
0
                                                    }
16196
1.03k
                                                }
16197
1.04k
                                                let v1649 = &C::sinkable_load(ctx, v1632.1);
16198
1.04k
                                                if let Some(
v16500
) = v1649 {
16199
0
                                                    let v1651 = C::def_inst(ctx, v1632.1);
16200
0
                                                    if let Some(v1652) = v1651 {
16201
0
                                                        let v1653 = &C::inst_data(ctx, v1652);
16202
                                                        if let &InstructionData::Load {
16203
0
                                                            opcode: ref v1654,
16204
0
                                                            arg: v1655,
16205
0
                                                            flags: v1656,
16206
0
                                                            offset: v1657,
16207
0
                                                        } = v1653 {
16208
0
                                                            if let &Opcode::Load = v1654 {
16209
0
                                                                if v1553 == v1656 {
16210
0
                                                                    if v1554 == v1657 {
16211
0
                                                                        if v1555.1 == v1655 {
16212
0
                                                                            let v1658 = &constructor_sink_load_to_reg_mem_imm(ctx, v1650);
16213
0
                                                                            let v1659 = &constructor_to_amode(ctx, v1656, v1655, v1657);
16214
0
                                                                            let v1660 = constructor_put_in_gpr(ctx, v1632.0);
16215
0
                                                                            let v1667 = &constructor_x64_and_mem(ctx, v1629, v1659, v1660);
16216
0
                                                                            let v1668 = constructor_side_effect(ctx, v1667);
16217
0
                                                                            // Rule at src/isa/x64/lower.isle line 3103.
16218
0
                                                                            return Some(v1668);
16219
0
                                                                        }
16220
0
                                                                    }
16221
0
                                                                }
16222
0
                                                            }
16223
0
                                                        }
16224
0
                                                    }
16225
1.04k
                                                }
16226
0
                                            }
16227
                                        }
16228
                                        &Opcode::Bor => {
16229
2.10k
                                            let v1577 = C::value_type(ctx, v1576);
16230
2.10k
                                            let v1628 = C::ty_32_or_64(ctx, v1577);
16231
2.10k
                                            if let Some(v1629) = v1628 {
16232
2.10k
                                                let v1632 = C::unpack_value_array_2(ctx, v1631);
16233
2.10k
                                                let v1635 = &C::sinkable_load(ctx, v1632.0);
16234
2.10k
                                                if let Some(
v16360
) = v1635 {
16235
0
                                                    let v1637 = C::def_inst(ctx, v1632.0);
16236
0
                                                    if let Some(v1638) = v1637 {
16237
0
                                                        let v1639 = &C::inst_data(ctx, v1638);
16238
                                                        if let &InstructionData::Load {
16239
0
                                                            opcode: ref v1640,
16240
0
                                                            arg: v1641,
16241
0
                                                            flags: v1642,
16242
0
                                                            offset: v1643,
16243
0
                                                        } = v1639 {
16244
0
                                                            if let &Opcode::Load = v1640 {
16245
0
                                                                if v1553 == v1642 {
16246
0
                                                                    if v1554 == v1643 {
16247
0
                                                                        if v1555.1 == v1641 {
16248
0
                                                                            let v1644 = &constructor_sink_load_to_reg_mem_imm(ctx, v1636);
16249
0
                                                                            let v1645 = &constructor_to_amode(ctx, v1642, v1641, v1643);
16250
0
                                                                            let v1646 = constructor_put_in_gpr(ctx, v1632.1);
16251
0
                                                                            let v1669 = &constructor_x64_or_mem(ctx, v1629, v1645, v1646);
16252
0
                                                                            let v1670 = constructor_side_effect(ctx, v1669);
16253
0
                                                                            // Rule at src/isa/x64/lower.isle line 3117.
16254
0
                                                                            return Some(v1670);
16255
0
                                                                        }
16256
0
                                                                    }
16257
0
                                                                }
16258
0
                                                            }
16259
0
                                                        }
16260
0
                                                    }
16261
2.10k
                                                }
16262
2.10k
                                                let v1649 = &C::sinkable_load(ctx, v1632.1);
16263
2.10k
                                                if let Some(
v16500
) = v1649 {
16264
0
                                                    let v1651 = C::def_inst(ctx, v1632.1);
16265
0
                                                    if let Some(v1652) = v1651 {
16266
0
                                                        let v1653 = &C::inst_data(ctx, v1652);
16267
                                                        if let &InstructionData::Load {
16268
0
                                                            opcode: ref v1654,
16269
0
                                                            arg: v1655,
16270
0
                                                            flags: v1656,
16271
0
                                                            offset: v1657,
16272
0
                                                        } = v1653 {
16273
0
                                                            if let &Opcode::Load = v1654 {
16274
0
                                                                if v1553 == v1656 {
16275
0
                                                                    if v1554 == v1657 {
16276
0
                                                                        if v1555.1 == v1655 {
16277
0
                                                                            let v1658 = &constructor_sink_load_to_reg_mem_imm(ctx, v1650);
16278
0
                                                                            let v1659 = &constructor_to_amode(ctx, v1656, v1655, v1657);
16279
0
                                                                            let v1660 = constructor_put_in_gpr(ctx, v1632.0);
16280
0
                                                                            let v1671 = &constructor_x64_or_mem(ctx, v1629, v1659, v1660);
16281
0
                                                                            let v1672 = constructor_side_effect(ctx, v1671);
16282
0
                                                                            // Rule at src/isa/x64/lower.isle line 3131.
16283
0
                                                                            return Some(v1672);
16284
0
                                                                        }
16285
0
                                                                    }
16286
0
                                                                }
16287
0
                                                            }
16288
0
                                                        }
16289
0
                                                    }
16290
2.10k
                                                }
16291
0
                                            }
16292
                                        }
16293
                                        &Opcode::Bxor => {
16294
222
                                            let v1577 = C::value_type(ctx, v1576);
16295
222
                                            let v1628 = C::ty_32_or_64(ctx, v1577);
16296
222
                                            if let Some(v1629) = v1628 {
16297
222
                                                let v1632 = C::unpack_value_array_2(ctx, v1631);
16298
222
                                                let v1635 = &C::sinkable_load(ctx, v1632.0);
16299
222
                                                if let Some(
v16360
) = v1635 {
16300
0
                                                    let v1637 = C::def_inst(ctx, v1632.0);
16301
0
                                                    if let Some(v1638) = v1637 {
16302
0
                                                        let v1639 = &C::inst_data(ctx, v1638);
16303
                                                        if let &InstructionData::Load {
16304
0
                                                            opcode: ref v1640,
16305
0
                                                            arg: v1641,
16306
0
                                                            flags: v1642,
16307
0
                                                            offset: v1643,
16308
0
                                                        } = v1639 {
16309
0
                                                            if let &Opcode::Load = v1640 {
16310
0
                                                                if v1553 == v1642 {
16311
0
                                                                    if v1554 == v1643 {
16312
0
                                                                        if v1555.1 == v1641 {
16313
0
                                                                            let v1644 = &constructor_sink_load_to_reg_mem_imm(ctx, v1636);
16314
0
                                                                            let v1645 = &constructor_to_amode(ctx, v1642, v1641, v1643);
16315
0
                                                                            let v1646 = constructor_put_in_gpr(ctx, v1632.1);
16316
0
                                                                            let v1673 = &constructor_x64_xor_mem(ctx, v1629, v1645, v1646);
16317
0
                                                                            let v1674 = constructor_side_effect(ctx, v1673);
16318
0
                                                                            // Rule at src/isa/x64/lower.isle line 3145.
16319
0
                                                                            return Some(v1674);
16320
0
                                                                        }
16321
0
                                                                    }
16322
0
                                                                }
16323
0
                                                            }
16324
0
                                                        }
16325
0
                                                    }
16326
222
                                                }
16327
222
                                                let v1649 = &C::sinkable_load(ctx, v1632.1);
16328
222
                                                if let Some(
v16500
) = v1649 {
16329
0
                                                    let v1651 = C::def_inst(ctx, v1632.1);
16330
0
                                                    if let Some(v1652) = v1651 {
16331
0
                                                        let v1653 = &C::inst_data(ctx, v1652);
16332
                                                        if let &InstructionData::Load {
16333
0
                                                            opcode: ref v1654,
16334
0
                                                            arg: v1655,
16335
0
                                                            flags: v1656,
16336
0
                                                            offset: v1657,
16337
0
                                                        } = v1653 {
16338
0
                                                            if let &Opcode::Load = v1654 {
16339
0
                                                                if v1553 == v1656 {
16340
0
                                                                    if v1554 == v1657 {
16341
0
                                                                        if v1555.1 == v1655 {
16342
0
                                                                            let v1658 = &constructor_sink_load_to_reg_mem_imm(ctx, v1650);
16343
0
                                                                            let v1659 = &constructor_to_amode(ctx, v1656, v1655, v1657);
16344
0
                                                                            let v1660 = constructor_put_in_gpr(ctx, v1632.0);
16345
0
                                                                            let v1675 = &constructor_x64_xor_mem(ctx, v1629, v1659, v1660);
16346
0
                                                                            let v1676 = constructor_side_effect(ctx, v1675);
16347
0
                                                                            // Rule at src/isa/x64/lower.isle line 3159.
16348
0
                                                                            return Some(v1676);
16349
0
                                                                        }
16350
0
                                                                    }
16351
0
                                                                }
16352
0
                                                            }
16353
0
                                                        }
16354
0
                                                    }
16355
222
                                                }
16356
0
                                            }
16357
                                        }
16358
3.12k
                                        _ => {}
16359
                                    }
16360
                                }
16361
                                &InstructionData::BinaryImm8 {
16362
0
                                    opcode: ref v1611,
16363
0
                                    arg: v1612,
16364
0
                                    imm: v1613,
16365
0
                                } => {
16366
0
                                    if let &Opcode::Extractlane = v1611 {
16367
0
                                        let v1577 = C::value_type(ctx, v1576);
16368
0
                                        match v1577 {
16369
                                            I8 => {
16370
0
                                                let v441 = C::use_sse41(ctx);
16371
0
                                                if v441 == true {
16372
0
                                                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16373
0
                                                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16374
0
                                                    let v1615 = constructor_put_in_xmm(ctx, v1612);
16375
0
                                                    let v1614 = C::u8_from_uimm8(ctx, v1613);
16376
0
                                                    let v1620 = &constructor_x64_pextrb_store(ctx, v1563, v1615, v1614);
16377
0
                                                    let v1621 = constructor_side_effect(ctx, v1620);
16378
0
                                                    // Rule at src/isa/x64/lower.isle line 3015.
16379
0
                                                    return Some(v1621);
16380
0
                                                }
16381
                                            }
16382
                                            I16 => {
16383
0
                                                let v441 = C::use_sse41(ctx);
16384
0
                                                if v441 == true {
16385
0
                                                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16386
0
                                                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16387
0
                                                    let v1615 = constructor_put_in_xmm(ctx, v1612);
16388
0
                                                    let v1614 = C::u8_from_uimm8(ctx, v1613);
16389
0
                                                    let v1622 = &constructor_x64_pextrw_store(ctx, v1563, v1615, v1614);
16390
0
                                                    let v1623 = constructor_side_effect(ctx, v1622);
16391
0
                                                    // Rule at src/isa/x64/lower.isle line 3022.
16392
0
                                                    return Some(v1623);
16393
0
                                                }
16394
                                            }
16395
                                            I32 => {
16396
0
                                                let v441 = C::use_sse41(ctx);
16397
0
                                                if v441 == true {
16398
0
                                                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16399
0
                                                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16400
0
                                                    let v1615 = constructor_put_in_xmm(ctx, v1612);
16401
0
                                                    let v1614 = C::u8_from_uimm8(ctx, v1613);
16402
0
                                                    let v1624 = &constructor_x64_pextrd_store(ctx, v1563, v1615, v1614);
16403
0
                                                    let v1625 = constructor_side_effect(ctx, v1624);
16404
0
                                                    // Rule at src/isa/x64/lower.isle line 3029.
16405
0
                                                    return Some(v1625);
16406
0
                                                }
16407
                                            }
16408
                                            I64 => {
16409
0
                                                let v441 = C::use_sse41(ctx);
16410
0
                                                if v441 == true {
16411
0
                                                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16412
0
                                                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16413
0
                                                    let v1615 = constructor_put_in_xmm(ctx, v1612);
16414
0
                                                    let v1614 = C::u8_from_uimm8(ctx, v1613);
16415
0
                                                    let v1626 = &constructor_x64_pextrq_store(ctx, v1563, v1615, v1614);
16416
0
                                                    let v1627 = constructor_side_effect(ctx, v1626);
16417
0
                                                    // Rule at src/isa/x64/lower.isle line 3036.
16418
0
                                                    return Some(v1627);
16419
0
                                                }
16420
                                            }
16421
                                            F32 => {
16422
0
                                                let v1614 = C::u8_from_uimm8(ctx, v1613);
16423
0
                                                if v1614 == 0x0 {
16424
0
                                                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16425
0
                                                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16426
0
                                                    let v1615 = constructor_put_in_xmm(ctx, v1612);
16427
0
                                                    let v1616 = &constructor_x64_movss_store(ctx, v1563, v1615);
16428
0
                                                    let v1617 = constructor_side_effect(ctx, v1616);
16429
0
                                                    // Rule at src/isa/x64/lower.isle line 3003.
16430
0
                                                    return Some(v1617);
16431
0
                                                }
16432
                                            }
16433
                                            F64 => {
16434
0
                                                let v1614 = C::u8_from_uimm8(ctx, v1613);
16435
0
                                                if v1614 == 0x0 {
16436
0
                                                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16437
0
                                                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16438
0
                                                    let v1615 = constructor_put_in_xmm(ctx, v1612);
16439
0
                                                    let v1618 = &constructor_x64_movsd_store(ctx, v1563, v1615);
16440
0
                                                    let v1619 = constructor_side_effect(ctx, v1618);
16441
0
                                                    // Rule at src/isa/x64/lower.isle line 3009.
16442
0
                                                    return Some(v1619);
16443
0
                                                }
16444
                                            }
16445
0
                                            _ => {}
16446
                                        }
16447
0
                                    }
16448
                                }
16449
                                &InstructionData::UnaryImm {
16450
312k
                                    opcode: ref v1581,
16451
312k
                                    imm: v1582,
16452
312k
                                } => {
16453
312k
                                    if let &Opcode::Iconst = v1581 {
16454
312k
                                        let v1577 = C::value_type(ctx, v1576);
16455
312k
                                        let v1578 = C::fits_in_64(ctx, v1577);
16456
312k
                                        if let Some(v1579) = v1578 {
16457
312k
                                            let v1583 = C::simm32(ctx, v1582);
16458
312k
                                            if let Some(
v1584259k
) = v1583 {
16459
259k
                                                let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16460
259k
                                                let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16461
259k
                                                let v1585 = &constructor_x64_movimm_m(ctx, v1579, v1563, v1584);
16462
259k
                                                let v1586 = constructor_side_effect(ctx, v1585);
16463
259k
                                                // Rule at src/isa/x64/lower.isle line 2939.
16464
259k
                                                return Some(v1586);
16465
53.3k
                                            }
16466
0
                                        }
16467
0
                                    }
16468
                                }
16469
409k
                                _ => {}
16470
                            }
16471
0
                        }
16472
43.6k
                    }
16473
635k
                    let v1558 = C::value_type(ctx, v1555.0);
16474
635k
                    match v1558 {
16475
                        I128 => {
16476
0
                            let v1600 = C::put_in_regs(ctx, v1555.0);
16477
0
                            let v1601 = constructor_value_regs_get_gpr(ctx, v1600, 0x0);
16478
0
                            let v1602 = constructor_value_regs_get_gpr(ctx, v1600, 0x1);
16479
0
                            let v1603 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16480
0
                            let v1604 = &C::amode_offset(ctx, v1603, 0x8);
16481
0
                            let v1605 = &C::amode_to_synthetic_amode(ctx, v1603);
16482
0
                            let v1606 = &constructor_x64_movrm(ctx, I64, v1605, v1601);
16483
0
                            let v1607 = &C::amode_to_synthetic_amode(ctx, v1604);
16484
0
                            let v1608 = &constructor_x64_movrm(ctx, I64, v1607, v1602);
16485
0
                            let v1609 = &constructor_side_effect_concat(ctx, v1606, v1608);
16486
0
                            let v1610 = constructor_side_effect(ctx, v1609);
16487
0
                            // Rule at src/isa/x64/lower.isle line 2984.
16488
0
                            return Some(v1610);
16489
                        }
16490
                        F32 => {
16491
0
                            let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16492
0
                            let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16493
0
                            let v1587 = constructor_put_in_xmm(ctx, v1555.0);
16494
0
                            let v1588 = &constructor_x64_movss_store(ctx, v1563, v1587);
16495
0
                            let v1589 = constructor_side_effect(ctx, v1588);
16496
0
                            // Rule at src/isa/x64/lower.isle line 2944.
16497
0
                            return Some(v1589);
16498
                        }
16499
                        F64 => {
16500
1
                            let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16501
1
                            let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16502
1
                            let v1587 = constructor_put_in_xmm(ctx, v1555.0);
16503
1
                            let v1590 = &constructor_x64_movsd_store(ctx, v1563, v1587);
16504
1
                            let v1591 = constructor_side_effect(ctx, v1590);
16505
1
                            // Rule at src/isa/x64/lower.isle line 2952.
16506
1
                            return Some(v1591);
16507
                        }
16508
                        F32X4 => {
16509
0
                            let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16510
0
                            let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16511
0
                            let v1587 = constructor_put_in_xmm(ctx, v1555.0);
16512
0
                            let v1592 = &constructor_x64_movups_store(ctx, v1563, v1587);
16513
0
                            let v1593 = constructor_side_effect(ctx, v1592);
16514
0
                            // Rule at src/isa/x64/lower.isle line 2960.
16515
0
                            return Some(v1593);
16516
                        }
16517
                        F64X2 => {
16518
0
                            let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16519
0
                            let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16520
0
                            let v1587 = constructor_put_in_xmm(ctx, v1555.0);
16521
0
                            let v1594 = &constructor_x64_movupd_store(ctx, v1563, v1587);
16522
0
                            let v1595 = constructor_side_effect(ctx, v1594);
16523
0
                            // Rule at src/isa/x64/lower.isle line 2968.
16524
0
                            return Some(v1595);
16525
                        }
16526
635k
                        _ => {}
16527
635k
                    }
16528
635k
                    let v1596 = C::ty_vec128_int(ctx, v1558);
16529
635k
                    if let Some(
v15970
) = v1596 {
16530
0
                        let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16531
0
                        let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16532
0
                        let v1587 = constructor_put_in_xmm(ctx, v1555.0);
16533
0
                        let v1598 = &constructor_x64_movdqu_store(ctx, v1563, v1587);
16534
0
                        let v1599 = constructor_side_effect(ctx, v1598);
16535
0
                        // Rule at src/isa/x64/lower.isle line 2976.
16536
0
                        return Some(v1599);
16537
635k
                    }
16538
635k
                    let v1559 = &C::type_register_class(ctx, v1558);
16539
635k
                    if let Some(v1560) = v1559 {
16540
                        if let &RegisterClass::Gpr {
16541
635k
                            single_register: v1561,
16542
635k
                        } = v1560 {
16543
635k
                            let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16544
635k
                            let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16545
635k
                            let v1564 = constructor_put_in_gpr(ctx, v1555.0);
16546
635k
                            let v1565 = &constructor_x64_movrm(ctx, v1558, v1563, v1564);
16547
635k
                            let v1566 = constructor_side_effect(ctx, v1565);
16548
635k
                            // Rule at src/isa/x64/lower.isle line 2920.
16549
635k
                            return Some(v1566);
16550
0
                        }
16551
0
                    }
16552
                }
16553
                &Opcode::Istore8 => {
16554
74.0k
                    let v1555 = C::unpack_value_array_2(ctx, v1552);
16555
74.0k
                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16556
74.0k
                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16557
74.0k
                    let v1564 = constructor_put_in_gpr(ctx, v1555.0);
16558
74.0k
                    let v1567 = &constructor_x64_movrm(ctx, I8, v1563, v1564);
16559
74.0k
                    let v1568 = constructor_side_effect(ctx, v1567);
16560
74.0k
                    // Rule at src/isa/x64/lower.isle line 2928.
16561
74.0k
                    return Some(v1568);
16562
                }
16563
                &Opcode::Istore16 => {
16564
19.1k
                    let v1555 = C::unpack_value_array_2(ctx, v1552);
16565
19.1k
                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16566
19.1k
                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16567
19.1k
                    let v1564 = constructor_put_in_gpr(ctx, v1555.0);
16568
19.1k
                    let v1569 = &constructor_x64_movrm(ctx, I16, v1563, v1564);
16569
19.1k
                    let v1570 = constructor_side_effect(ctx, v1569);
16570
19.1k
                    // Rule at src/isa/x64/lower.isle line 2931.
16571
19.1k
                    return Some(v1570);
16572
                }
16573
                &Opcode::Istore32 => {
16574
1.35k
                    let v1555 = C::unpack_value_array_2(ctx, v1552);
16575
1.35k
                    let v1562 = &constructor_to_amode(ctx, v1553, v1555.1, v1554);
16576
1.35k
                    let v1563 = &C::amode_to_synthetic_amode(ctx, v1562);
16577
1.35k
                    let v1564 = constructor_put_in_gpr(ctx, v1555.0);
16578
1.35k
                    let v1571 = &constructor_x64_movrm(ctx, I32, v1563, v1564);
16579
1.35k
                    let v1572 = constructor_side_effect(ctx, v1571);
16580
1.35k
                    // Rule at src/isa/x64/lower.isle line 2934.
16581
1.35k
                    return Some(v1572);
16582
                }
16583
0
                _ => {}
16584
            }
16585
        }
16586
        &InstructionData::StoreNoOffset {
16587
0
            opcode: ref v1710,
16588
0
            args: ref v1711,
16589
0
            flags: v1712,
16590
0
        } => {
16591
0
            if let &Opcode::AtomicStore = v1710 {
16592
0
                let v1713 = C::unpack_value_array_2(ctx, v1711);
16593
0
                let v1716 = C::value_type(ctx, v1713.0);
16594
0
                let v1717 = C::fits_in_64(ctx, v1716);
16595
0
                if let Some(v1718) = v1717 {
16596
0
                    let v1719 = C::ty_int(ctx, v1716);
16597
0
                    if let Some(v1720) = v1719 {
16598
0
                        let v48 = C::zero_offset(ctx);
16599
0
                        let v1721 = &constructor_to_amode(ctx, v1712, v1713.1, v48);
16600
0
                        let v1722 = &C::amode_to_synthetic_amode(ctx, v1721);
16601
0
                        let v1723 = constructor_put_in_gpr(ctx, v1713.0);
16602
0
                        let v1724 = &constructor_x64_movrm(ctx, v1718, v1722, v1723);
16603
0
                        let v1725 = &constructor_x64_mfence(ctx);
16604
0
                        let v1726 = &constructor_side_effect_concat(ctx, v1724, v1725);
16605
0
                        let v1727 = constructor_side_effect(ctx, v1726);
16606
0
                        // Rule at src/isa/x64/lower.isle line 3206.
16607
0
                        return Some(v1727);
16608
0
                    }
16609
0
                }
16610
0
            }
16611
        }
16612
        &InstructionData::Ternary {
16613
54.3k
            opcode: ref v634,
16614
54.3k
            args: ref v635,
16615
54.3k
        } => {
16616
54.3k
            match v634 {
16617
                &Opcode::Select => {
16618
24.2k
                    let v1 = C::first_result(ctx, arg0);
16619
24.2k
                    if let Some(v2) = v1 {
16620
24.2k
                        let v636 = C::unpack_value_array_3(ctx, v635);
16621
24.2k
                        let v1007 = C::maybe_uextend(ctx, v636.0);
16622
24.2k
                        if let Some(v1008) = v1007 {
16623
24.2k
                            let v1009 = C::def_inst(ctx, v1008);
16624
24.2k
                            if let Some(
v101022.7k
) = v1009 {
16625
22.7k
                                let v1011 = &C::inst_data(ctx, v1010);
16626
22.7k
                                match v1011 {
16627
                                    &InstructionData::FloatCompare {
16628
0
                                        opcode: ref v1012,
16629
0
                                        args: ref v1013,
16630
0
                                        cond: ref v1014,
16631
0
                                    } => {
16632
0
                                        if let &Opcode::Fcmp = v1012 {
16633
0
                                            match v1014 {
16634
                                                &FloatCC::Equal => {
16635
0
                                                    let v1015 = C::unpack_value_array_2(ctx, v1013);
16636
0
                                                    let v1021 = &constructor_emit_fcmp(ctx, &FloatCC::NotEqual, v1015.0, v1015.1);
16637
0
                                                    let v3 = C::value_type(ctx, v2);
16638
0
                                                    let v1022 = constructor_lower_select_fcmp(ctx, v3, v1021, v636.2, v636.1);
16639
0
                                                    // Rule at src/isa/x64/lower.isle line 2049.
16640
0
                                                    return Some(v1022);
16641
                                                }
16642
                                                &FloatCC::LessThan => {
16643
0
                                                    let v3 = C::value_type(ctx, v2);
16644
0
                                                    match v3 {
16645
                                                        F32 => {
16646
0
                                                            let v1015 = C::unpack_value_array_2(ctx, v1013);
16647
0
                                                            if v636.1 == v1015.1 {
16648
0
                                                                if v636.2 == v1015.0 {
16649
0
                                                                    let v1061 = constructor_put_in_xmm(ctx, v1015.1);
16650
0
                                                                    let v1062 = &C::put_in_xmm_mem(ctx, v1015.0);
16651
0
                                                                    let v1063 = constructor_x64_maxss(ctx, v1061, v1062);
16652
0
                                                                    let v1064 = constructor_output_xmm(ctx, v1063);
16653
0
                                                                    // Rule at src/isa/x64/lower.isle line 2088.
16654
0
                                                                    return Some(v1064);
16655
0
                                                                }
16656
0
                                                            }
16657
0
                                                            if v636.1 == v1015.0 {
16658
0
                                                                if v636.2 == v1015.1 {
16659
0
                                                                    let v1055 = constructor_put_in_xmm(ctx, v1015.0);
16660
0
                                                                    let v1056 = &C::put_in_xmm_mem(ctx, v1015.1);
16661
0
                                                                    let v1057 = constructor_x64_minss(ctx, v1055, v1056);
16662
0
                                                                    let v1058 = constructor_output_xmm(ctx, v1057);
16663
0
                                                                    // Rule at src/isa/x64/lower.isle line 2084.
16664
0
                                                                    return Some(v1058);
16665
0
                                                                }
16666
0
                                                            }
16667
                                                        }
16668
                                                        F64 => {
16669
0
                                                            let v1015 = C::unpack_value_array_2(ctx, v1013);
16670
0
                                                            if v636.1 == v1015.1 {
16671
0
                                                                if v636.2 == v1015.0 {
16672
0
                                                                    let v1061 = constructor_put_in_xmm(ctx, v1015.1);
16673
0
                                                                    let v1062 = &C::put_in_xmm_mem(ctx, v1015.0);
16674
0
                                                                    let v1065 = constructor_x64_maxsd(ctx, v1061, v1062);
16675
0
                                                                    let v1066 = constructor_output_xmm(ctx, v1065);
16676
0
                                                                    // Rule at src/isa/x64/lower.isle line 2090.
16677
0
                                                                    return Some(v1066);
16678
0
                                                                }
16679
0
                                                            }
16680
0
                                                            if v636.1 == v1015.0 {
16681
0
                                                                if v636.2 == v1015.1 {
16682
0
                                                                    let v1055 = constructor_put_in_xmm(ctx, v1015.0);
16683
0
                                                                    let v1056 = &C::put_in_xmm_mem(ctx, v1015.1);
16684
0
                                                                    let v1059 = constructor_x64_minsd(ctx, v1055, v1056);
16685
0
                                                                    let v1060 = constructor_output_xmm(ctx, v1059);
16686
0
                                                                    // Rule at src/isa/x64/lower.isle line 2086.
16687
0
                                                                    return Some(v1060);
16688
0
                                                                }
16689
0
                                                            }
16690
                                                        }
16691
0
                                                        _ => {}
16692
                                                    }
16693
                                                }
16694
0
                                                _ => {}
16695
                                            }
16696
0
                                            let v1015 = C::unpack_value_array_2(ctx, v1013);
16697
0
                                            let v1018 = &constructor_emit_fcmp(ctx, v1014, v1015.0, v1015.1);
16698
0
                                            let v3 = C::value_type(ctx, v2);
16699
0
                                            let v1019 = constructor_lower_select_fcmp(ctx, v3, v1018, v636.1, v636.2);
16700
0
                                            // Rule at src/isa/x64/lower.isle line 2047.
16701
0
                                            return Some(v1019);
16702
0
                                        }
16703
                                    }
16704
                                    &InstructionData::IntCompare {
16705
14.0k
                                        opcode: ref v1023,
16706
14.0k
                                        args: ref v1024,
16707
14.0k
                                        cond: ref v1025,
16708
14.0k
                                    } => {
16709
14.0k
                                        if let &Opcode::Icmp = v1023 {
16710
14.0k
                                            let v1026 = C::unpack_value_array_2(ctx, v1024);
16711
14.0k
                                            let v1029 = C::value_type(ctx, v1026.0);
16712
14.0k
                                            let v1030 = C::fits_in_64(ctx, v1029);
16713
14.0k
                                            if let Some(v1031) = v1030 {
16714
14.0k
                                                let v1032 = &C::raw_operand_size_of_type(ctx, v1031);
16715
14.0k
                                                let v1033 = &constructor_put_in_gpr_mem_imm(ctx, v1026.1);
16716
14.0k
                                                let v1034 = constructor_put_in_gpr(ctx, v1026.0);
16717
14.0k
                                                let v1035 = &constructor_x64_cmp(ctx, v1032, v1033, v1034);
16718
14.0k
                                                let v1036 = &C::intcc_to_cc(ctx, v1025);
16719
14.0k
                                                let v3 = C::value_type(ctx, v2);
16720
14.0k
                                                let v1037 = &constructor_cmove_from_values(ctx, v3, v1036, v636.1, v636.2);
16721
14.0k
                                                let v1038 = constructor_with_flags(ctx, v1035, v1037);
16722
14.0k
                                                let v1039 = C::output(ctx, v1038);
16723
14.0k
                                                // Rule at src/isa/x64/lower.isle line 2063.
16724
14.0k
                                                return Some(v1039);
16725
0
                                            }
16726
0
                                        }
16727
                                    }
16728
8.69k
                                    _ => {}
16729
                                }
16730
1.46k
                            }
16731
0
                        }
16732
10.1k
                        let v1040 = C::value_type(ctx, v636.0);
16733
10.1k
                        let v1041 = C::fits_in_64(ctx, v1040);
16734
10.1k
                        if let Some(v1042) = v1041 {
16735
10.1k
                            let v1043 = &C::raw_operand_size_of_type(ctx, v1042);
16736
10.1k
                            let v1044 = constructor_put_in_gpr(ctx, v636.0);
16737
10.1k
                            let v1045 = &C::gpr_to_gpr_mem_imm(ctx, v1044);
16738
10.1k
                            let v1046 = &constructor_x64_test(ctx, v1043, v1045, v1044);
16739
10.1k
                            let v3 = C::value_type(ctx, v2);
16740
10.1k
                            let v1048 = &constructor_cmove_from_values(ctx, v3, &CC::NZ, v636.1, v636.2);
16741
10.1k
                            let v1049 = constructor_with_flags(ctx, v1046, v1048);
16742
10.1k
                            let v1050 = C::output(ctx, v1049);
16743
10.1k
                            // Rule at src/isa/x64/lower.isle line 2070.
16744
10.1k
                            return Some(v1050);
16745
0
                        }
16746
0
                        if v1040 == I128 {
16747
0
                            let v683 = C::put_in_regs(ctx, v636.0);
16748
0
                            let v1052 = &constructor_cmp_zero_i128(ctx, &CC::Z, v683);
16749
0
                            let v1053 = constructor_select_icmp(ctx, v1052, v636.1, v636.2);
16750
0
                            let v1054 = C::output(ctx, v1053);
16751
0
                            // Rule at src/isa/x64/lower.isle line 2077.
16752
0
                            return Some(v1054);
16753
0
                        }
16754
0
                    }
16755
                }
16756
                &Opcode::SelectSpectreGuard => {
16757
30.1k
                    let v636 = C::unpack_value_array_3(ctx, v635);
16758
30.1k
                    let v656 = C::def_inst(ctx, v636.0);
16759
30.1k
                    if let Some(v657) = v656 {
16760
30.1k
                        let v658 = &C::inst_data(ctx, v657);
16761
                        if let &InstructionData::IntCompare {
16762
30.1k
                            opcode: ref v1783,
16763
30.1k
                            args: ref v1784,
16764
30.1k
                            cond: ref v1785,
16765
30.1k
                        } = v658 {
16766
30.1k
                            if let &Opcode::Icmp = v1783 {
16767
30.1k
                                let v1786 = C::unpack_value_array_2(ctx, v1784);
16768
30.1k
                                let v1789 = &constructor_emit_cmp(ctx, v1785, v1786.0, v1786.1);
16769
30.1k
                                let v1790 = constructor_select_icmp(ctx, v1789, v636.1, v636.2);
16770
30.1k
                                let v1791 = C::output(ctx, v1790);
16771
30.1k
                                // Rule at src/isa/x64/lower.isle line 3325.
16772
30.1k
                                return Some(v1791);
16773
0
                            }
16774
0
                        }
16775
0
                    }
16776
0
                    let v1 = C::first_result(ctx, arg0);
16777
0
                    if let Some(v2) = v1 {
16778
0
                        let v1040 = C::value_type(ctx, v636.0);
16779
0
                        let v1041 = C::fits_in_64(ctx, v1040);
16780
0
                        if let Some(v1042) = v1041 {
16781
0
                            let v1043 = &C::raw_operand_size_of_type(ctx, v1042);
16782
0
                            let v1044 = constructor_put_in_gpr(ctx, v636.0);
16783
0
                            let v1045 = &C::gpr_to_gpr_mem_imm(ctx, v1044);
16784
0
                            let v1046 = &constructor_x64_test(ctx, v1043, v1045, v1044);
16785
0
                            let v3 = C::value_type(ctx, v2);
16786
0
                            let v1048 = &constructor_cmove_from_values(ctx, v3, &CC::NZ, v636.1, v636.2);
16787
0
                            let v1049 = constructor_with_flags(ctx, v1046, v1048);
16788
0
                            let v1050 = C::output(ctx, v1049);
16789
0
                            // Rule at src/isa/x64/lower.isle line 3328.
16790
0
                            return Some(v1050);
16791
0
                        }
16792
0
                        if v1040 == I128 {
16793
0
                            let v683 = C::put_in_regs(ctx, v636.0);
16794
0
                            let v1052 = &constructor_cmp_zero_i128(ctx, &CC::Z, v683);
16795
0
                            let v1053 = constructor_select_icmp(ctx, v1052, v636.1, v636.2);
16796
0
                            let v1054 = C::output(ctx, v1053);
16797
0
                            // Rule at src/isa/x64/lower.isle line 3333.
16798
0
                            return Some(v1054);
16799
0
                        }
16800
0
                    }
16801
                }
16802
                &Opcode::Bitselect => {
16803
0
                    let v1 = C::first_result(ctx, arg0);
16804
0
                    if let Some(v2) = v1 {
16805
0
                        let v3 = C::value_type(ctx, v2);
16806
0
                        let v162 = C::ty_scalar_float(ctx, v3);
16807
0
                        if let Some(v163) = v162 {
16808
0
                            let v636 = C::unpack_value_array_3(ctx, v635);
16809
0
                            let v640 = constructor_put_in_xmm(ctx, v636.0);
16810
0
                            let v652 = &C::put_in_xmm_mem(ctx, v636.1);
16811
0
                            let v703 = constructor_sse_and(ctx, v163, v640, v652);
16812
0
                            let v704 = constructor_put_in_xmm(ctx, v636.0);
16813
0
                            let v705 = constructor_vector_all_ones(ctx);
16814
0
                            let v706 = &C::xmm_to_xmm_mem(ctx, v705);
16815
0
                            let v707 = constructor_x64_xor_vector(ctx, v163, v704, v706);
16816
0
                            let v708 = &C::put_in_xmm_mem(ctx, v636.2);
16817
0
                            let v709 = constructor_sse_and(ctx, v163, v707, v708);
16818
0
                            let v710 = &C::xmm_to_xmm_mem(ctx, v709);
16819
0
                            let v711 = constructor_sse_or(ctx, v163, v703, v710);
16820
0
                            let v712 = constructor_output_xmm(ctx, v711);
16821
0
                            // Rule at src/isa/x64/lower.isle line 1437.
16822
0
                            return Some(v712);
16823
0
                        }
16824
0
                        let v691 = C::ty_int_ref_scalar_64_extract(ctx, v3);
16825
0
                        if let Some(v692) = v691 {
16826
0
                            let v636 = C::unpack_value_array_3(ctx, v635);
16827
0
                            let v693 = constructor_put_in_gpr(ctx, v636.0);
16828
0
                            let v694 = &constructor_put_in_gpr_mem_imm(ctx, v636.1);
16829
0
                            let v695 = constructor_x64_and(ctx, v692, v693, v694);
16830
0
                            let v696 = constructor_put_in_gpr(ctx, v636.0);
16831
0
                            let v697 = constructor_x64_not(ctx, v692, v696);
16832
0
                            let v698 = &constructor_put_in_gpr_mem_imm(ctx, v636.2);
16833
0
                            let v699 = constructor_x64_and(ctx, v692, v697, v698);
16834
0
                            let v700 = &C::gpr_to_gpr_mem_imm(ctx, v699);
16835
0
                            let v701 = constructor_x64_or(ctx, v692, v695, v700);
16836
0
                            let v702 = constructor_output_gpr(ctx, v701);
16837
0
                            // Rule at src/isa/x64/lower.isle line 1432.
16838
0
                            return Some(v702);
16839
0
                        }
16840
0
                        match v3 {
16841
                            I128 => {
16842
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
16843
0
                                let v683 = C::put_in_regs(ctx, v636.0);
16844
0
                                let v684 = C::put_in_regs(ctx, v636.1);
16845
0
                                let v685 = constructor_and_i128(ctx, v683, v684);
16846
0
                                let v686 = constructor_i128_not(ctx, v636.0);
16847
0
                                let v687 = C::put_in_regs(ctx, v636.2);
16848
0
                                let v688 = constructor_and_i128(ctx, v686, v687);
16849
0
                                let v689 = constructor_or_i128(ctx, v685, v688);
16850
0
                                let v690 = C::output(ctx, v689);
16851
0
                                // Rule at src/isa/x64/lower.isle line 1427.
16852
0
                                return Some(v690);
16853
                            }
16854
                            F32X4 => {
16855
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
16856
0
                                let v656 = C::def_inst(ctx, v636.0);
16857
0
                                if let Some(v657) = v656 {
16858
0
                                    let v658 = &C::inst_data(ctx, v657);
16859
                                    if let &InstructionData::LoadNoOffset {
16860
0
                                        opcode: ref v659,
16861
0
                                        arg: v660,
16862
0
                                        flags: v661,
16863
0
                                    } = v658 {
16864
0
                                        if let &Opcode::Bitcast = v659 {
16865
0
                                            let v662 = C::def_inst(ctx, v660);
16866
0
                                            if let Some(v663) = v662 {
16867
0
                                                let v664 = &C::inst_data(ctx, v663);
16868
                                                if let &InstructionData::FloatCompare {
16869
0
                                                    opcode: ref v665,
16870
0
                                                    args: ref v666,
16871
0
                                                    cond: ref v667,
16872
0
                                                } = v664 {
16873
0
                                                    if let &Opcode::Fcmp = v665 {
16874
0
                                                        if let &FloatCC::LessThan = v667 {
16875
0
                                                            let v668 = C::unpack_value_array_2(ctx, v666);
16876
0
                                                            if v636.1 == v668.1 {
16877
0
                                                                if v636.2 == v668.0 {
16878
0
                                                                    let v677 = constructor_put_in_xmm(ctx, v668.1);
16879
0
                                                                    let v678 = &C::put_in_xmm_mem(ctx, v668.0);
16880
0
                                                                    let v679 = constructor_x64_maxps(ctx, v677, v678);
16881
0
                                                                    let v680 = constructor_output_xmm(ctx, v679);
16882
0
                                                                    // Rule at src/isa/x64/lower.isle line 1420.
16883
0
                                                                    return Some(v680);
16884
0
                                                                }
16885
0
                                                            }
16886
0
                                                            if v636.1 == v668.0 {
16887
0
                                                                if v636.2 == v668.1 {
16888
0
                                                                    let v671 = constructor_put_in_xmm(ctx, v668.0);
16889
0
                                                                    let v672 = &C::put_in_xmm_mem(ctx, v668.1);
16890
0
                                                                    let v673 = constructor_x64_minps(ctx, v671, v672);
16891
0
                                                                    let v674 = constructor_output_xmm(ctx, v673);
16892
0
                                                                    // Rule at src/isa/x64/lower.isle line 1415.
16893
0
                                                                    return Some(v674);
16894
0
                                                                }
16895
0
                                                            }
16896
0
                                                        }
16897
0
                                                    }
16898
0
                                                }
16899
0
                                            }
16900
0
                                        }
16901
0
                                    }
16902
0
                                }
16903
                            }
16904
                            F64X2 => {
16905
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
16906
0
                                let v656 = C::def_inst(ctx, v636.0);
16907
0
                                if let Some(v657) = v656 {
16908
0
                                    let v658 = &C::inst_data(ctx, v657);
16909
                                    if let &InstructionData::LoadNoOffset {
16910
0
                                        opcode: ref v659,
16911
0
                                        arg: v660,
16912
0
                                        flags: v661,
16913
0
                                    } = v658 {
16914
0
                                        if let &Opcode::Bitcast = v659 {
16915
0
                                            let v662 = C::def_inst(ctx, v660);
16916
0
                                            if let Some(v663) = v662 {
16917
0
                                                let v664 = &C::inst_data(ctx, v663);
16918
                                                if let &InstructionData::FloatCompare {
16919
0
                                                    opcode: ref v665,
16920
0
                                                    args: ref v666,
16921
0
                                                    cond: ref v667,
16922
0
                                                } = v664 {
16923
0
                                                    if let &Opcode::Fcmp = v665 {
16924
0
                                                        if let &FloatCC::LessThan = v667 {
16925
0
                                                            let v668 = C::unpack_value_array_2(ctx, v666);
16926
0
                                                            if v636.1 == v668.1 {
16927
0
                                                                if v636.2 == v668.0 {
16928
0
                                                                    let v677 = constructor_put_in_xmm(ctx, v668.1);
16929
0
                                                                    let v678 = &C::put_in_xmm_mem(ctx, v668.0);
16930
0
                                                                    let v681 = constructor_x64_maxpd(ctx, v677, v678);
16931
0
                                                                    let v682 = constructor_output_xmm(ctx, v681);
16932
0
                                                                    // Rule at src/isa/x64/lower.isle line 1422.
16933
0
                                                                    return Some(v682);
16934
0
                                                                }
16935
0
                                                            }
16936
0
                                                            if v636.1 == v668.0 {
16937
0
                                                                if v636.2 == v668.1 {
16938
0
                                                                    let v671 = constructor_put_in_xmm(ctx, v668.0);
16939
0
                                                                    let v672 = &C::put_in_xmm_mem(ctx, v668.1);
16940
0
                                                                    let v675 = constructor_x64_minpd(ctx, v671, v672);
16941
0
                                                                    let v676 = constructor_output_xmm(ctx, v675);
16942
0
                                                                    // Rule at src/isa/x64/lower.isle line 1417.
16943
0
                                                                    return Some(v676);
16944
0
                                                                }
16945
0
                                                            }
16946
0
                                                        }
16947
0
                                                    }
16948
0
                                                }
16949
0
                                            }
16950
0
                                        }
16951
0
                                    }
16952
0
                                }
16953
                            }
16954
0
                            _ => {}
16955
                        }
16956
0
                        let v64 = C::multi_lane(ctx, v3);
16957
0
                        if let Some(v65) = v64 {
16958
0
                            let v441 = C::use_sse41(ctx);
16959
0
                            if v441 == true {
16960
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
16961
0
                                let v649 = constructor_all_ones_or_all_zeros(ctx, v636.0);
16962
0
                                if let Some(v650) = v649 {
16963
0
                                    let v651 = constructor_put_in_xmm(ctx, v636.2);
16964
0
                                    let v652 = &C::put_in_xmm_mem(ctx, v636.1);
16965
0
                                    let v653 = constructor_put_in_xmm(ctx, v636.0);
16966
0
                                    let v654 = constructor_x64_pblendvb(ctx, v651, v652, v653);
16967
0
                                    let v655 = constructor_output_xmm(ctx, v654);
16968
0
                                    // Rule at src/isa/x64/lower.isle line 1394.
16969
0
                                    return Some(v655);
16970
0
                                }
16971
0
                            }
16972
0
                            let v636 = C::unpack_value_array_3(ctx, v635);
16973
0
                            let v640 = constructor_put_in_xmm(ctx, v636.0);
16974
0
                            let v641 = constructor_put_in_xmm(ctx, v636.1);
16975
0
                            let v642 = &C::xmm_to_xmm_mem(ctx, v640);
16976
0
                            let v643 = constructor_sse_and(ctx, v3, v641, v642);
16977
0
                            let v644 = &C::put_in_xmm_mem(ctx, v636.2);
16978
0
                            let v645 = constructor_sse_and_not(ctx, v3, v640, v644);
16979
0
                            let v646 = &C::xmm_to_xmm_mem(ctx, v643);
16980
0
                            let v647 = constructor_sse_or(ctx, v3, v645, v646);
16981
0
                            let v648 = constructor_output_xmm(ctx, v647);
16982
0
                            // Rule at src/isa/x64/lower.isle line 1380.
16983
0
                            return Some(v648);
16984
0
                        }
16985
0
                    }
16986
                }
16987
                &Opcode::X86Blendv => {
16988
0
                    let v1 = C::first_result(ctx, arg0);
16989
0
                    if let Some(v2) = v1 {
16990
0
                        let v3 = C::value_type(ctx, v2);
16991
0
                        match v3 {
16992
                            I8X16 => {
16993
0
                                let v441 = C::use_sse41(ctx);
16994
0
                                if v441 == true {
16995
0
                                    let v636 = C::unpack_value_array_3(ctx, v635);
16996
0
                                    let v651 = constructor_put_in_xmm(ctx, v636.2);
16997
0
                                    let v652 = &C::put_in_xmm_mem(ctx, v636.1);
16998
0
                                    let v653 = constructor_put_in_xmm(ctx, v636.0);
16999
0
                                    let v654 = constructor_x64_pblendvb(ctx, v651, v652, v653);
17000
0
                                    let v655 = constructor_output_xmm(ctx, v654);
17001
0
                                    // Rule at src/isa/x64/lower.isle line 1445.
17002
0
                                    return Some(v655);
17003
0
                                }
17004
                            }
17005
                            I32X4 => {
17006
0
                                let v441 = C::use_sse41(ctx);
17007
0
                                if v441 == true {
17008
0
                                    let v636 = C::unpack_value_array_3(ctx, v635);
17009
0
                                    let v651 = constructor_put_in_xmm(ctx, v636.2);
17010
0
                                    let v652 = &C::put_in_xmm_mem(ctx, v636.1);
17011
0
                                    let v653 = constructor_put_in_xmm(ctx, v636.0);
17012
0
                                    let v713 = constructor_x64_blendvps(ctx, v651, v652, v653);
17013
0
                                    let v714 = constructor_output_xmm(ctx, v713);
17014
0
                                    // Rule at src/isa/x64/lower.isle line 1450.
17015
0
                                    return Some(v714);
17016
0
                                }
17017
                            }
17018
                            I64X2 => {
17019
0
                                let v441 = C::use_sse41(ctx);
17020
0
                                if v441 == true {
17021
0
                                    let v636 = C::unpack_value_array_3(ctx, v635);
17022
0
                                    let v651 = constructor_put_in_xmm(ctx, v636.2);
17023
0
                                    let v652 = &C::put_in_xmm_mem(ctx, v636.1);
17024
0
                                    let v653 = constructor_put_in_xmm(ctx, v636.0);
17025
0
                                    let v715 = constructor_x64_blendvpd(ctx, v651, v652, v653);
17026
0
                                    let v716 = constructor_output_xmm(ctx, v715);
17027
0
                                    // Rule at src/isa/x64/lower.isle line 1455.
17028
0
                                    return Some(v716);
17029
0
                                }
17030
                            }
17031
0
                            _ => {}
17032
                        }
17033
0
                    }
17034
                }
17035
                &Opcode::Fma => {
17036
0
                    let v1 = C::first_result(ctx, arg0);
17037
0
                    if let Some(v2) = v1 {
17038
0
                        let v1470 = C::use_fma(ctx);
17039
0
                        if v1470 == true {
17040
0
                            let v3 = C::value_type(ctx, v2);
17041
0
                            let v636 = C::unpack_value_array_3(ctx, v635);
17042
0
                            let v1471 = constructor_fmadd(ctx, v3, v636.0, v636.1, v636.2);
17043
0
                            let v1472 = constructor_output_xmm(ctx, v1471);
17044
0
                            // Rule at src/isa/x64/lower.isle line 2799.
17045
0
                            return Some(v1472);
17046
0
                        }
17047
0
                        let v3 = C::value_type(ctx, v2);
17048
0
                        match v3 {
17049
                            F32 => {
17050
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
17051
0
                                let v1389 = C::put_in_reg(ctx, v636.0);
17052
0
                                let v1390 = C::put_in_reg(ctx, v636.1);
17053
0
                                let v1391 = C::put_in_reg(ctx, v636.2);
17054
0
                                let v1392 = C::libcall_3(ctx, &LibCall::FmaF32, v1389, v1390, v1391);
17055
0
                                let v1393 = constructor_output_reg(ctx, v1392);
17056
0
                                // Rule at src/isa/x64/lower.isle line 2754.
17057
0
                                return Some(v1393);
17058
                            }
17059
                            F64 => {
17060
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
17061
0
                                let v1389 = C::put_in_reg(ctx, v636.0);
17062
0
                                let v1390 = C::put_in_reg(ctx, v636.1);
17063
0
                                let v1391 = C::put_in_reg(ctx, v636.2);
17064
0
                                let v1395 = C::libcall_3(ctx, &LibCall::FmaF64, v1389, v1390, v1391);
17065
0
                                let v1396 = constructor_output_reg(ctx, v1395);
17066
0
                                // Rule at src/isa/x64/lower.isle line 2756.
17067
0
                                return Some(v1396);
17068
                            }
17069
                            F32X4 => {
17070
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
17071
0
                                let v640 = constructor_put_in_xmm(ctx, v636.0);
17072
0
                                let v641 = constructor_put_in_xmm(ctx, v636.1);
17073
0
                                let v1397 = constructor_put_in_xmm(ctx, v636.2);
17074
0
                                let v1398 = C::xmm_to_reg(ctx, v640);
17075
0
                                let v1399 = C::xmm_to_reg(ctx, v641);
17076
0
                                let v1400 = C::xmm_to_reg(ctx, v1397);
17077
0
                                let v1401 = C::libcall_3(ctx, &LibCall::FmaF32, v1398, v1399, v1400);
17078
0
                                let v1402 = C::xmm_new(ctx, v1401);
17079
0
                                let v1403 = &C::xmm_to_xmm_mem(ctx, v640);
17080
0
                                let v1405 = constructor_x64_pshufd(ctx, v1403, 0x1);
17081
0
                                let v1406 = C::xmm_to_reg(ctx, v1405);
17082
0
                                let v1407 = &C::xmm_to_xmm_mem(ctx, v641);
17083
0
                                let v1408 = constructor_x64_pshufd(ctx, v1407, 0x1);
17084
0
                                let v1409 = C::xmm_to_reg(ctx, v1408);
17085
0
                                let v1410 = &C::xmm_to_xmm_mem(ctx, v1397);
17086
0
                                let v1411 = constructor_x64_pshufd(ctx, v1410, 0x1);
17087
0
                                let v1412 = C::xmm_to_reg(ctx, v1411);
17088
0
                                let v1413 = C::libcall_3(ctx, &LibCall::FmaF32, v1406, v1409, v1412);
17089
0
                                let v1414 = C::xmm_new(ctx, v1413);
17090
0
                                let v1415 = &C::xmm_to_xmm_mem(ctx, v640);
17091
0
                                let v1417 = constructor_x64_pshufd(ctx, v1415, 0x2);
17092
0
                                let v1418 = C::xmm_to_reg(ctx, v1417);
17093
0
                                let v1419 = &C::xmm_to_xmm_mem(ctx, v641);
17094
0
                                let v1420 = constructor_x64_pshufd(ctx, v1419, 0x2);
17095
0
                                let v1421 = C::xmm_to_reg(ctx, v1420);
17096
0
                                let v1422 = &C::xmm_to_xmm_mem(ctx, v1397);
17097
0
                                let v1423 = constructor_x64_pshufd(ctx, v1422, 0x2);
17098
0
                                let v1424 = C::xmm_to_reg(ctx, v1423);
17099
0
                                let v1425 = C::libcall_3(ctx, &LibCall::FmaF32, v1418, v1421, v1424);
17100
0
                                let v1426 = C::xmm_new(ctx, v1425);
17101
0
                                let v1427 = &C::xmm_to_xmm_mem(ctx, v640);
17102
0
                                let v1429 = constructor_x64_pshufd(ctx, v1427, 0x3);
17103
0
                                let v1430 = C::xmm_to_reg(ctx, v1429);
17104
0
                                let v1431 = &C::xmm_to_xmm_mem(ctx, v641);
17105
0
                                let v1432 = constructor_x64_pshufd(ctx, v1431, 0x3);
17106
0
                                let v1433 = C::xmm_to_reg(ctx, v1432);
17107
0
                                let v1434 = &C::xmm_to_xmm_mem(ctx, v1397);
17108
0
                                let v1435 = constructor_x64_pshufd(ctx, v1434, 0x3);
17109
0
                                let v1436 = C::xmm_to_reg(ctx, v1435);
17110
0
                                let v1437 = C::libcall_3(ctx, &LibCall::FmaF32, v1430, v1433, v1436);
17111
0
                                let v1438 = C::xmm_new(ctx, v1437);
17112
0
                                let v1440 = C::xmm_to_reg(ctx, v1414);
17113
0
                                let v1441 = &constructor_xmm_to_reg_mem(ctx, v1440);
17114
0
                                let v1442 = &C::xmm_mem_to_reg_mem(ctx, v1441);
17115
0
                                let v1443 = constructor_vec_insert_lane(ctx, F32X4, v1402, v1442, 0x1);
17116
0
                                let v1444 = C::xmm_to_reg(ctx, v1426);
17117
0
                                let v1445 = &constructor_xmm_to_reg_mem(ctx, v1444);
17118
0
                                let v1446 = &C::xmm_mem_to_reg_mem(ctx, v1445);
17119
0
                                let v1447 = constructor_vec_insert_lane(ctx, F32X4, v1443, v1446, 0x2);
17120
0
                                let v1448 = C::xmm_to_reg(ctx, v1438);
17121
0
                                let v1449 = &constructor_xmm_to_reg_mem(ctx, v1448);
17122
0
                                let v1450 = &C::xmm_mem_to_reg_mem(ctx, v1449);
17123
0
                                let v1451 = constructor_vec_insert_lane(ctx, F32X4, v1447, v1450, 0x3);
17124
0
                                let v1452 = constructor_output_xmm(ctx, v1451);
17125
0
                                // Rule at src/isa/x64/lower.isle line 2759.
17126
0
                                return Some(v1452);
17127
                            }
17128
                            F64X2 => {
17129
0
                                let v636 = C::unpack_value_array_3(ctx, v635);
17130
0
                                let v640 = constructor_put_in_xmm(ctx, v636.0);
17131
0
                                let v641 = constructor_put_in_xmm(ctx, v636.1);
17132
0
                                let v1397 = constructor_put_in_xmm(ctx, v636.2);
17133
0
                                let v1398 = C::xmm_to_reg(ctx, v640);
17134
0
                                let v1399 = C::xmm_to_reg(ctx, v641);
17135
0
                                let v1400 = C::xmm_to_reg(ctx, v1397);
17136
0
                                let v1453 = C::libcall_3(ctx, &LibCall::FmaF64, v1398, v1399, v1400);
17137
0
                                let v1454 = C::xmm_new(ctx, v1453);
17138
0
                                let v1403 = &C::xmm_to_xmm_mem(ctx, v640);
17139
0
                                let v1456 = constructor_x64_pshufd(ctx, v1403, 0xEE);
17140
0
                                let v1457 = C::xmm_to_reg(ctx, v1456);
17141
0
                                let v1407 = &C::xmm_to_xmm_mem(ctx, v641);
17142
0
                                let v1458 = constructor_x64_pshufd(ctx, v1407, 0xEE);
17143
0
                                let v1459 = C::xmm_to_reg(ctx, v1458);
17144
0
                                let v1410 = &C::xmm_to_xmm_mem(ctx, v1397);
17145
0
                                let v1460 = constructor_x64_pshufd(ctx, v1410, 0xEE);
17146
0
                                let v1461 = C::xmm_to_reg(ctx, v1460);
17147
0
                                let v1462 = C::libcall_3(ctx, &LibCall::FmaF64, v1457, v1459, v1461);
17148
0
                                let v1463 = C::xmm_new(ctx, v1462);
17149
0
                                let v1465 = C::xmm_to_reg(ctx, v1463);
17150
0
                                let v1466 = &constructor_xmm_to_reg_mem(ctx, v1465);
17151
0
                                let v1467 = &C::xmm_mem_to_reg_mem(ctx, v1466);
17152
0
                                let v1468 = constructor_vec_insert_lane(ctx, F64X2, v1454, v1467, 0x1);
17153
0
                                let v1469 = constructor_output_xmm(ctx, v1468);
17154
0
                                // Rule at src/isa/x64/lower.isle line 2783.
17155
0
                                return Some(v1469);
17156
                            }
17157
0
                            _ => {}
17158
                        }
17159
0
                    }
17160
                }
17161
0
                _ => {}
17162
            }
17163
        }
17164
        &InstructionData::TernaryImm8 {
17165
0
            opcode: ref v717,
17166
0
            args: ref v718,
17167
0
            imm: v719,
17168
0
        } => {
17169
0
            if let &Opcode::Insertlane = v717 {
17170
0
                let v720 = C::unpack_value_array_2(ctx, v718);
17171
0
                let v725 = constructor_put_in_xmm(ctx, v720.0);
17172
0
                let v726 = &C::put_in_reg_mem(ctx, v720.1);
17173
0
                let v723 = C::value_type(ctx, v720.0);
17174
0
                let v724 = C::u8_from_uimm8(ctx, v719);
17175
0
                let v727 = constructor_vec_insert_lane(ctx, v723, v725, v726, v724);
17176
0
                let v728 = constructor_output_xmm(ctx, v727);
17177
0
                // Rule at src/isa/x64/lower.isle line 1462.
17178
0
                return Some(v728);
17179
0
            }
17180
        }
17181
        &InstructionData::Trap {
17182
157k
            opcode: ref v787,
17183
157k
            code: ref v788,
17184
157k
        } => {
17185
157k
            match v787 {
17186
                &Opcode::Trap => {
17187
157k
                    let v789 = &constructor_x64_ud2(ctx, v788);
17188
157k
                    let v790 = constructor_side_effect(ctx, v789);
17189
157k
                    // Rule at src/isa/x64/lower.isle line 1765.
17190
157k
                    return Some(v790);
17191
                }
17192
                &Opcode::ResumableTrap => {
17193
0
                    let v789 = &constructor_x64_ud2(ctx, v788);
17194
0
                    let v790 = constructor_side_effect(ctx, v789);
17195
0
                    // Rule at src/isa/x64/lower.isle line 1792.
17196
0
                    return Some(v790);
17197
                }
17198
0
                _ => {}
17199
            }
17200
        }
17201
        &InstructionData::Unary {
17202
816k
            opcode: ref v380,
17203
816k
            arg: v381,
17204
816k
        } => {
17205
816k
            match v380 {
17206
                &Opcode::Splat => {
17207
0
                    let v1 = C::first_result(ctx, arg0);
17208
0
                    if let Some(v2) = v1 {
17209
0
                        let v3 = C::value_type(ctx, v2);
17210
0
                        let v64 = C::multi_lane(ctx, v3);
17211
0
                        if let Some(v65) = v64 {
17212
0
                            match v65.0 {
17213
                                0x20 => {
17214
0
                                    if v65.1 == 0x4 {
17215
0
                                        let v2402 = &C::sinkable_load(ctx, v381);
17216
0
                                        if let Some(v2403) = v2402 {
17217
0
                                            let v2468 = C::use_avx(ctx);
17218
0
                                            if v2468 == true {
17219
0
                                                let v2469 = &constructor_sink_load_to_xmm_mem(ctx, v2403);
17220
0
                                                let v2470 = constructor_x64_vbroadcastss(ctx, v2469);
17221
0
                                                let v2471 = constructor_output_xmm(ctx, v2470);
17222
0
                                                // Rule at src/isa/x64/lower.isle line 4521.
17223
0
                                                return Some(v2471);
17224
0
                                            }
17225
0
                                            let v2406 = &C::sink_load(ctx, v2403);
17226
0
                                            let v2407 = constructor_x64_movss_load(ctx, v2406);
17227
0
                                            let v2465 = &C::xmm_to_xmm_mem(ctx, v2407);
17228
0
                                            let v2466 = constructor_x64_shufps(ctx, v2407, v2465, 0x0);
17229
0
                                            let v2467 = constructor_output_xmm(ctx, v2466);
17230
0
                                            // Rule at src/isa/x64/lower.isle line 4518.
17231
0
                                            return Some(v2467);
17232
0
                                        }
17233
0
                                    }
17234
                                }
17235
                                0x40 => {
17236
0
                                    if v65.1 == 0x2 {
17237
0
                                        let v525 = C::use_ssse3(ctx);
17238
0
                                        if v525 == true {
17239
0
                                            let v2402 = &C::sinkable_load(ctx, v381);
17240
0
                                            if let Some(v2403) = v2402 {
17241
0
                                                let v2469 = &constructor_sink_load_to_xmm_mem(ctx, v2403);
17242
0
                                                let v2479 = constructor_x64_movddup(ctx, v2469);
17243
0
                                                let v2480 = constructor_output_xmm(ctx, v2479);
17244
0
                                                // Rule at src/isa/x64/lower.isle line 4532.
17245
0
                                                return Some(v2480);
17246
0
                                            }
17247
0
                                        }
17248
0
                                    }
17249
                                }
17250
0
                                _ => {}
17251
                            }
17252
0
                        }
17253
0
                        match v3 {
17254
                            I8X16 => {
17255
0
                                let v2432 = &C::sinkable_load_exact(ctx, v381);
17256
0
                                if let Some(v2433) = v2432 {
17257
0
                                    let v2428 = C::use_avx2(ctx);
17258
0
                                    if v2428 == true {
17259
0
                                        let v2439 = &constructor_sink_load_to_xmm_mem(ctx, v2433);
17260
0
                                        let v2440 = constructor_x64_vpbroadcastb(ctx, v2439);
17261
0
                                        let v2441 = constructor_output_xmm(ctx, v2440);
17262
0
                                        // Rule at src/isa/x64/lower.isle line 4469.
17263
0
                                        return Some(v2441);
17264
0
                                    }
17265
0
                                    let v441 = C::use_sse41(ctx);
17266
0
                                    if v441 == true {
17267
0
                                        let v525 = C::use_ssse3(ctx);
17268
0
                                        if v525 == true {
17269
0
                                            let v2434 = constructor_xmm_uninit_value(ctx);
17270
0
                                            let v2435 = &constructor_sink_load_to_gpr_mem(ctx, v2433);
17271
0
                                            let v2436 = constructor_x64_pinsrb(ctx, v2434, v2435, 0x0);
17272
0
                                            let v951 = constructor_xmm_zero(ctx, I8X16);
17273
0
                                            let v952 = &C::xmm_to_xmm_mem(ctx, v951);
17274
0
                                            let v2437 = constructor_x64_pshufb(ctx, v2436, v952);
17275
0
                                            let v2438 = constructor_output_xmm(ctx, v2437);
17276
0
                                            // Rule at src/isa/x64/lower.isle line 4465.
17277
0
                                            return Some(v2438);
17278
0
                                        }
17279
0
                                    }
17280
0
                                }
17281
0
                                let v2428 = C::use_avx2(ctx);
17282
0
                                if v2428 == true {
17283
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17284
0
                                    let v2423 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17285
0
                                    let v2429 = &C::xmm_to_xmm_mem(ctx, v2423);
17286
0
                                    let v2430 = constructor_x64_vpbroadcastb(ctx, v2429);
17287
0
                                    let v2431 = constructor_output_xmm(ctx, v2430);
17288
0
                                    // Rule at src/isa/x64/lower.isle line 4462.
17289
0
                                    return Some(v2431);
17290
0
                                }
17291
0
                                let v525 = C::use_ssse3(ctx);
17292
0
                                if v525 == true {
17293
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17294
0
                                    let v2423 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17295
0
                                    let v2424 = constructor_xmm_zero(ctx, I8X16);
17296
0
                                    let v2425 = &C::xmm_to_xmm_mem(ctx, v2424);
17297
0
                                    let v2426 = constructor_x64_pshufb(ctx, v2423, v2425);
17298
0
                                    let v2427 = constructor_output_xmm(ctx, v2426);
17299
0
                                    // Rule at src/isa/x64/lower.isle line 4459.
17300
0
                                    return Some(v2427);
17301
0
                                }
17302
0
                                let v2413 = &constructor_put_in_gpr_mem(ctx, v381);
17303
0
                                let v2414 = constructor_x64_movd_to_xmm(ctx, v2413);
17304
0
                                let v2415 = &C::xmm_to_xmm_mem(ctx, v2414);
17305
0
                                let v2416 = constructor_x64_punpcklbw(ctx, v2414, v2415);
17306
0
                                let v2417 = &C::xmm_to_xmm_mem(ctx, v2416);
17307
0
                                let v2419 = constructor_x64_pshuflw(ctx, v2417, 0x0);
17308
0
                                let v2420 = &C::xmm_to_xmm_mem(ctx, v2419);
17309
0
                                let v2421 = constructor_x64_pshufd(ctx, v2420, 0x0);
17310
0
                                let v2422 = constructor_output_xmm(ctx, v2421);
17311
0
                                // Rule at src/isa/x64/lower.isle line 4456.
17312
0
                                return Some(v2422);
17313
                            }
17314
                            I16X8 => {
17315
0
                                let v2432 = &C::sinkable_load_exact(ctx, v381);
17316
0
                                if let Some(v2433) = v2432 {
17317
0
                                    let v2428 = C::use_avx2(ctx);
17318
0
                                    if v2428 == true {
17319
0
                                        let v2439 = &constructor_sink_load_to_xmm_mem(ctx, v2433);
17320
0
                                        let v2454 = constructor_x64_vpbroadcastw(ctx, v2439);
17321
0
                                        let v2455 = constructor_output_xmm(ctx, v2454);
17322
0
                                        // Rule at src/isa/x64/lower.isle line 4485.
17323
0
                                        return Some(v2455);
17324
0
                                    }
17325
0
                                    let v2434 = constructor_xmm_uninit_value(ctx);
17326
0
                                    let v2435 = &constructor_sink_load_to_gpr_mem(ctx, v2433);
17327
0
                                    let v2448 = constructor_x64_pinsrw(ctx, v2434, v2435, 0x0);
17328
0
                                    let v2449 = &C::xmm_to_xmm_mem(ctx, v2448);
17329
0
                                    let v2450 = constructor_x64_pshuflw(ctx, v2449, 0x0);
17330
0
                                    let v2451 = &C::xmm_to_xmm_mem(ctx, v2450);
17331
0
                                    let v2452 = constructor_x64_pshufd(ctx, v2451, 0x0);
17332
0
                                    let v2453 = constructor_output_xmm(ctx, v2452);
17333
0
                                    // Rule at src/isa/x64/lower.isle line 4483.
17334
0
                                    return Some(v2453);
17335
0
                                }
17336
0
                                let v2428 = C::use_avx2(ctx);
17337
0
                                if v2428 == true {
17338
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17339
0
                                    let v2423 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17340
0
                                    let v2429 = &C::xmm_to_xmm_mem(ctx, v2423);
17341
0
                                    let v2446 = constructor_x64_vpbroadcastw(ctx, v2429);
17342
0
                                    let v2447 = constructor_output_xmm(ctx, v2446);
17343
0
                                    // Rule at src/isa/x64/lower.isle line 4480.
17344
0
                                    return Some(v2447);
17345
0
                                }
17346
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17347
0
                                let v2423 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17348
0
                                let v2429 = &C::xmm_to_xmm_mem(ctx, v2423);
17349
0
                                let v2442 = constructor_x64_pshuflw(ctx, v2429, 0x0);
17350
0
                                let v2443 = &C::xmm_to_xmm_mem(ctx, v2442);
17351
0
                                let v2444 = constructor_x64_pshufd(ctx, v2443, 0x0);
17352
0
                                let v2445 = constructor_output_xmm(ctx, v2444);
17353
0
                                // Rule at src/isa/x64/lower.isle line 4478.
17354
0
                                return Some(v2445);
17355
                            }
17356
                            I32X4 => {
17357
0
                                let v2428 = C::use_avx2(ctx);
17358
0
                                if v2428 == true {
17359
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17360
0
                                    let v2423 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17361
0
                                    let v2429 = &C::xmm_to_xmm_mem(ctx, v2423);
17362
0
                                    let v2458 = constructor_x64_vpbroadcastd(ctx, v2429);
17363
0
                                    let v2459 = constructor_output_xmm(ctx, v2458);
17364
0
                                    // Rule at src/isa/x64/lower.isle line 4495.
17365
0
                                    return Some(v2459);
17366
0
                                }
17367
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17368
0
                                let v2423 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17369
0
                                let v2429 = &C::xmm_to_xmm_mem(ctx, v2423);
17370
0
                                let v2456 = constructor_x64_pshufd(ctx, v2429, 0x0);
17371
0
                                let v2457 = constructor_output_xmm(ctx, v2456);
17372
0
                                // Rule at src/isa/x64/lower.isle line 4493.
17373
0
                                return Some(v2457);
17374
                            }
17375
                            I64X2 => {
17376
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17377
0
                                let v2472 = constructor_bitcast_gpr_to_xmm(ctx, I64, v382);
17378
0
                                let v2473 = &C::xmm_to_xmm_mem(ctx, v2472);
17379
0
                                let v2475 = constructor_x64_pshufd(ctx, v2473, 0x44);
17380
0
                                let v2476 = constructor_output_xmm(ctx, v2475);
17381
0
                                // Rule at src/isa/x64/lower.isle line 4528.
17382
0
                                return Some(v2476);
17383
                            }
17384
                            F32X4 => {
17385
0
                                let v2428 = C::use_avx2(ctx);
17386
0
                                if v2428 == true {
17387
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17388
0
                                    let v2463 = constructor_x64_vbroadcastss(ctx, v526);
17389
0
                                    let v2464 = constructor_output_xmm(ctx, v2463);
17390
0
                                    // Rule at src/isa/x64/lower.isle line 4505.
17391
0
                                    return Some(v2464);
17392
0
                                }
17393
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17394
0
                                let v2460 = constructor_put_in_xmm(ctx, v381);
17395
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17396
0
                                let v2461 = constructor_x64_shufps(ctx, v2460, v397, 0x0);
17397
0
                                let v2462 = constructor_output_xmm(ctx, v2461);
17398
0
                                // Rule at src/isa/x64/lower.isle line 4502.
17399
0
                                return Some(v2462);
17400
                            }
17401
                            F64X2 => {
17402
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
17403
0
                                let v2477 = constructor_x64_pshufd(ctx, v526, 0x44);
17404
0
                                let v2478 = constructor_output_xmm(ctx, v2477);
17405
0
                                // Rule at src/isa/x64/lower.isle line 4530.
17406
0
                                return Some(v2478);
17407
                            }
17408
0
                            _ => {}
17409
                        }
17410
0
                    }
17411
                }
17412
                &Opcode::SetPinnedReg => {
17413
0
                    let v382 = constructor_put_in_gpr(ctx, v381);
17414
0
                    let v2240 = &constructor_write_pinned_gpr(ctx, v382);
17415
0
                    let v2241 = constructor_side_effect(ctx, v2240);
17416
0
                    // Rule at src/isa/x64/lower.isle line 4177.
17417
0
                    return Some(v2241);
17418
                }
17419
                &Opcode::VanyTrue => {
17420
0
                    let v441 = C::use_sse41(ctx);
17421
0
                    if v441 == true {
17422
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
17423
0
                        let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
17424
0
                        let v2481 = &constructor_x64_ptest(ctx, v1311, v529);
17425
0
                        let v2482 = &constructor_x64_setcc(ctx, &CC::NZ);
17426
0
                        let v2483 = constructor_with_flags(ctx, v2481, v2482);
17427
0
                        let v2484 = C::output(ctx, v2483);
17428
0
                        // Rule at src/isa/x64/lower.isle line 4538.
17429
0
                        return Some(v2484);
17430
0
                    }
17431
0
                    let v529 = constructor_put_in_xmm(ctx, v381);
17432
0
                    let v530 = constructor_xmm_zero(ctx, I8X16);
17433
0
                    let v2073 = &C::xmm_to_xmm_mem(ctx, v530);
17434
0
                    let v2485 = constructor_x64_pcmpeqb(ctx, v529, v2073);
17435
0
                    let v2487 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2485);
17436
0
                    let v2489 = RegMemImm::Imm {
17437
0
                        simm32: 0xFFFF,
17438
0
                    };
17439
0
                    let v2490 = &C::gpr_mem_imm_new(ctx, &v2489);
17440
0
                    let v2491 = &constructor_x64_cmp(ctx, &OperandSize::Size32, v2490, v2487);
17441
0
                    let v2492 = &constructor_x64_setcc(ctx, &CC::NZ);
17442
0
                    let v2493 = constructor_with_flags(ctx, v2491, v2492);
17443
0
                    let v2494 = C::output(ctx, v2493);
17444
0
                    // Rule at src/isa/x64/lower.isle line 4547.
17445
0
                    return Some(v2494);
17446
                }
17447
                &Opcode::VallTrue => {
17448
0
                    let v441 = C::use_sse41(ctx);
17449
0
                    if v441 == true {
17450
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
17451
0
                        let v622 = C::value_type(ctx, v381);
17452
0
                        let v2495 = constructor_xmm_zero(ctx, v622);
17453
0
                        let v2496 = constructor_vec_int_type(ctx, v622);
17454
0
                        let v2497 = &C::xmm_to_xmm_mem(ctx, v2495);
17455
0
                        let v2498 = constructor_x64_pcmpeq(ctx, v2496, v529, v2497);
17456
0
                        let v2499 = &C::xmm_to_xmm_mem(ctx, v2498);
17457
0
                        let v2500 = &constructor_x64_ptest(ctx, v2499, v2498);
17458
0
                        let v2501 = &constructor_x64_setcc(ctx, &CC::Z);
17459
0
                        let v2502 = constructor_with_flags(ctx, v2500, v2501);
17460
0
                        let v2503 = C::output(ctx, v2502);
17461
0
                        // Rule at src/isa/x64/lower.isle line 4557.
17462
0
                        return Some(v2503);
17463
0
                    }
17464
0
                    let v622 = C::value_type(ctx, v381);
17465
0
                    let v2504 = constructor_vec_int_type(ctx, v622);
17466
0
                    let v2460 = constructor_put_in_xmm(ctx, v381);
17467
0
                    let v2505 = constructor_xmm_zero(ctx, v622);
17468
0
                    let v2506 = &C::xmm_to_xmm_mem(ctx, v2505);
17469
0
                    let v2507 = constructor_x64_pcmpeq(ctx, v2504, v2460, v2506);
17470
0
                    let v2508 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2507);
17471
0
                    let v2509 = &C::gpr_to_gpr_mem_imm(ctx, v2508);
17472
0
                    let v2510 = &constructor_x64_test(ctx, &OperandSize::Size32, v2509, v2508);
17473
0
                    let v2511 = &constructor_x64_setcc(ctx, &CC::Z);
17474
0
                    let v2512 = constructor_with_flags(ctx, v2510, v2511);
17475
0
                    let v2513 = C::output(ctx, v2512);
17476
0
                    // Rule at src/isa/x64/lower.isle line 4567.
17477
0
                    return Some(v2513);
17478
                }
17479
                &Opcode::VhighBits => {
17480
0
                    let v622 = C::value_type(ctx, v381);
17481
0
                    let v2514 = C::multi_lane(ctx, v622);
17482
0
                    if let Some(v2515) = v2514 {
17483
0
                        match v2515.0 {
17484
                            0x8 => {
17485
0
                                if v2515.1 == 0x10 {
17486
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17487
0
                                    let v2518 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v529);
17488
0
                                    let v2519 = constructor_output_gpr(ctx, v2518);
17489
0
                                    // Rule at src/isa/x64/lower.isle line 4584.
17490
0
                                    return Some(v2519);
17491
0
                                }
17492
                            }
17493
                            0x10 => {
17494
0
                                if v2515.1 == 0x8 {
17495
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17496
0
                                    let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
17497
0
                                    let v2524 = constructor_x64_packsswb(ctx, v529, v1311);
17498
0
                                    let v2525 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2524);
17499
0
                                    let v1204 = Imm8Reg::Imm8 {
17500
0
                                        imm: 0x8,
17501
0
                                    };
17502
0
                                    let v2192 = &C::imm8_reg_to_imm8_gpr(ctx, &v1204);
17503
0
                                    let v2526 = constructor_x64_shr(ctx, I64, v2525, v2192);
17504
0
                                    let v2527 = constructor_output_gpr(ctx, v2526);
17505
0
                                    // Rule at src/isa/x64/lower.isle line 4599.
17506
0
                                    return Some(v2527);
17507
0
                                }
17508
                            }
17509
                            0x20 => {
17510
0
                                if v2515.1 == 0x4 {
17511
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17512
0
                                    let v2520 = constructor_x64_movmskps(ctx, &OperandSize::Size32, v529);
17513
0
                                    let v2521 = constructor_output_gpr(ctx, v2520);
17514
0
                                    // Rule at src/isa/x64/lower.isle line 4587.
17515
0
                                    return Some(v2521);
17516
0
                                }
17517
                            }
17518
                            0x40 => {
17519
0
                                if v2515.1 == 0x2 {
17520
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17521
0
                                    let v2522 = constructor_x64_movmskpd(ctx, &OperandSize::Size32, v529);
17522
0
                                    let v2523 = constructor_output_gpr(ctx, v2522);
17523
0
                                    // Rule at src/isa/x64/lower.isle line 4590.
17524
0
                                    return Some(v2523);
17525
0
                                }
17526
                            }
17527
0
                            _ => {}
17528
                        }
17529
0
                    }
17530
                }
17531
                &Opcode::Ineg => {
17532
2.17k
                    let v1 = C::first_result(ctx, arg0);
17533
2.17k
                    if let Some(v2) = v1 {
17534
2.17k
                        let v3 = C::value_type(ctx, v2);
17535
2.17k
                        match v3 {
17536
                            I8X16 => {
17537
0
                                let v395 = constructor_imm(ctx, I8X16, 0x0);
17538
0
                                let v396 = C::xmm_new(ctx, v395);
17539
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17540
0
                                let v398 = constructor_x64_psubb(ctx, v396, v397);
17541
0
                                let v399 = constructor_output_xmm(ctx, v398);
17542
0
                                // Rule at src/isa/x64/lower.isle line 942.
17543
0
                                return Some(v399);
17544
                            }
17545
                            I16X8 => {
17546
0
                                let v401 = constructor_imm(ctx, I16X8, 0x0);
17547
0
                                let v402 = C::xmm_new(ctx, v401);
17548
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17549
0
                                let v403 = constructor_x64_psubw(ctx, v402, v397);
17550
0
                                let v404 = constructor_output_xmm(ctx, v403);
17551
0
                                // Rule at src/isa/x64/lower.isle line 945.
17552
0
                                return Some(v404);
17553
                            }
17554
                            I32X4 => {
17555
0
                                let v406 = constructor_imm(ctx, I32X4, 0x0);
17556
0
                                let v407 = C::xmm_new(ctx, v406);
17557
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17558
0
                                let v408 = constructor_x64_psubd(ctx, v407, v397);
17559
0
                                let v409 = constructor_output_xmm(ctx, v408);
17560
0
                                // Rule at src/isa/x64/lower.isle line 948.
17561
0
                                return Some(v409);
17562
                            }
17563
                            I64X2 => {
17564
0
                                let v411 = constructor_imm(ctx, I64X2, 0x0);
17565
0
                                let v412 = C::xmm_new(ctx, v411);
17566
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17567
0
                                let v413 = constructor_x64_psubq(ctx, v412, v397);
17568
0
                                let v414 = constructor_output_xmm(ctx, v413);
17569
0
                                // Rule at src/isa/x64/lower.isle line 951.
17570
0
                                return Some(v414);
17571
                            }
17572
2.17k
                            _ => {}
17573
2.17k
                        }
17574
2.17k
                        let v4 = C::fits_in_64(ctx, v3);
17575
2.17k
                        if let Some(v5) = v4 {
17576
2.17k
                            let v382 = constructor_put_in_gpr(ctx, v381);
17577
2.17k
                            let v383 = constructor_x64_neg(ctx, v5, v382);
17578
2.17k
                            let v384 = constructor_output_gpr(ctx, v383);
17579
2.17k
                            // Rule at src/isa/x64/lower.isle line 928.
17580
2.17k
                            return Some(v384);
17581
0
                        }
17582
0
                        if v3 == I128 {
17583
0
                            let v385 = C::put_in_regs(ctx, v381);
17584
0
                            let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
17585
0
                            let v387 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17586
0
                            let v388 = &constructor_x64_neg_paired(ctx, I64, v386);
17587
0
                            let v389 = constructor_imm(ctx, I64, 0x0);
17588
0
                            let v390 = C::gpr_new(ctx, v389);
17589
0
                            let v391 = &C::gpr_to_gpr_mem_imm(ctx, v387);
17590
0
                            let v392 = &constructor_x64_sbb_paired(ctx, I64, v390, v391);
17591
0
                            let v393 = constructor_with_flags(ctx, v388, v392);
17592
0
                            let v394 = C::output(ctx, v393);
17593
0
                            // Rule at src/isa/x64/lower.isle line 931.
17594
0
                            return Some(v394);
17595
0
                        }
17596
0
                    }
17597
                }
17598
                &Opcode::Iabs => {
17599
0
                    let v1 = C::first_result(ctx, arg0);
17600
0
                    if let Some(v2) = v1 {
17601
0
                        let v3 = C::value_type(ctx, v2);
17602
0
                        match v3 {
17603
                            I8X16 => {
17604
0
                                let v525 = C::use_ssse3(ctx);
17605
0
                                if v525 == true {
17606
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17607
0
                                    let v527 = constructor_x64_pabsb(ctx, v526);
17608
0
                                    let v528 = constructor_output_xmm(ctx, v527);
17609
0
                                    // Rule at src/isa/x64/lower.isle line 1185.
17610
0
                                    return Some(v528);
17611
0
                                }
17612
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17613
0
                                let v530 = constructor_xmm_zero(ctx, I8X16);
17614
0
                                let v531 = &C::xmm_to_xmm_mem(ctx, v529);
17615
0
                                let v532 = constructor_x64_psubb(ctx, v530, v531);
17616
0
                                let v533 = &C::xmm_to_xmm_mem(ctx, v532);
17617
0
                                let v534 = constructor_x64_pminub(ctx, v529, v533);
17618
0
                                let v535 = constructor_output_xmm(ctx, v534);
17619
0
                                // Rule at src/isa/x64/lower.isle line 1192.
17620
0
                                return Some(v535);
17621
                            }
17622
                            I16X8 => {
17623
0
                                let v525 = C::use_ssse3(ctx);
17624
0
                                if v525 == true {
17625
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17626
0
                                    let v536 = constructor_x64_pabsw(ctx, v526);
17627
0
                                    let v537 = constructor_output_xmm(ctx, v536);
17628
0
                                    // Rule at src/isa/x64/lower.isle line 1199.
17629
0
                                    return Some(v537);
17630
0
                                }
17631
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17632
0
                                let v538 = constructor_xmm_zero(ctx, I16X8);
17633
0
                                let v531 = &C::xmm_to_xmm_mem(ctx, v529);
17634
0
                                let v539 = constructor_x64_psubw(ctx, v538, v531);
17635
0
                                let v540 = &C::xmm_to_xmm_mem(ctx, v539);
17636
0
                                let v541 = constructor_x64_pmaxsw(ctx, v529, v540);
17637
0
                                let v542 = constructor_output_xmm(ctx, v541);
17638
0
                                // Rule at src/isa/x64/lower.isle line 1203.
17639
0
                                return Some(v542);
17640
                            }
17641
                            I32X4 => {
17642
0
                                let v525 = C::use_ssse3(ctx);
17643
0
                                if v525 == true {
17644
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17645
0
                                    let v543 = constructor_x64_pabsd(ctx, v526);
17646
0
                                    let v544 = constructor_output_xmm(ctx, v543);
17647
0
                                    // Rule at src/isa/x64/lower.isle line 1210.
17648
0
                                    return Some(v544);
17649
0
                                }
17650
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17651
0
                                let v546 = &C::xmi_imm(ctx, 0x1F);
17652
0
                                let v547 = constructor_x64_psrad(ctx, v529, v546);
17653
0
                                let v548 = &C::xmm_to_xmm_mem(ctx, v547);
17654
0
                                let v549 = constructor_x64_pxor(ctx, v529, v548);
17655
0
                                let v550 = &C::xmm_to_xmm_mem(ctx, v547);
17656
0
                                let v551 = constructor_x64_psubd(ctx, v549, v550);
17657
0
                                let v552 = constructor_output_xmm(ctx, v551);
17658
0
                                // Rule at src/isa/x64/lower.isle line 1220.
17659
0
                                return Some(v552);
17660
                            }
17661
                            I64X2 => {
17662
0
                                let v332 = C::use_avx512vl(ctx);
17663
0
                                if v332 == true {
17664
0
                                    let v333 = C::use_avx512f(ctx);
17665
0
                                    if v333 == true {
17666
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
17667
0
                                        let v553 = constructor_x64_vpabsq(ctx, v526);
17668
0
                                        let v554 = constructor_output_xmm(ctx, v553);
17669
0
                                        // Rule at src/isa/x64/lower.isle line 1229.
17670
0
                                        return Some(v554);
17671
0
                                    }
17672
0
                                }
17673
0
                                let v441 = C::use_sse41(ctx);
17674
0
                                if v441 == true {
17675
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17676
0
                                    let v555 = constructor_imm(ctx, I64X2, 0x0);
17677
0
                                    let v556 = C::xmm_new(ctx, v555);
17678
0
                                    let v557 = &C::xmm_to_xmm_mem(ctx, v529);
17679
0
                                    let v558 = constructor_x64_psubq(ctx, v556, v557);
17680
0
                                    let v559 = &C::xmm_to_xmm_mem(ctx, v529);
17681
0
                                    let v560 = constructor_x64_blendvpd(ctx, v558, v559, v558);
17682
0
                                    let v561 = constructor_output_xmm(ctx, v560);
17683
0
                                    // Rule at src/isa/x64/lower.isle line 1238.
17684
0
                                    return Some(v561);
17685
0
                                }
17686
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17687
0
                                let v562 = RegMemImm::Imm {
17688
0
                                    simm32: 0x1F,
17689
0
                                };
17690
0
                                let v563 = &C::xmm_mem_imm_new(ctx, &v562);
17691
0
                                let v564 = constructor_x64_psrad(ctx, v529, v563);
17692
0
                                let v565 = &C::xmm_to_xmm_mem(ctx, v564);
17693
0
                                let v567 = constructor_x64_pshufd(ctx, v565, 0xF5);
17694
0
                                let v568 = &C::xmm_to_xmm_mem(ctx, v567);
17695
0
                                let v569 = constructor_x64_pxor(ctx, v529, v568);
17696
0
                                let v570 = &C::xmm_to_xmm_mem(ctx, v567);
17697
0
                                let v571 = constructor_x64_psubq(ctx, v569, v570);
17698
0
                                let v572 = constructor_output_xmm(ctx, v571);
17699
0
                                // Rule at src/isa/x64/lower.isle line 1247.
17700
0
                                return Some(v572);
17701
                            }
17702
0
                            _ => {}
17703
0
                        }
17704
0
                        let v4 = C::fits_in_64(ctx, v3);
17705
0
                        if let Some(v5) = v4 {
17706
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
17707
0
                            let v573 = &constructor_x64_neg_paired(ctx, v5, v382);
17708
0
                            let v574 = constructor_produces_flags_get_reg(ctx, v573);
17709
0
                            let v575 = C::gpr_new(ctx, v574);
17710
0
                            let v577 = &C::gpr_to_gpr_mem(ctx, v382);
17711
0
                            let v578 = &constructor_cmove(ctx, v5, &CC::S, v577, v575);
17712
0
                            let v579 = &constructor_produces_flags_ignore(ctx, v573);
17713
0
                            let v580 = constructor_with_flags_reg(ctx, v579, v578);
17714
0
                            let v581 = constructor_output_reg(ctx, v580);
17715
0
                            // Rule at src/isa/x64/lower.isle line 1256.
17716
0
                            return Some(v581);
17717
0
                        }
17718
0
                    }
17719
                }
17720
                &Opcode::Bnot => {
17721
1.32k
                    let v1 = C::first_result(ctx, arg0);
17722
1.32k
                    if let Some(v2) = v1 {
17723
1.32k
                        let v3 = C::value_type(ctx, v2);
17724
1.32k
                        if v3 == I128 {
17725
0
                            let v627 = constructor_i128_not(ctx, v381);
17726
0
                            let v628 = C::output(ctx, v627);
17727
0
                            // Rule at src/isa/x64/lower.isle line 1365.
17728
0
                            return Some(v628);
17729
1.32k
                        }
17730
1.32k
                        let v64 = C::multi_lane(ctx, v3);
17731
1.32k
                        if let Some(
v650
) = v64 {
17732
0
                            let v529 = constructor_put_in_xmm(ctx, v381);
17733
0
                            let v592 = constructor_vector_all_ones(ctx);
17734
0
                            let v629 = &C::xmm_to_xmm_mem(ctx, v592);
17735
0
                            let v632 = constructor_x64_xor_vector(ctx, v3, v529, v629);
17736
0
                            let v633 = constructor_output_xmm(ctx, v632);
17737
0
                            // Rule at src/isa/x64/lower.isle line 1375.
17738
0
                            return Some(v633);
17739
1.32k
                        }
17740
1.32k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
17741
1.32k
                        if let Some(v153) = v152 {
17742
1.32k
                            let v382 = constructor_put_in_gpr(ctx, v381);
17743
1.32k
                            let v625 = constructor_x64_not(ctx, v3, v382);
17744
1.32k
                            let v626 = constructor_output_gpr(ctx, v625);
17745
1.32k
                            // Rule at src/isa/x64/lower.isle line 1350.
17746
1.32k
                            return Some(v626);
17747
0
                        }
17748
0
                        let v162 = C::ty_scalar_float(ctx, v3);
17749
0
                        if let Some(v163) = v162 {
17750
0
                            let v529 = constructor_put_in_xmm(ctx, v381);
17751
0
                            let v592 = constructor_vector_all_ones(ctx);
17752
0
                            let v629 = &C::xmm_to_xmm_mem(ctx, v592);
17753
0
                            let v630 = constructor_x64_xor_vector(ctx, v163, v529, v629);
17754
0
                            let v631 = constructor_output_xmm(ctx, v630);
17755
0
                            // Rule at src/isa/x64/lower.isle line 1370.
17756
0
                            return Some(v631);
17757
0
                        }
17758
0
                    }
17759
                }
17760
                &Opcode::Bitrev => {
17761
0
                    let v1 = C::first_result(ctx, arg0);
17762
0
                    if let Some(v2) = v1 {
17763
0
                        let v3 = C::value_type(ctx, v2);
17764
0
                        match v3 {
17765
                            I8 => {
17766
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17767
0
                                let v1187 = constructor_do_bitrev8(ctx, I32, v382);
17768
0
                                let v1188 = constructor_output_gpr(ctx, v1187);
17769
0
                                // Rule at src/isa/x64/lower.isle line 2320.
17770
0
                                return Some(v1188);
17771
                            }
17772
                            I16 => {
17773
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17774
0
                                let v1189 = constructor_do_bitrev16(ctx, I32, v382);
17775
0
                                let v1190 = constructor_output_gpr(ctx, v1189);
17776
0
                                // Rule at src/isa/x64/lower.isle line 2323.
17777
0
                                return Some(v1190);
17778
                            }
17779
                            I32 => {
17780
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17781
0
                                let v1191 = constructor_do_bitrev32(ctx, I32, v382);
17782
0
                                let v1192 = constructor_output_gpr(ctx, v1191);
17783
0
                                // Rule at src/isa/x64/lower.isle line 2326.
17784
0
                                return Some(v1192);
17785
                            }
17786
                            I64 => {
17787
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17788
0
                                let v1193 = constructor_do_bitrev64(ctx, I64, v382);
17789
0
                                let v1194 = constructor_output_gpr(ctx, v1193);
17790
0
                                // Rule at src/isa/x64/lower.isle line 2329.
17791
0
                                return Some(v1194);
17792
                            }
17793
                            I128 => {
17794
0
                                let v385 = C::put_in_regs(ctx, v381);
17795
0
                                let v1077 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17796
0
                                let v1195 = constructor_do_bitrev64(ctx, I64, v1077);
17797
0
                                let v1196 = C::gpr_to_reg(ctx, v1195);
17798
0
                                let v1197 = C::put_in_regs(ctx, v381);
17799
0
                                let v1198 = constructor_value_regs_get_gpr(ctx, v1197, 0x0);
17800
0
                                let v1199 = constructor_do_bitrev64(ctx, I64, v1198);
17801
0
                                let v1200 = C::gpr_to_reg(ctx, v1199);
17802
0
                                let v1201 = C::value_regs(ctx, v1196, v1200);
17803
0
                                let v1202 = C::output(ctx, v1201);
17804
0
                                // Rule at src/isa/x64/lower.isle line 2332.
17805
0
                                return Some(v1202);
17806
                            }
17807
0
                            _ => {}
17808
                        }
17809
0
                    }
17810
                }
17811
                &Opcode::Clz => {
17812
392
                    let v1 = C::first_result(ctx, arg0);
17813
392
                    if let Some(v2) = v1 {
17814
392
                        let v3 = C::value_type(ctx, v2);
17815
392
                        let v45 = C::ty_32_or_64(ctx, v3);
17816
392
                        if let Some(v46) = v45 {
17817
392
                            let v1067 = C::use_lzcnt(ctx);
17818
392
                            if v1067 == true {
17819
392
                                let v382 = constructor_put_in_gpr(ctx, v381);
17820
392
                                let v1068 = constructor_x64_lzcnt(ctx, v46, v382);
17821
392
                                let v1069 = constructor_output_gpr(ctx, v1068);
17822
392
                                // Rule at src/isa/x64/lower.isle line 2099.
17823
392
                                return Some(v1069);
17824
0
                            }
17825
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
17826
0
                            let v1070 = constructor_do_clz(ctx, v46, v46, v382);
17827
0
                            let v1071 = constructor_output_gpr(ctx, v1070);
17828
0
                            // Rule at src/isa/x64/lower.isle line 2103.
17829
0
                            return Some(v1071);
17830
0
                        }
17831
0
                        let v1072 = C::ty_8_or_16(ctx, v3);
17832
0
                        if let Some(v1073) = v1072 {
17833
0
                            let v1074 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
17834
0
                            let v1075 = constructor_do_clz(ctx, I32, v1073, v1074);
17835
0
                            let v1076 = constructor_output_gpr(ctx, v1075);
17836
0
                            // Rule at src/isa/x64/lower.isle line 2106.
17837
0
                            return Some(v1076);
17838
0
                        }
17839
0
                        if v3 == I128 {
17840
0
                            let v385 = C::put_in_regs(ctx, v381);
17841
0
                            let v1077 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17842
0
                            let v1078 = constructor_do_clz(ctx, I64, I64, v1077);
17843
0
                            let v1079 = C::put_in_regs(ctx, v381);
17844
0
                            let v1080 = constructor_value_regs_get_gpr(ctx, v1079, 0x0);
17845
0
                            let v1081 = constructor_do_clz(ctx, I64, I64, v1080);
17846
0
                            let v1083 = RegMemImm::Imm {
17847
0
                                simm32: 0x40,
17848
0
                            };
17849
0
                            let v1084 = &C::gpr_mem_imm_new(ctx, &v1083);
17850
0
                            let v1085 = constructor_x64_add(ctx, I64, v1081, v1084);
17851
0
                            let v1087 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1078);
17852
0
                            let v1088 = &C::gpr_to_gpr_mem(ctx, v1078);
17853
0
                            let v1089 = &constructor_cmove(ctx, I64, &CC::NZ, v1088, v1085);
17854
0
                            let v1090 = constructor_with_flags_reg(ctx, v1087, v1089);
17855
0
                            let v1091 = C::gpr_new(ctx, v1090);
17856
0
                            let v1092 = C::gpr_to_reg(ctx, v1091);
17857
0
                            let v1093 = constructor_imm(ctx, I64, 0x0);
17858
0
                            let v1094 = C::value_regs(ctx, v1092, v1093);
17859
0
                            let v1095 = C::output(ctx, v1094);
17860
0
                            // Rule at src/isa/x64/lower.isle line 2111.
17861
0
                            return Some(v1095);
17862
0
                        }
17863
0
                    }
17864
                }
17865
                &Opcode::Ctz => {
17866
146
                    let v1 = C::first_result(ctx, arg0);
17867
146
                    if let Some(v2) = v1 {
17868
146
                        let v3 = C::value_type(ctx, v2);
17869
146
                        let v45 = C::ty_32_or_64(ctx, v3);
17870
146
                        if let Some(v46) = v45 {
17871
146
                            let v188 = C::use_bmi1(ctx);
17872
146
                            if v188 == true {
17873
146
                                let v382 = constructor_put_in_gpr(ctx, v381);
17874
146
                                let v1096 = constructor_x64_tzcnt(ctx, v46, v382);
17875
146
                                let v1097 = constructor_output_gpr(ctx, v1096);
17876
146
                                // Rule at src/isa/x64/lower.isle line 2136.
17877
146
                                return Some(v1097);
17878
0
                            }
17879
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
17880
0
                            let v1098 = constructor_do_ctz(ctx, v46, v46, v382);
17881
0
                            let v1099 = constructor_output_gpr(ctx, v1098);
17882
0
                            // Rule at src/isa/x64/lower.isle line 2140.
17883
0
                            return Some(v1099);
17884
0
                        }
17885
0
                        let v1072 = C::ty_8_or_16(ctx, v3);
17886
0
                        if let Some(v1073) = v1072 {
17887
0
                            let v1074 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
17888
0
                            let v1100 = constructor_do_ctz(ctx, I32, v1073, v1074);
17889
0
                            let v1101 = constructor_output_gpr(ctx, v1100);
17890
0
                            // Rule at src/isa/x64/lower.isle line 2143.
17891
0
                            return Some(v1101);
17892
0
                        }
17893
0
                        if v3 == I128 {
17894
0
                            let v385 = C::put_in_regs(ctx, v381);
17895
0
                            let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
17896
0
                            let v1102 = constructor_do_ctz(ctx, I64, I64, v386);
17897
0
                            let v1079 = C::put_in_regs(ctx, v381);
17898
0
                            let v1103 = constructor_value_regs_get_gpr(ctx, v1079, 0x1);
17899
0
                            let v1104 = constructor_do_ctz(ctx, I64, I64, v1103);
17900
0
                            let v1083 = RegMemImm::Imm {
17901
0
                                simm32: 0x40,
17902
0
                            };
17903
0
                            let v1084 = &C::gpr_mem_imm_new(ctx, &v1083);
17904
0
                            let v1105 = constructor_x64_add(ctx, I64, v1104, v1084);
17905
0
                            let v1106 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1102);
17906
0
                            let v1107 = &C::gpr_to_gpr_mem(ctx, v1105);
17907
0
                            let v1108 = &constructor_cmove(ctx, I64, &CC::Z, v1107, v1102);
17908
0
                            let v1109 = constructor_with_flags_reg(ctx, v1106, v1108);
17909
0
                            let v1110 = C::gpr_new(ctx, v1109);
17910
0
                            let v1111 = C::gpr_to_reg(ctx, v1110);
17911
0
                            let v1093 = constructor_imm(ctx, I64, 0x0);
17912
0
                            let v1112 = C::value_regs(ctx, v1111, v1093);
17913
0
                            let v1113 = C::output(ctx, v1112);
17914
0
                            // Rule at src/isa/x64/lower.isle line 2148.
17915
0
                            return Some(v1113);
17916
0
                        }
17917
0
                    }
17918
                }
17919
                &Opcode::Bswap => {
17920
0
                    let v1 = C::first_result(ctx, arg0);
17921
0
                    if let Some(v2) = v1 {
17922
0
                        let v3 = C::value_type(ctx, v2);
17923
0
                        match v3 {
17924
                            I16 => {
17925
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17926
0
                                let v1204 = Imm8Reg::Imm8 {
17927
0
                                    imm: 0x8,
17928
0
                                };
17929
0
                                let v1205 = &C::imm8_reg_to_imm8_gpr(ctx, &v1204);
17930
0
                                let v1206 = constructor_x64_rotl(ctx, I16, v382, v1205);
17931
0
                                let v1207 = constructor_output_gpr(ctx, v1206);
17932
0
                                // Rule at src/isa/x64/lower.isle line 2399.
17933
0
                                return Some(v1207);
17934
                            }
17935
                            I32 => {
17936
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17937
0
                                let v1208 = constructor_x64_bswap(ctx, I32, v382);
17938
0
                                let v1209 = constructor_output_gpr(ctx, v1208);
17939
0
                                // Rule at src/isa/x64/lower.isle line 2402.
17940
0
                                return Some(v1209);
17941
                            }
17942
                            I64 => {
17943
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17944
0
                                let v1210 = constructor_x64_bswap(ctx, I64, v382);
17945
0
                                let v1211 = constructor_output_gpr(ctx, v1210);
17946
0
                                // Rule at src/isa/x64/lower.isle line 2405.
17947
0
                                return Some(v1211);
17948
                            }
17949
                            I128 => {
17950
0
                                let v385 = C::put_in_regs(ctx, v381);
17951
0
                                let v1077 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17952
0
                                let v1212 = constructor_x64_bswap(ctx, I64, v1077);
17953
0
                                let v1213 = C::gpr_to_reg(ctx, v1212);
17954
0
                                let v1197 = C::put_in_regs(ctx, v381);
17955
0
                                let v1198 = constructor_value_regs_get_gpr(ctx, v1197, 0x0);
17956
0
                                let v1214 = constructor_x64_bswap(ctx, I64, v1198);
17957
0
                                let v1215 = C::gpr_to_reg(ctx, v1214);
17958
0
                                let v1216 = C::value_regs(ctx, v1213, v1215);
17959
0
                                let v1217 = C::output(ctx, v1216);
17960
0
                                // Rule at src/isa/x64/lower.isle line 2408.
17961
0
                                return Some(v1217);
17962
                            }
17963
0
                            _ => {}
17964
                        }
17965
0
                    }
17966
                }
17967
                &Opcode::Popcnt => {
17968
89
                    let v1 = C::first_result(ctx, arg0);
17969
89
                    if let Some(v2) = v1 {
17970
89
                        let v1114 = C::use_popcnt(ctx);
17971
89
                        if v1114 == true {
17972
89
                            let v3 = C::value_type(ctx, v2);
17973
89
                            let v45 = C::ty_32_or_64(ctx, v3);
17974
89
                            if let Some(v46) = v45 {
17975
89
                                let v382 = constructor_put_in_gpr(ctx, v381);
17976
89
                                let v1115 = constructor_x64_popcnt(ctx, v46, v382);
17977
89
                                let v1116 = constructor_output_gpr(ctx, v1115);
17978
89
                                // Rule at src/isa/x64/lower.isle line 2167.
17979
89
                                return Some(v1116);
17980
0
                            }
17981
0
                            let v1072 = C::ty_8_or_16(ctx, v3);
17982
0
                            if let Some(v1073) = v1072 {
17983
0
                                let v1074 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
17984
0
                                let v1117 = constructor_x64_popcnt(ctx, I32, v1074);
17985
0
                                let v1118 = constructor_output_gpr(ctx, v1117);
17986
0
                                // Rule at src/isa/x64/lower.isle line 2171.
17987
0
                                return Some(v1118);
17988
0
                            }
17989
0
                        }
17990
0
                        let v3 = C::value_type(ctx, v2);
17991
0
                        match v3 {
17992
                            I128 => {
17993
0
                                if v1114 == true {
17994
0
                                    let v385 = C::put_in_regs(ctx, v381);
17995
0
                                    let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
17996
0
                                    let v1119 = constructor_x64_popcnt(ctx, I64, v386);
17997
0
                                    let v1079 = C::put_in_regs(ctx, v381);
17998
0
                                    let v1103 = constructor_value_regs_get_gpr(ctx, v1079, 0x1);
17999
0
                                    let v1120 = constructor_x64_popcnt(ctx, I64, v1103);
18000
0
                                    let v1121 = &C::gpr_to_gpr_mem_imm(ctx, v1120);
18001
0
                                    let v1122 = constructor_x64_add(ctx, I64, v1119, v1121);
18002
0
                                    let v1123 = C::gpr_to_reg(ctx, v1122);
18003
0
                                    let v1124 = constructor_imm(ctx, I64, 0x0);
18004
0
                                    let v1125 = C::value_regs(ctx, v1123, v1124);
18005
0
                                    let v1126 = C::output(ctx, v1125);
18006
0
                                    // Rule at src/isa/x64/lower.isle line 2175.
18007
0
                                    return Some(v1126);
18008
0
                                }
18009
0
                                let v385 = C::put_in_regs(ctx, v381);
18010
0
                                let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
18011
0
                                let v1131 = constructor_do_popcnt(ctx, I64, v386);
18012
0
                                let v1079 = C::put_in_regs(ctx, v381);
18013
0
                                let v1103 = constructor_value_regs_get_gpr(ctx, v1079, 0x1);
18014
0
                                let v1132 = constructor_do_popcnt(ctx, I64, v1103);
18015
0
                                let v1133 = &C::gpr_to_gpr_mem_imm(ctx, v1132);
18016
0
                                let v1134 = constructor_x64_add(ctx, I64, v1131, v1133);
18017
0
                                let v1135 = C::gpr_to_reg(ctx, v1134);
18018
0
                                let v1124 = constructor_imm(ctx, I64, 0x0);
18019
0
                                let v1136 = C::value_regs(ctx, v1135, v1124);
18020
0
                                let v1137 = C::output(ctx, v1136);
18021
0
                                // Rule at src/isa/x64/lower.isle line 2191.
18022
0
                                return Some(v1137);
18023
                            }
18024
                            I8X16 => {
18025
0
                                let v332 = C::use_avx512vl(ctx);
18026
0
                                if v332 == true {
18027
0
                                    let v1138 = C::use_avx512bitalg(ctx);
18028
0
                                    if v1138 == true {
18029
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18030
0
                                        let v1139 = constructor_x64_vpopcntb(ctx, v526);
18031
0
                                        let v1140 = constructor_output_xmm(ctx, v1139);
18032
0
                                        // Rule at src/isa/x64/lower.isle line 2264.
18033
0
                                        return Some(v1140);
18034
0
                                    }
18035
0
                                }
18036
0
                                let v525 = C::use_ssse3(ctx);
18037
0
                                if v525 == true {
18038
0
                                    let v1142 = C::emit_u128_le_const(ctx, 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F);
18039
0
                                    let v1143 = &constructor_const_to_xmm_mem(ctx, v1142);
18040
0
                                    let v1144 = constructor_put_in_xmm(ctx, v381);
18041
0
                                    let v1145 = constructor_sse_and(ctx, I8X16, v1144, v1143);
18042
0
                                    let v1146 = constructor_put_in_xmm(ctx, v381);
18043
0
                                    let v1148 = &C::xmi_imm(ctx, 0x4);
18044
0
                                    let v1149 = constructor_x64_psrlw(ctx, v1146, v1148);
18045
0
                                    let v1150 = constructor_sse_and(ctx, I8X16, v1149, v1143);
18046
0
                                    let v1152 = C::emit_u128_le_const(ctx, 0x4030302030202010302020102010100);
18047
0
                                    let v1153 = constructor_x64_xmm_load_const(ctx, I8X16, v1152);
18048
0
                                    let v1154 = &C::xmm_to_xmm_mem(ctx, v1145);
18049
0
                                    let v1155 = constructor_x64_pshufb(ctx, v1153, v1154);
18050
0
                                    let v1156 = &C::xmm_to_xmm_mem(ctx, v1150);
18051
0
                                    let v1157 = constructor_x64_pshufb(ctx, v1153, v1156);
18052
0
                                    let v1158 = &C::xmm_to_xmm_mem(ctx, v1157);
18053
0
                                    let v1159 = constructor_x64_paddb(ctx, v1155, v1158);
18054
0
                                    let v1160 = constructor_output_xmm(ctx, v1159);
18055
0
                                    // Rule at src/isa/x64/lower.isle line 2290.
18056
0
                                    return Some(v1160);
18057
0
                                }
18058
0
                                let v1162 = C::emit_u128_le_const(ctx, 0x77777777777777777777777777777777);
18059
0
                                let v1163 = &constructor_const_to_xmm_mem(ctx, v1162);
18060
0
                                let v1144 = constructor_put_in_xmm(ctx, v381);
18061
0
                                let v1164 = &C::xmi_imm(ctx, 0x1);
18062
0
                                let v1165 = constructor_x64_psrlq(ctx, v1144, v1164);
18063
0
                                let v1166 = constructor_x64_pand(ctx, v1165, v1163);
18064
0
                                let v1167 = &C::xmm_to_xmm_mem(ctx, v1166);
18065
0
                                let v1168 = constructor_x64_psubb(ctx, v1144, v1167);
18066
0
                                let v1169 = &C::xmi_imm(ctx, 0x1);
18067
0
                                let v1170 = constructor_x64_psrlq(ctx, v1166, v1169);
18068
0
                                let v1171 = constructor_x64_pand(ctx, v1170, v1163);
18069
0
                                let v1172 = &C::xmm_to_xmm_mem(ctx, v1171);
18070
0
                                let v1173 = constructor_x64_psubb(ctx, v1168, v1172);
18071
0
                                let v1174 = &C::xmi_imm(ctx, 0x1);
18072
0
                                let v1175 = constructor_x64_psrlq(ctx, v1171, v1174);
18073
0
                                let v1176 = constructor_x64_pand(ctx, v1175, v1163);
18074
0
                                let v1177 = &C::xmm_to_xmm_mem(ctx, v1176);
18075
0
                                let v1178 = constructor_x64_psubb(ctx, v1173, v1177);
18076
0
                                let v1179 = &C::xmi_imm(ctx, 0x4);
18077
0
                                let v1180 = constructor_x64_psrlw(ctx, v1178, v1179);
18078
0
                                let v1181 = &C::xmm_to_xmm_mem(ctx, v1180);
18079
0
                                let v1182 = constructor_x64_paddb(ctx, v1178, v1181);
18080
0
                                let v1183 = C::emit_u128_le_const(ctx, 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F);
18081
0
                                let v1184 = &constructor_const_to_xmm_mem(ctx, v1183);
18082
0
                                let v1185 = constructor_x64_pand(ctx, v1182, v1184);
18083
0
                                let v1186 = constructor_output_xmm(ctx, v1185);
18084
0
                                // Rule at src/isa/x64/lower.isle line 2306.
18085
0
                                return Some(v1186);
18086
                            }
18087
0
                            _ => {}
18088
0
                        }
18089
0
                        let v45 = C::ty_32_or_64(ctx, v3);
18090
0
                        if let Some(v46) = v45 {
18091
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
18092
0
                            let v1127 = constructor_do_popcnt(ctx, v46, v382);
18093
0
                            let v1128 = constructor_output_gpr(ctx, v1127);
18094
0
                            // Rule at src/isa/x64/lower.isle line 2181.
18095
0
                            return Some(v1128);
18096
0
                        }
18097
0
                        let v1072 = C::ty_8_or_16(ctx, v3);
18098
0
                        if let Some(v1073) = v1072 {
18099
0
                            let v1074 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
18100
0
                            let v1129 = constructor_do_popcnt(ctx, I32, v1074);
18101
0
                            let v1130 = constructor_output_gpr(ctx, v1129);
18102
0
                            // Rule at src/isa/x64/lower.isle line 2186.
18103
0
                            return Some(v1130);
18104
0
                        }
18105
0
                    }
18106
                }
18107
                &Opcode::Sqrt => {
18108
0
                    let v1 = C::first_result(ctx, arg0);
18109
0
                    if let Some(v2) = v1 {
18110
0
                        let v3 = C::value_type(ctx, v2);
18111
0
                        match v3 {
18112
                            F32 => {
18113
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18114
0
                                let v1301 = constructor_x64_sqrtss(ctx, v526);
18115
0
                                let v1302 = constructor_output_xmm(ctx, v1301);
18116
0
                                // Rule at src/isa/x64/lower.isle line 2555.
18117
0
                                return Some(v1302);
18118
                            }
18119
                            F64 => {
18120
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18121
0
                                let v1303 = constructor_x64_sqrtsd(ctx, v526);
18122
0
                                let v1304 = constructor_output_xmm(ctx, v1303);
18123
0
                                // Rule at src/isa/x64/lower.isle line 2557.
18124
0
                                return Some(v1304);
18125
                            }
18126
                            F32X4 => {
18127
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18128
0
                                let v1305 = constructor_x64_sqrtps(ctx, v526);
18129
0
                                let v1306 = constructor_output_xmm(ctx, v1305);
18130
0
                                // Rule at src/isa/x64/lower.isle line 2559.
18131
0
                                return Some(v1306);
18132
                            }
18133
                            F64X2 => {
18134
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18135
0
                                let v1307 = constructor_x64_sqrtpd(ctx, v526);
18136
0
                                let v1308 = constructor_output_xmm(ctx, v1307);
18137
0
                                // Rule at src/isa/x64/lower.isle line 2561.
18138
0
                                return Some(v1308);
18139
                            }
18140
0
                            _ => {}
18141
                        }
18142
0
                    }
18143
                }
18144
                &Opcode::Fneg => {
18145
0
                    let v1 = C::first_result(ctx, arg0);
18146
0
                    if let Some(v2) = v1 {
18147
0
                        let v3 = C::value_type(ctx, v2);
18148
0
                        match v3 {
18149
                            F32 => {
18150
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18151
0
                                let v603 = constructor_imm(ctx, F32, 0x80000000);
18152
0
                                let v604 = &constructor_reg_to_xmm_mem(ctx, v603);
18153
0
                                let v605 = constructor_x64_xorps(ctx, v529, v604);
18154
0
                                let v606 = constructor_output_xmm(ctx, v605);
18155
0
                                // Rule at src/isa/x64/lower.isle line 1288.
18156
0
                                return Some(v606);
18157
                            }
18158
                            F64 => {
18159
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18160
0
                                let v608 = constructor_imm(ctx, F64, 0x8000000000000000);
18161
0
                                let v609 = &constructor_reg_to_xmm_mem(ctx, v608);
18162
0
                                let v610 = constructor_x64_xorpd(ctx, v529, v609);
18163
0
                                let v611 = constructor_output_xmm(ctx, v610);
18164
0
                                // Rule at src/isa/x64/lower.isle line 1291.
18165
0
                                return Some(v611);
18166
                            }
18167
                            F32X4 => {
18168
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18169
0
                                let v592 = constructor_vector_all_ones(ctx);
18170
0
                                let v612 = &C::xmi_imm(ctx, 0x1F);
18171
0
                                let v613 = constructor_x64_pslld(ctx, v592, v612);
18172
0
                                let v614 = &C::xmm_to_xmm_mem(ctx, v613);
18173
0
                                let v615 = constructor_x64_xorps(ctx, v529, v614);
18174
0
                                let v616 = constructor_output_xmm(ctx, v615);
18175
0
                                // Rule at src/isa/x64/lower.isle line 1294.
18176
0
                                return Some(v616);
18177
                            }
18178
                            F64X2 => {
18179
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18180
0
                                let v592 = constructor_vector_all_ones(ctx);
18181
0
                                let v617 = &C::xmi_imm(ctx, 0x3F);
18182
0
                                let v618 = constructor_x64_psllq(ctx, v592, v617);
18183
0
                                let v619 = &C::xmm_to_xmm_mem(ctx, v618);
18184
0
                                let v620 = constructor_x64_xorpd(ctx, v529, v619);
18185
0
                                let v621 = constructor_output_xmm(ctx, v620);
18186
0
                                // Rule at src/isa/x64/lower.isle line 1298.
18187
0
                                return Some(v621);
18188
                            }
18189
0
                            _ => {}
18190
                        }
18191
0
                    }
18192
                }
18193
                &Opcode::Fabs => {
18194
0
                    let v1 = C::first_result(ctx, arg0);
18195
0
                    if let Some(v2) = v1 {
18196
0
                        let v3 = C::value_type(ctx, v2);
18197
0
                        match v3 {
18198
                            F32 => {
18199
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18200
0
                                let v583 = constructor_imm(ctx, F32, 0x7FFFFFFF);
18201
0
                                let v584 = &constructor_reg_to_xmm_mem(ctx, v583);
18202
0
                                let v585 = constructor_x64_andps(ctx, v529, v584);
18203
0
                                let v586 = constructor_output_xmm(ctx, v585);
18204
0
                                // Rule at src/isa/x64/lower.isle line 1270.
18205
0
                                return Some(v586);
18206
                            }
18207
                            F64 => {
18208
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18209
0
                                let v588 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
18210
0
                                let v589 = &constructor_reg_to_xmm_mem(ctx, v588);
18211
0
                                let v590 = constructor_x64_andpd(ctx, v529, v589);
18212
0
                                let v591 = constructor_output_xmm(ctx, v590);
18213
0
                                // Rule at src/isa/x64/lower.isle line 1273.
18214
0
                                return Some(v591);
18215
                            }
18216
                            F32X4 => {
18217
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18218
0
                                let v592 = constructor_vector_all_ones(ctx);
18219
0
                                let v593 = &C::xmi_imm(ctx, 0x1);
18220
0
                                let v594 = constructor_x64_psrld(ctx, v592, v593);
18221
0
                                let v595 = &C::xmm_to_xmm_mem(ctx, v594);
18222
0
                                let v596 = constructor_x64_andps(ctx, v529, v595);
18223
0
                                let v597 = constructor_output_xmm(ctx, v596);
18224
0
                                // Rule at src/isa/x64/lower.isle line 1277.
18225
0
                                return Some(v597);
18226
                            }
18227
                            F64X2 => {
18228
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18229
0
                                let v592 = constructor_vector_all_ones(ctx);
18230
0
                                let v593 = &C::xmi_imm(ctx, 0x1);
18231
0
                                let v598 = constructor_x64_psrlq(ctx, v592, v593);
18232
0
                                let v599 = &C::xmm_to_xmm_mem(ctx, v598);
18233
0
                                let v600 = constructor_x64_andpd(ctx, v529, v599);
18234
0
                                let v601 = constructor_output_xmm(ctx, v600);
18235
0
                                // Rule at src/isa/x64/lower.isle line 1282.
18236
0
                                return Some(v601);
18237
                            }
18238
0
                            _ => {}
18239
                        }
18240
0
                    }
18241
                }
18242
                &Opcode::Ceil => {
18243
0
                    let v2146 = &C::put_in_reg_mem(ctx, v381);
18244
0
                    let v622 = C::value_type(ctx, v381);
18245
0
                    let v2148 = constructor_x64_round(ctx, v622, v2146, &RoundImm::RoundUp);
18246
0
                    let v2149 = constructor_output_xmm(ctx, v2148);
18247
0
                    // Rule at src/isa/x64/lower.isle line 3983.
18248
0
                    return Some(v2149);
18249
                }
18250
                &Opcode::Floor => {
18251
0
                    let v2146 = &C::put_in_reg_mem(ctx, v381);
18252
0
                    let v622 = C::value_type(ctx, v381);
18253
0
                    let v2151 = constructor_x64_round(ctx, v622, v2146, &RoundImm::RoundDown);
18254
0
                    let v2152 = constructor_output_xmm(ctx, v2151);
18255
0
                    // Rule at src/isa/x64/lower.isle line 3988.
18256
0
                    return Some(v2152);
18257
                }
18258
                &Opcode::Trunc => {
18259
0
                    let v2146 = &C::put_in_reg_mem(ctx, v381);
18260
0
                    let v622 = C::value_type(ctx, v381);
18261
0
                    let v2157 = constructor_x64_round(ctx, v622, v2146, &RoundImm::RoundZero);
18262
0
                    let v2158 = constructor_output_xmm(ctx, v2157);
18263
0
                    // Rule at src/isa/x64/lower.isle line 3998.
18264
0
                    return Some(v2158);
18265
                }
18266
                &Opcode::Nearest => {
18267
0
                    let v2146 = &C::put_in_reg_mem(ctx, v381);
18268
0
                    let v622 = C::value_type(ctx, v381);
18269
0
                    let v2154 = constructor_x64_round(ctx, v622, v2146, &RoundImm::RoundNearest);
18270
0
                    let v2155 = constructor_output_xmm(ctx, v2154);
18271
0
                    // Rule at src/isa/x64/lower.isle line 3993.
18272
0
                    return Some(v2155);
18273
                }
18274
                &Opcode::IsNull => {
18275
0
                    let v622 = C::value_type(ctx, v381);
18276
0
                    if v622 == R64 {
18277
0
                        let v382 = constructor_put_in_gpr(ctx, v381);
18278
0
                        let v1219 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x0, v382);
18279
0
                        let v1220 = &constructor_x64_setcc(ctx, &CC::Z);
18280
0
                        let v1221 = constructor_with_flags(ctx, v1219, v1220);
18281
0
                        let v1222 = C::output(ctx, v1221);
18282
0
                        // Rule at src/isa/x64/lower.isle line 2416.
18283
0
                        return Some(v1222);
18284
0
                    }
18285
                }
18286
                &Opcode::IsInvalid => {
18287
0
                    let v622 = C::value_type(ctx, v381);
18288
0
                    if v622 == R64 {
18289
0
                        let v382 = constructor_put_in_gpr(ctx, v381);
18290
0
                        let v1224 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0xFFFFFFFF, v382);
18291
0
                        let v1220 = &constructor_x64_setcc(ctx, &CC::Z);
18292
0
                        let v1225 = constructor_with_flags(ctx, v1224, v1220);
18293
0
                        let v1226 = C::output(ctx, v1225);
18294
0
                        // Rule at src/isa/x64/lower.isle line 2424.
18295
0
                        return Some(v1226);
18296
0
                    }
18297
                }
18298
                &Opcode::ScalarToVector => {
18299
0
                    let v2402 = &C::sinkable_load(ctx, v381);
18300
0
                    if let Some(v2403) = v2402 {
18301
0
                        let v622 = C::value_type(ctx, v381);
18302
0
                        let v2409 = C::ty_64(ctx, v622);
18303
0
                        if let Some(v2410) = v2409 {
18304
0
                            let v2406 = &C::sink_load(ctx, v2403);
18305
0
                            let v2411 = constructor_x64_movsd_load(ctx, v2406);
18306
0
                            let v2412 = constructor_output_xmm(ctx, v2411);
18307
0
                            // Rule at src/isa/x64/lower.isle line 4440.
18308
0
                            return Some(v2412);
18309
0
                        }
18310
0
                        let v2404 = C::ty_32(ctx, v622);
18311
0
                        if let Some(v2405) = v2404 {
18312
0
                            let v2406 = &C::sink_load(ctx, v2403);
18313
0
                            let v2407 = constructor_x64_movss_load(ctx, v2406);
18314
0
                            let v2408 = constructor_output_xmm(ctx, v2407);
18315
0
                            // Rule at src/isa/x64/lower.isle line 4438.
18316
0
                            return Some(v2408);
18317
0
                        }
18318
0
                    }
18319
0
                    let v622 = C::value_type(ctx, v381);
18320
0
                    let v1862 = C::ty_scalar_float(ctx, v622);
18321
0
                    if let Some(v1863) = v1862 {
18322
0
                        let v1245 = constructor_output_value(ctx, v381);
18323
0
                        // Rule at src/isa/x64/lower.isle line 4428.
18324
0
                        return Some(v1245);
18325
0
                    }
18326
0
                    let v382 = constructor_put_in_gpr(ctx, v381);
18327
0
                    let v2400 = constructor_bitcast_gpr_to_xmm(ctx, v622, v382);
18328
0
                    let v2401 = constructor_output_xmm(ctx, v2400);
18329
0
                    // Rule at src/isa/x64/lower.isle line 4433.
18330
0
                    return Some(v2401);
18331
                }
18332
                &Opcode::Bmask => {
18333
0
                    let v1 = C::first_result(ctx, arg0);
18334
0
                    if let Some(v2) = v1 {
18335
0
                        let v385 = C::put_in_regs(ctx, v381);
18336
0
                        let v3 = C::value_type(ctx, v2);
18337
0
                        let v622 = C::value_type(ctx, v381);
18338
0
                        let v623 = constructor_lower_bmask(ctx, v3, v622, v385);
18339
0
                        let v624 = C::output(ctx, v623);
18340
0
                        // Rule at src/isa/x64/lower.isle line 1343.
18341
0
                        return Some(v624);
18342
0
                    }
18343
                }
18344
                &Opcode::Ireduce => {
18345
15.3k
                    let v1 = C::first_result(ctx, arg0);
18346
15.3k
                    if let Some(v2) = v1 {
18347
15.3k
                        let v3 = C::value_type(ctx, v2);
18348
15.3k
                        let v4 = C::fits_in_64(ctx, v3);
18349
15.3k
                        if let Some(v5) = v4 {
18350
15.3k
                            let v385 = C::put_in_regs(ctx, v381);
18351
15.3k
                            let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
18352
15.3k
                            let v1246 = constructor_output_gpr(ctx, v386);
18353
15.3k
                            // Rule at src/isa/x64/lower.isle line 2474.
18354
15.3k
                            return Some(v1246);
18355
0
                        }
18356
0
                        let v622 = C::value_type(ctx, v381);
18357
0
                        if v3 == v622 {
18358
0
                            let v1245 = constructor_output_value(ctx, v381);
18359
0
                            // Rule at src/isa/x64/lower.isle line 2468.
18360
0
                            return Some(v1245);
18361
0
                        }
18362
0
                    }
18363
                }
18364
                &Opcode::SwidenLow => {
18365
0
                    let v1 = C::first_result(ctx, arg0);
18366
0
                    if let Some(v2) = v1 {
18367
0
                        let v3 = C::value_type(ctx, v2);
18368
0
                        match v3 {
18369
                            I16X8 => {
18370
0
                                let v441 = C::use_sse41(ctx);
18371
0
                                if v441 == true {
18372
0
                                    let v622 = C::value_type(ctx, v381);
18373
0
                                    if v622 == I8X16 {
18374
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18375
0
                                        let v2032 = constructor_x64_pmovsxbw(ctx, v526);
18376
0
                                        let v2033 = constructor_output_xmm(ctx, v2032);
18377
0
                                        // Rule at src/isa/x64/lower.isle line 3703.
18378
0
                                        return Some(v2033);
18379
0
                                    }
18380
0
                                }
18381
                            }
18382
                            I32X4 => {
18383
0
                                let v441 = C::use_sse41(ctx);
18384
0
                                if v441 == true {
18385
0
                                    let v622 = C::value_type(ctx, v381);
18386
0
                                    if v622 == I16X8 {
18387
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18388
0
                                        let v2034 = constructor_x64_pmovsxwd(ctx, v526);
18389
0
                                        let v2035 = constructor_output_xmm(ctx, v2034);
18390
0
                                        // Rule at src/isa/x64/lower.isle line 3706.
18391
0
                                        return Some(v2035);
18392
0
                                    }
18393
0
                                }
18394
                            }
18395
                            I64X2 => {
18396
0
                                let v441 = C::use_sse41(ctx);
18397
0
                                if v441 == true {
18398
0
                                    let v622 = C::value_type(ctx, v381);
18399
0
                                    if v622 == I32X4 {
18400
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18401
0
                                        let v2036 = constructor_x64_pmovsxdq(ctx, v526);
18402
0
                                        let v2037 = constructor_output_xmm(ctx, v2036);
18403
0
                                        // Rule at src/isa/x64/lower.isle line 3709.
18404
0
                                        return Some(v2037);
18405
0
                                    }
18406
0
                                }
18407
                            }
18408
0
                            _ => {}
18409
                        }
18410
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
18411
0
                        let v2038 = constructor_lower_swiden_low(ctx, v3, v529);
18412
0
                        let v2039 = constructor_output_xmm(ctx, v2038);
18413
0
                        // Rule at src/isa/x64/lower.isle line 3713.
18414
0
                        return Some(v2039);
18415
0
                    }
18416
                }
18417
                &Opcode::SwidenHigh => {
18418
0
                    let v1 = C::first_result(ctx, arg0);
18419
0
                    if let Some(v2) = v1 {
18420
0
                        let v3 = C::value_type(ctx, v2);
18421
0
                        match v3 {
18422
                            I16X8 => {
18423
0
                                let v622 = C::value_type(ctx, v381);
18424
0
                                if v622 == I8X16 {
18425
0
                                    let v441 = C::use_sse41(ctx);
18426
0
                                    if v441 == true {
18427
0
                                        let v525 = C::use_ssse3(ctx);
18428
0
                                        if v525 == true {
18429
0
                                            let v529 = constructor_put_in_xmm(ctx, v381);
18430
0
                                            let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
18431
0
                                            let v2040 = constructor_x64_palignr(ctx, v529, v1311, 0x8);
18432
0
                                            let v2041 = &C::xmm_to_xmm_mem(ctx, v2040);
18433
0
                                            let v2042 = constructor_x64_pmovsxbw(ctx, v2041);
18434
0
                                            let v2043 = constructor_output_xmm(ctx, v2042);
18435
0
                                            // Rule at src/isa/x64/lower.isle line 3736.
18436
0
                                            return Some(v2043);
18437
0
                                        }
18438
0
                                    }
18439
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18440
0
                                    let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
18441
0
                                    let v2050 = constructor_x64_punpckhbw(ctx, v529, v1311);
18442
0
                                    let v2051 = &C::xmi_imm(ctx, 0x8);
18443
0
                                    let v2052 = constructor_x64_psraw(ctx, v2050, v2051);
18444
0
                                    let v2053 = constructor_output_xmm(ctx, v2052);
18445
0
                                    // Rule at src/isa/x64/lower.isle line 3752.
18446
0
                                    return Some(v2053);
18447
0
                                }
18448
                            }
18449
                            I32X4 => {
18450
0
                                let v622 = C::value_type(ctx, v381);
18451
0
                                if v622 == I16X8 {
18452
0
                                    let v441 = C::use_sse41(ctx);
18453
0
                                    if v441 == true {
18454
0
                                        let v525 = C::use_ssse3(ctx);
18455
0
                                        if v525 == true {
18456
0
                                            let v529 = constructor_put_in_xmm(ctx, v381);
18457
0
                                            let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
18458
0
                                            let v2040 = constructor_x64_palignr(ctx, v529, v1311, 0x8);
18459
0
                                            let v2041 = &C::xmm_to_xmm_mem(ctx, v2040);
18460
0
                                            let v2044 = constructor_x64_pmovsxwd(ctx, v2041);
18461
0
                                            let v2045 = constructor_output_xmm(ctx, v2044);
18462
0
                                            // Rule at src/isa/x64/lower.isle line 3741.
18463
0
                                            return Some(v2045);
18464
0
                                        }
18465
0
                                    }
18466
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18467
0
                                    let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
18468
0
                                    let v2054 = constructor_x64_punpckhwd(ctx, v529, v1311);
18469
0
                                    let v1847 = &C::xmi_imm(ctx, 0x10);
18470
0
                                    let v2055 = constructor_x64_psrad(ctx, v2054, v1847);
18471
0
                                    let v2056 = constructor_output_xmm(ctx, v2055);
18472
0
                                    // Rule at src/isa/x64/lower.isle line 3755.
18473
0
                                    return Some(v2056);
18474
0
                                }
18475
                            }
18476
                            I64X2 => {
18477
0
                                let v622 = C::value_type(ctx, v381);
18478
0
                                if v622 == I32X4 {
18479
0
                                    let v441 = C::use_sse41(ctx);
18480
0
                                    if v441 == true {
18481
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18482
0
                                        let v2046 = constructor_x64_pshufd(ctx, v526, 0xEE);
18483
0
                                        let v2047 = &C::xmm_to_xmm_mem(ctx, v2046);
18484
0
                                        let v2048 = constructor_x64_pmovsxdq(ctx, v2047);
18485
0
                                        let v2049 = constructor_output_xmm(ctx, v2048);
18486
0
                                        // Rule at src/isa/x64/lower.isle line 3746.
18487
0
                                        return Some(v2049);
18488
0
                                    }
18489
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
18490
0
                                    let v2058 = constructor_x64_pshufd(ctx, v526, 0xE);
18491
0
                                    let v2059 = constructor_xmm_zero(ctx, I32X4);
18492
0
                                    let v2060 = &C::xmm_to_xmm_mem(ctx, v2058);
18493
0
                                    let v2061 = constructor_x64_pcmpgtd(ctx, v2059, v2060);
18494
0
                                    let v2062 = &C::xmm_to_xmm_mem(ctx, v2061);
18495
0
                                    let v2063 = constructor_x64_punpckldq(ctx, v2058, v2062);
18496
0
                                    let v2064 = constructor_output_xmm(ctx, v2063);
18497
0
                                    // Rule at src/isa/x64/lower.isle line 3760.
18498
0
                                    return Some(v2064);
18499
0
                                }
18500
                            }
18501
0
                            _ => {}
18502
                        }
18503
0
                    }
18504
                }
18505
                &Opcode::UwidenLow => {
18506
0
                    let v1 = C::first_result(ctx, arg0);
18507
0
                    if let Some(v2) = v1 {
18508
0
                        let v3 = C::value_type(ctx, v2);
18509
0
                        match v3 {
18510
                            I16X8 => {
18511
0
                                let v441 = C::use_sse41(ctx);
18512
0
                                if v441 == true {
18513
0
                                    let v622 = C::value_type(ctx, v381);
18514
0
                                    if v622 == I8X16 {
18515
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18516
0
                                        let v2065 = constructor_x64_pmovzxbw(ctx, v526);
18517
0
                                        let v2066 = constructor_output_xmm(ctx, v2065);
18518
0
                                        // Rule at src/isa/x64/lower.isle line 3768.
18519
0
                                        return Some(v2066);
18520
0
                                    }
18521
0
                                }
18522
                            }
18523
                            I32X4 => {
18524
0
                                let v441 = C::use_sse41(ctx);
18525
0
                                if v441 == true {
18526
0
                                    let v622 = C::value_type(ctx, v381);
18527
0
                                    if v622 == I16X8 {
18528
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18529
0
                                        let v2067 = constructor_x64_pmovzxwd(ctx, v526);
18530
0
                                        let v2068 = constructor_output_xmm(ctx, v2067);
18531
0
                                        // Rule at src/isa/x64/lower.isle line 3771.
18532
0
                                        return Some(v2068);
18533
0
                                    }
18534
0
                                }
18535
                            }
18536
                            I64X2 => {
18537
0
                                let v441 = C::use_sse41(ctx);
18538
0
                                if v441 == true {
18539
0
                                    let v622 = C::value_type(ctx, v381);
18540
0
                                    if v622 == I32X4 {
18541
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18542
0
                                        let v2069 = constructor_x64_pmovzxdq(ctx, v526);
18543
0
                                        let v2070 = constructor_output_xmm(ctx, v2069);
18544
0
                                        // Rule at src/isa/x64/lower.isle line 3774.
18545
0
                                        return Some(v2070);
18546
0
                                    }
18547
0
                                }
18548
                            }
18549
0
                            _ => {}
18550
                        }
18551
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
18552
0
                        let v2071 = constructor_lower_uwiden_low(ctx, v3, v529);
18553
0
                        let v2072 = constructor_output_xmm(ctx, v2071);
18554
0
                        // Rule at src/isa/x64/lower.isle line 3778.
18555
0
                        return Some(v2072);
18556
0
                    }
18557
                }
18558
                &Opcode::UwidenHigh => {
18559
0
                    let v1 = C::first_result(ctx, arg0);
18560
0
                    if let Some(v2) = v1 {
18561
0
                        let v3 = C::value_type(ctx, v2);
18562
0
                        match v3 {
18563
                            I16X8 => {
18564
0
                                let v622 = C::value_type(ctx, v381);
18565
0
                                if v622 == I8X16 {
18566
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18567
0
                                    let v530 = constructor_xmm_zero(ctx, I8X16);
18568
0
                                    let v2073 = &C::xmm_to_xmm_mem(ctx, v530);
18569
0
                                    let v2074 = constructor_x64_punpckhbw(ctx, v529, v2073);
18570
0
                                    let v2075 = constructor_output_xmm(ctx, v2074);
18571
0
                                    // Rule at src/isa/x64/lower.isle line 3793.
18572
0
                                    return Some(v2075);
18573
0
                                }
18574
                            }
18575
                            I32X4 => {
18576
0
                                let v622 = C::value_type(ctx, v381);
18577
0
                                if v622 == I16X8 {
18578
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18579
0
                                    let v530 = constructor_xmm_zero(ctx, I8X16);
18580
0
                                    let v2073 = &C::xmm_to_xmm_mem(ctx, v530);
18581
0
                                    let v2076 = constructor_x64_punpckhwd(ctx, v529, v2073);
18582
0
                                    let v2077 = constructor_output_xmm(ctx, v2076);
18583
0
                                    // Rule at src/isa/x64/lower.isle line 3795.
18584
0
                                    return Some(v2077);
18585
0
                                }
18586
                            }
18587
                            I64X2 => {
18588
0
                                let v622 = C::value_type(ctx, v381);
18589
0
                                if v622 == I32X4 {
18590
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18591
0
                                    let v1886 = constructor_xmm_zero(ctx, F32X4);
18592
0
                                    let v1887 = &C::xmm_to_xmm_mem(ctx, v1886);
18593
0
                                    let v2078 = constructor_x64_unpckhps(ctx, v529, v1887);
18594
0
                                    let v2079 = constructor_output_xmm(ctx, v2078);
18595
0
                                    // Rule at src/isa/x64/lower.isle line 3797.
18596
0
                                    return Some(v2079);
18597
0
                                }
18598
                            }
18599
0
                            _ => {}
18600
                        }
18601
0
                    }
18602
                }
18603
                &Opcode::Uextend => {
18604
797k
                    let v1 = C::first_result(ctx, arg0);
18605
797k
                    if let Some(v2) = v1 {
18606
797k
                        let v3 = C::value_type(ctx, v2);
18607
797k
                        match v3 {
18608
                            I64 => {
18609
783k
                                let v1227 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18610
783k
                                let v1232 = constructor_output_gpr(ctx, v1227);
18611
783k
                                // Rule at src/isa/x64/lower.isle line 2437.
18612
783k
                                return Some(v1232);
18613
                            }
18614
                            I128 => {
18615
0
                                let v1227 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18616
0
                                let v1228 = C::gpr_to_reg(ctx, v1227);
18617
0
                                let v1229 = constructor_imm(ctx, I64, 0x0);
18618
0
                                let v1230 = C::value_regs(ctx, v1228, v1229);
18619
0
                                let v1231 = C::output(ctx, v1230);
18620
0
                                // Rule at src/isa/x64/lower.isle line 2433.
18621
0
                                return Some(v1231);
18622
                            }
18623
14.1k
                            _ => {}
18624
14.1k
                        }
18625
14.1k
                        let v1233 = C::fits_in_32(ctx, v3);
18626
14.1k
                        if let Some(v1234) = v1233 {
18627
14.1k
                            let v1074 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
18628
14.1k
                            let v1235 = constructor_output_gpr(ctx, v1074);
18629
14.1k
                            // Rule at src/isa/x64/lower.isle line 2442.
18630
14.1k
                            return Some(v1235);
18631
0
                        }
18632
0
                    }
18633
                }
18634
                &Opcode::Sextend => {
18635
144
                    let v1 = C::first_result(ctx, arg0);
18636
144
                    if let Some(v2) = v1 {
18637
144
                        let v3 = C::value_type(ctx, v2);
18638
144
                        match v3 {
18639
                            I64 => {
18640
6
                                let v1236 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Sign);
18641
6
                                let v1242 = constructor_output_gpr(ctx, v1236);
18642
6
                                // Rule at src/isa/x64/lower.isle line 2457.
18643
6
                                return Some(v1242);
18644
                            }
18645
                            I128 => {
18646
0
                                let v1236 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Sign);
18647
0
                                let v840 = Imm8Reg::Imm8 {
18648
0
                                    imm: 0x3F,
18649
0
                                };
18650
0
                                let v841 = &C::imm8_reg_to_imm8_gpr(ctx, &v840);
18651
0
                                let v1237 = constructor_x64_sar(ctx, I64, v1236, v841);
18652
0
                                let v1238 = C::gpr_to_reg(ctx, v1236);
18653
0
                                let v1239 = C::gpr_to_reg(ctx, v1237);
18654
0
                                let v1240 = C::value_regs(ctx, v1238, v1239);
18655
0
                                let v1241 = C::output(ctx, v1240);
18656
0
                                // Rule at src/isa/x64/lower.isle line 2451.
18657
0
                                return Some(v1241);
18658
                            }
18659
138
                            _ => {}
18660
138
                        }
18661
138
                        let v1233 = C::fits_in_32(ctx, v3);
18662
138
                        if let Some(v1234) = v1233 {
18663
138
                            let v1243 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
18664
138
                            let v1244 = constructor_output_gpr(ctx, v1243);
18665
138
                            // Rule at src/isa/x64/lower.isle line 2462.
18666
138
                            return Some(v1244);
18667
0
                        }
18668
0
                    }
18669
                }
18670
                &Opcode::Fpromote => {
18671
0
                    let v1 = C::first_result(ctx, arg0);
18672
0
                    if let Some(v2) = v1 {
18673
0
                        let v3 = C::value_type(ctx, v2);
18674
0
                        if v3 == F64 {
18675
0
                            let v526 = &C::put_in_xmm_mem(ctx, v381);
18676
0
                            let v1309 = constructor_x64_cvtss2sd(ctx, v526);
18677
0
                            let v1310 = constructor_output_xmm(ctx, v1309);
18678
0
                            // Rule at src/isa/x64/lower.isle line 2565.
18679
0
                            return Some(v1310);
18680
0
                        }
18681
0
                    }
18682
                }
18683
                &Opcode::Fdemote => {
18684
0
                    let v1 = C::first_result(ctx, arg0);
18685
0
                    if let Some(v2) = v1 {
18686
0
                        let v3 = C::value_type(ctx, v2);
18687
0
                        if v3 == F32 {
18688
0
                            let v526 = &C::put_in_xmm_mem(ctx, v381);
18689
0
                            let v1314 = constructor_x64_cvtsd2ss(ctx, v526);
18690
0
                            let v1315 = constructor_output_xmm(ctx, v1314);
18691
0
                            // Rule at src/isa/x64/lower.isle line 2573.
18692
0
                            return Some(v1315);
18693
0
                        }
18694
0
                    }
18695
                }
18696
                &Opcode::Fvdemote => {
18697
0
                    let v1 = C::first_result(ctx, arg0);
18698
0
                    if let Some(v2) = v1 {
18699
0
                        let v3 = C::value_type(ctx, v2);
18700
0
                        if v3 == F32X4 {
18701
0
                            let v526 = &C::put_in_xmm_mem(ctx, v381);
18702
0
                            let v1316 = constructor_x64_cvtpd2ps(ctx, v526);
18703
0
                            let v1317 = constructor_output_xmm(ctx, v1316);
18704
0
                            // Rule at src/isa/x64/lower.isle line 2577.
18705
0
                            return Some(v1317);
18706
0
                        }
18707
0
                    }
18708
                }
18709
                &Opcode::FvpromoteLow => {
18710
0
                    let v1 = C::first_result(ctx, arg0);
18711
0
                    if let Some(v2) = v1 {
18712
0
                        let v3 = C::value_type(ctx, v2);
18713
0
                        if v3 == F64X2 {
18714
0
                            let v529 = constructor_put_in_xmm(ctx, v381);
18715
0
                            let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
18716
0
                            let v1312 = constructor_x64_cvtps2pd(ctx, v1311);
18717
0
                            let v1313 = constructor_output_xmm(ctx, v1312);
18718
0
                            // Rule at src/isa/x64/lower.isle line 2569.
18719
0
                            return Some(v1313);
18720
0
                        }
18721
0
                    }
18722
                }
18723
                &Opcode::FcvtToUint => {
18724
0
                    let v1 = C::first_result(ctx, arg0);
18725
0
                    if let Some(v2) = v1 {
18726
0
                        let v622 = C::value_type(ctx, v381);
18727
0
                        let v1862 = C::ty_scalar_float(ctx, v622);
18728
0
                        if let Some(v1863) = v1862 {
18729
0
                            let v3 = C::value_type(ctx, v2);
18730
0
                            let v1864 = constructor_cvt_float_to_uint_seq(ctx, v3, v381, false);
18731
0
                            let v1865 = constructor_output_gpr(ctx, v1864);
18732
0
                            // Rule at src/isa/x64/lower.isle line 3455.
18733
0
                            return Some(v1865);
18734
0
                        }
18735
0
                    }
18736
                }
18737
                &Opcode::FcvtToSint => {
18738
0
                    let v1 = C::first_result(ctx, arg0);
18739
0
                    if let Some(v2) = v1 {
18740
0
                        let v622 = C::value_type(ctx, v381);
18741
0
                        let v1862 = C::ty_scalar_float(ctx, v622);
18742
0
                        if let Some(v1863) = v1862 {
18743
0
                            let v3 = C::value_type(ctx, v2);
18744
0
                            let v1868 = constructor_cvt_float_to_sint_seq(ctx, v3, v381, false);
18745
0
                            let v1869 = constructor_output_gpr(ctx, v1868);
18746
0
                            // Rule at src/isa/x64/lower.isle line 3461.
18747
0
                            return Some(v1869);
18748
0
                        }
18749
0
                    }
18750
                }
18751
                &Opcode::FcvtToUintSat => {
18752
0
                    let v1 = C::first_result(ctx, arg0);
18753
0
                    if let Some(v2) = v1 {
18754
0
                        let v3 = C::value_type(ctx, v2);
18755
0
                        if v3 == I32X4 {
18756
0
                            let v622 = C::value_type(ctx, v381);
18757
0
                            if v622 == F32X4 {
18758
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18759
0
                                let v1886 = constructor_xmm_zero(ctx, F32X4);
18760
0
                                let v1887 = &C::xmm_to_xmm_mem(ctx, v1886);
18761
0
                                let v1888 = constructor_x64_maxps(ctx, v529, v1887);
18762
0
                                let v1889 = &C::xmm_to_xmm_mem(ctx, v1886);
18763
0
                                let v1890 = constructor_x64_pcmpeqd(ctx, v1886, v1889);
18764
0
                                let v1891 = &C::xmi_imm(ctx, 0x1);
18765
0
                                let v1892 = constructor_x64_psrld(ctx, v1890, v1891);
18766
0
                                let v1893 = &C::xmm_to_xmm_mem(ctx, v1892);
18767
0
                                let v1894 = constructor_x64_cvtdq2ps(ctx, v1893);
18768
0
                                let v1895 = &C::xmm_to_xmm_mem(ctx, v1888);
18769
0
                                let v1896 = constructor_x64_cvttps2dq(ctx, v1895);
18770
0
                                let v1897 = &C::xmm_to_xmm_mem(ctx, v1894);
18771
0
                                let v1898 = constructor_x64_subps(ctx, v1888, v1897);
18772
0
                                let v1899 = &C::xmm_to_xmm_mem(ctx, v1898);
18773
0
                                let v1900 = constructor_x64_cmpps(ctx, v1894, v1899, &FcmpImm::LessThanOrEqual);
18774
0
                                let v1901 = &C::xmm_to_xmm_mem(ctx, v1898);
18775
0
                                let v1902 = constructor_x64_cvttps2dq(ctx, v1901);
18776
0
                                let v1903 = &C::xmm_to_xmm_mem(ctx, v1900);
18777
0
                                let v1904 = constructor_x64_pxor(ctx, v1902, v1903);
18778
0
                                let v1905 = constructor_xmm_zero(ctx, I32X4);
18779
0
                                let v1906 = constructor_lower_vec_smax(ctx, I32X4, v1904, v1905);
18780
0
                                let v1907 = &C::xmm_to_xmm_mem(ctx, v1896);
18781
0
                                let v1908 = constructor_x64_paddd(ctx, v1906, v1907);
18782
0
                                let v1909 = constructor_output_xmm(ctx, v1908);
18783
0
                                // Rule at src/isa/x64/lower.isle line 3539.
18784
0
                                return Some(v1909);
18785
0
                            }
18786
0
                        }
18787
0
                        let v622 = C::value_type(ctx, v381);
18788
0
                        let v1862 = C::ty_scalar_float(ctx, v622);
18789
0
                        if let Some(v1863) = v1862 {
18790
0
                            let v1866 = constructor_cvt_float_to_uint_seq(ctx, v3, v381, true);
18791
0
                            let v1867 = constructor_output_gpr(ctx, v1866);
18792
0
                            // Rule at src/isa/x64/lower.isle line 3458.
18793
0
                            return Some(v1867);
18794
0
                        }
18795
0
                    }
18796
                }
18797
                &Opcode::FcvtToSintSat => {
18798
0
                    let v1 = C::first_result(ctx, arg0);
18799
0
                    if let Some(v2) = v1 {
18800
0
                        let v3 = C::value_type(ctx, v2);
18801
0
                        if v3 == I32X4 {
18802
0
                            let v622 = C::value_type(ctx, v381);
18803
0
                            if v622 == F32X4 {
18804
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18805
0
                                let v1311 = &C::xmm_to_xmm_mem(ctx, v529);
18806
0
                                let v1872 = constructor_x64_cmpps(ctx, v529, v1311, &FcmpImm::Equal);
18807
0
                                let v1873 = &C::xmm_to_xmm_mem(ctx, v1872);
18808
0
                                let v1874 = constructor_x64_andps(ctx, v529, v1873);
18809
0
                                let v1875 = &C::xmm_to_xmm_mem(ctx, v1874);
18810
0
                                let v1876 = constructor_x64_pxor(ctx, v1872, v1875);
18811
0
                                let v1877 = &C::xmm_to_xmm_mem(ctx, v1874);
18812
0
                                let v1878 = constructor_x64_cvttps2dq(ctx, v1877);
18813
0
                                let v1879 = &C::xmm_to_xmm_mem(ctx, v1876);
18814
0
                                let v1880 = constructor_x64_pand(ctx, v1878, v1879);
18815
0
                                let v1881 = &C::xmi_imm(ctx, 0x1F);
18816
0
                                let v1882 = constructor_x64_psrad(ctx, v1880, v1881);
18817
0
                                let v1883 = &C::xmm_to_xmm_mem(ctx, v1878);
18818
0
                                let v1884 = constructor_x64_pxor(ctx, v1882, v1883);
18819
0
                                let v1885 = constructor_output_xmm(ctx, v1884);
18820
0
                                // Rule at src/isa/x64/lower.isle line 3468.
18821
0
                                return Some(v1885);
18822
0
                            }
18823
0
                        }
18824
0
                        let v622 = C::value_type(ctx, v381);
18825
0
                        let v1862 = C::ty_scalar_float(ctx, v622);
18826
0
                        if let Some(v1863) = v1862 {
18827
0
                            let v1870 = constructor_cvt_float_to_sint_seq(ctx, v3, v381, true);
18828
0
                            let v1871 = constructor_output_gpr(ctx, v1870);
18829
0
                            // Rule at src/isa/x64/lower.isle line 3464.
18830
0
                            return Some(v1871);
18831
0
                        }
18832
0
                    }
18833
                }
18834
                &Opcode::X86Cvtt2dq => {
18835
0
                    let v1 = C::first_result(ctx, arg0);
18836
0
                    if let Some(v2) = v1 {
18837
0
                        let v3 = C::value_type(ctx, v2);
18838
0
                        if v3 == I32X4 {
18839
0
                            let v622 = C::value_type(ctx, v381);
18840
0
                            if v622 == F32X4 {
18841
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18842
0
                                let v1910 = constructor_x64_cvttps2dq(ctx, v526);
18843
0
                                let v1911 = constructor_output_xmm(ctx, v1910);
18844
0
                                // Rule at src/isa/x64/lower.isle line 3586.
18845
0
                                return Some(v1911);
18846
0
                            }
18847
0
                        }
18848
0
                    }
18849
                }
18850
                &Opcode::FcvtFromUint => {
18851
0
                    let v1 = C::first_result(ctx, arg0);
18852
0
                    if let Some(v2) = v1 {
18853
0
                        let v3 = C::value_type(ctx, v2);
18854
0
                        match v3 {
18855
                            F32 => {
18856
0
                                let v622 = C::value_type(ctx, v381);
18857
0
                                let v1820 = C::fits_in_32(ctx, v622);
18858
0
                                if let Some(v1821) = v1820 {
18859
0
                                    let v1822 = C::ty_int(ctx, v1821);
18860
0
                                    if let Some(v1823) = v1822 {
18861
0
                                        let v1792 = constructor_xmm_zero(ctx, F32X4);
18862
0
                                        let v1824 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18863
0
                                        let v1825 = &C::gpr_to_gpr_mem(ctx, v1824);
18864
0
                                        let v1826 = constructor_x64_cvtsi2ss(ctx, I64, v1792, v1825);
18865
0
                                        let v1827 = constructor_output_xmm(ctx, v1826);
18866
0
                                        // Rule at src/isa/x64/lower.isle line 3382.
18867
0
                                        return Some(v1827);
18868
0
                                    }
18869
0
                                }
18870
                            }
18871
                            F64 => {
18872
0
                                let v622 = C::value_type(ctx, v381);
18873
0
                                let v1820 = C::fits_in_32(ctx, v622);
18874
0
                                if let Some(v1821) = v1820 {
18875
0
                                    let v1822 = C::ty_int(ctx, v1821);
18876
0
                                    if let Some(v1823) = v1822 {
18877
0
                                        let v1804 = constructor_xmm_zero(ctx, F64X2);
18878
0
                                        let v1824 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18879
0
                                        let v1825 = &C::gpr_to_gpr_mem(ctx, v1824);
18880
0
                                        let v1828 = constructor_x64_cvtsi2sd(ctx, I64, v1804, v1825);
18881
0
                                        let v1829 = constructor_output_xmm(ctx, v1828);
18882
0
                                        // Rule at src/isa/x64/lower.isle line 3385.
18883
0
                                        return Some(v1829);
18884
0
                                    }
18885
0
                                }
18886
                            }
18887
                            F32X4 => {
18888
0
                                let v332 = C::use_avx512vl(ctx);
18889
0
                                if v332 == true {
18890
0
                                    let v333 = C::use_avx512f(ctx);
18891
0
                                    if v333 == true {
18892
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18893
0
                                        let v1842 = constructor_x64_vcvtudq2ps(ctx, v526);
18894
0
                                        let v1843 = constructor_output_xmm(ctx, v1842);
18895
0
                                        // Rule at src/isa/x64/lower.isle line 3403.
18896
0
                                        return Some(v1843);
18897
0
                                    }
18898
0
                                }
18899
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18900
0
                                let v1845 = &C::xmi_imm(ctx, 0x10);
18901
0
                                let v1846 = constructor_x64_pslld(ctx, v529, v1845);
18902
0
                                let v1847 = &C::xmi_imm(ctx, 0x10);
18903
0
                                let v1848 = constructor_x64_psrld(ctx, v1846, v1847);
18904
0
                                let v1849 = &C::xmm_to_xmm_mem(ctx, v1848);
18905
0
                                let v1850 = constructor_x64_psubd(ctx, v529, v1849);
18906
0
                                let v1851 = &C::xmm_to_xmm_mem(ctx, v1848);
18907
0
                                let v1852 = constructor_x64_cvtdq2ps(ctx, v1851);
18908
0
                                let v1853 = &C::xmi_imm(ctx, 0x1);
18909
0
                                let v1854 = constructor_x64_psrld(ctx, v1850, v1853);
18910
0
                                let v1855 = &C::xmm_to_xmm_mem(ctx, v1854);
18911
0
                                let v1856 = constructor_x64_cvtdq2ps(ctx, v1855);
18912
0
                                let v1857 = &C::xmm_to_xmm_mem(ctx, v1856);
18913
0
                                let v1858 = constructor_x64_addps(ctx, v1856, v1857);
18914
0
                                let v1859 = &C::xmm_to_xmm_mem(ctx, v1852);
18915
0
                                let v1860 = constructor_x64_addps(ctx, v1858, v1859);
18916
0
                                let v1861 = constructor_output_xmm(ctx, v1860);
18917
0
                                // Rule at src/isa/x64/lower.isle line 3431.
18918
0
                                return Some(v1861);
18919
                            }
18920
                            F64X2 => {
18921
0
                                let v1811 = C::def_inst(ctx, v381);
18922
0
                                if let Some(v1812) = v1811 {
18923
0
                                    let v1813 = &C::inst_data(ctx, v1812);
18924
                                    if let &InstructionData::Unary {
18925
0
                                        opcode: ref v1814,
18926
0
                                        arg: v1815,
18927
0
                                    } = v1813 {
18928
0
                                        if let &Opcode::UwidenLow = v1814 {
18929
0
                                            let v1816 = C::value_type(ctx, v1815);
18930
0
                                            if v1816 == I32X4 {
18931
0
                                                let v1833 = C::emit_u128_le_const(ctx, 0x4330000043300000);
18932
0
                                                let v1834 = &constructor_const_to_xmm_mem(ctx, v1833);
18933
0
                                                let v1835 = constructor_put_in_xmm(ctx, v1815);
18934
0
                                                let v1836 = constructor_x64_unpcklps(ctx, v1835, v1834);
18935
0
                                                let v1838 = C::emit_u128_le_const(ctx, 0x43300000000000004330000000000000);
18936
0
                                                let v1839 = &constructor_const_to_xmm_mem(ctx, v1838);
18937
0
                                                let v1840 = constructor_x64_subpd(ctx, v1836, v1839);
18938
0
                                                let v1841 = constructor_output_xmm(ctx, v1840);
18939
0
                                                // Rule at src/isa/x64/lower.isle line 3395.
18940
0
                                                return Some(v1841);
18941
0
                                            }
18942
0
                                        }
18943
0
                                    }
18944
0
                                }
18945
                            }
18946
0
                            _ => {}
18947
                        }
18948
0
                        let v622 = C::value_type(ctx, v381);
18949
0
                        if v622 == I64 {
18950
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
18951
0
                            let v1830 = constructor_cvt_u64_to_float_seq(ctx, v3, v382);
18952
0
                            let v1831 = constructor_output_xmm(ctx, v1830);
18953
0
                            // Rule at src/isa/x64/lower.isle line 3388.
18954
0
                            return Some(v1831);
18955
0
                        }
18956
0
                    }
18957
                }
18958
                &Opcode::FcvtFromSint => {
18959
0
                    let v1 = C::first_result(ctx, arg0);
18960
0
                    if let Some(v2) = v1 {
18961
0
                        let v3 = C::value_type(ctx, v2);
18962
0
                        match v3 {
18963
                            F32 => {
18964
0
                                let v622 = C::value_type(ctx, v381);
18965
0
                                match v622 {
18966
                                    I8 => {
18967
0
                                        let v1792 = constructor_xmm_zero(ctx, F32X4);
18968
0
                                        let v1793 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
18969
0
                                        let v1794 = &C::gpr_to_gpr_mem(ctx, v1793);
18970
0
                                        let v1795 = constructor_x64_cvtsi2ss(ctx, I32, v1792, v1794);
18971
0
                                        let v1796 = constructor_output_xmm(ctx, v1795);
18972
0
                                        // Rule at src/isa/x64/lower.isle line 3356.
18973
0
                                        return Some(v1796);
18974
                                    }
18975
                                    I16 => {
18976
0
                                        let v1792 = constructor_xmm_zero(ctx, F32X4);
18977
0
                                        let v1793 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
18978
0
                                        let v1794 = &C::gpr_to_gpr_mem(ctx, v1793);
18979
0
                                        let v1795 = constructor_x64_cvtsi2ss(ctx, I32, v1792, v1794);
18980
0
                                        let v1796 = constructor_output_xmm(ctx, v1795);
18981
0
                                        // Rule at src/isa/x64/lower.isle line 3359.
18982
0
                                        return Some(v1796);
18983
                                    }
18984
0
                                    _ => {}
18985
0
                                }
18986
0
                                let v1797 = C::ty_int(ctx, v622);
18987
0
                                if let Some(v1798) = v1797 {
18988
0
                                    let v1799 = C::fits_in_64(ctx, v1798);
18989
0
                                    if let Some(v1800) = v1799 {
18990
0
                                        let v1792 = constructor_xmm_zero(ctx, F32X4);
18991
0
                                        let v1801 = &constructor_put_in_gpr_mem(ctx, v381);
18992
0
                                        let v1802 = constructor_x64_cvtsi2ss(ctx, v1800, v1792, v1801);
18993
0
                                        let v1803 = constructor_output_xmm(ctx, v1802);
18994
0
                                        // Rule at src/isa/x64/lower.isle line 3362.
18995
0
                                        return Some(v1803);
18996
0
                                    }
18997
0
                                }
18998
                            }
18999
                            F64 => {
19000
0
                                let v622 = C::value_type(ctx, v381);
19001
0
                                match v622 {
19002
                                    I8 => {
19003
0
                                        let v1804 = constructor_xmm_zero(ctx, F64X2);
19004
0
                                        let v1793 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
19005
0
                                        let v1794 = &C::gpr_to_gpr_mem(ctx, v1793);
19006
0
                                        let v1805 = constructor_x64_cvtsi2sd(ctx, I32, v1804, v1794);
19007
0
                                        let v1806 = constructor_output_xmm(ctx, v1805);
19008
0
                                        // Rule at src/isa/x64/lower.isle line 3365.
19009
0
                                        return Some(v1806);
19010
                                    }
19011
                                    I16 => {
19012
0
                                        let v1804 = constructor_xmm_zero(ctx, F64X2);
19013
0
                                        let v1793 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
19014
0
                                        let v1794 = &C::gpr_to_gpr_mem(ctx, v1793);
19015
0
                                        let v1805 = constructor_x64_cvtsi2sd(ctx, I32, v1804, v1794);
19016
0
                                        let v1806 = constructor_output_xmm(ctx, v1805);
19017
0
                                        // Rule at src/isa/x64/lower.isle line 3368.
19018
0
                                        return Some(v1806);
19019
                                    }
19020
0
                                    _ => {}
19021
0
                                }
19022
0
                                let v1797 = C::ty_int(ctx, v622);
19023
0
                                if let Some(v1798) = v1797 {
19024
0
                                    let v1799 = C::fits_in_64(ctx, v1798);
19025
0
                                    if let Some(v1800) = v1799 {
19026
0
                                        let v1804 = constructor_xmm_zero(ctx, F64X2);
19027
0
                                        let v1801 = &constructor_put_in_gpr_mem(ctx, v381);
19028
0
                                        let v1807 = constructor_x64_cvtsi2sd(ctx, v1800, v1804, v1801);
19029
0
                                        let v1808 = constructor_output_xmm(ctx, v1807);
19030
0
                                        // Rule at src/isa/x64/lower.isle line 3371.
19031
0
                                        return Some(v1808);
19032
0
                                    }
19033
0
                                }
19034
                            }
19035
                            F64X2 => {
19036
0
                                let v1811 = C::def_inst(ctx, v381);
19037
0
                                if let Some(v1812) = v1811 {
19038
0
                                    let v1813 = &C::inst_data(ctx, v1812);
19039
                                    if let &InstructionData::Unary {
19040
0
                                        opcode: ref v1814,
19041
0
                                        arg: v1815,
19042
0
                                    } = v1813 {
19043
0
                                        if let &Opcode::SwidenLow = v1814 {
19044
0
                                            let v1816 = C::value_type(ctx, v1815);
19045
0
                                            if v1816 == I32X4 {
19046
0
                                                let v1817 = &C::put_in_xmm_mem(ctx, v1815);
19047
0
                                                let v1818 = constructor_x64_cvtdq2pd(ctx, v1817);
19048
0
                                                let v1819 = constructor_output_xmm(ctx, v1818);
19049
0
                                                // Rule at src/isa/x64/lower.isle line 3377.
19050
0
                                                return Some(v1819);
19051
0
                                            }
19052
0
                                        }
19053
0
                                    }
19054
0
                                }
19055
                            }
19056
0
                            _ => {}
19057
                        }
19058
0
                    }
19059
0
                    let v622 = C::value_type(ctx, v381);
19060
0
                    if v622 == I32X4 {
19061
0
                        let v526 = &C::put_in_xmm_mem(ctx, v381);
19062
0
                        let v1809 = constructor_x64_cvtdq2ps(ctx, v526);
19063
0
                        let v1810 = constructor_output_xmm(ctx, v1809);
19064
0
                        // Rule at src/isa/x64/lower.isle line 3374.
19065
0
                        return Some(v1810);
19066
0
                    }
19067
                }
19068
                &Opcode::Isplit => {
19069
0
                    let v622 = C::value_type(ctx, v381);
19070
0
                    if v622 == I128 {
19071
0
                        let v385 = C::put_in_regs(ctx, v381);
19072
0
                        let v2532 = C::value_regs_get(ctx, v385, 0x0);
19073
0
                        let v2533 = C::value_regs_get(ctx, v385, 0x1);
19074
0
                        let v2534 = C::value_reg(ctx, v2532);
19075
0
                        let v2535 = C::value_reg(ctx, v2533);
19076
0
                        let v2536 = C::output_pair(ctx, v2534, v2535);
19077
0
                        // Rule at src/isa/x64/lower.isle line 4612.
19078
0
                        return Some(v2536);
19079
0
                    }
19080
                }
19081
0
                _ => {}
19082
            }
19083
        }
19084
        &InstructionData::UnaryConst {
19085
0
            opcode: ref v2242,
19086
0
            constant_handle: v2243,
19087
0
        } => {
19088
0
            if let &Opcode::Vconst = v2242 {
19089
0
                let v1 = C::first_result(ctx, arg0);
19090
0
                if let Some(v2) = v1 {
19091
0
                    let v2244 = C::const_to_vconst(ctx, v2243);
19092
0
                    let v3 = C::value_type(ctx, v2);
19093
0
                    let v2245 = constructor_x64_xmm_load_const(ctx, v3, v2244);
19094
0
                    let v2246 = constructor_output_xmm(ctx, v2245);
19095
0
                    // Rule at src/isa/x64/lower.isle line 4182.
19096
0
                    return Some(v2246);
19097
0
                }
19098
0
            }
19099
        }
19100
        &InstructionData::UnaryGlobalValue {
19101
0
            opcode: ref v1688,
19102
0
            global_value: v1689,
19103
0
        } => {
19104
0
            match v1688 {
19105
                &Opcode::SymbolValue => {
19106
0
                    let v1690 = C::symbol_value_data(ctx, v1689);
19107
0
                    if let Some(v1691) = v1690 {
19108
0
                        let v1695 = constructor_load_ext_name(ctx, v1691.0, v1691.2, v1691.1);
19109
0
                        let v1696 = constructor_output_reg(ctx, v1695);
19110
0
                        // Rule at src/isa/x64/lower.isle line 3184.
19111
0
                        return Some(v1696);
19112
0
                    }
19113
                }
19114
                &Opcode::TlsValue => {
19115
0
                    let v1 = C::first_result(ctx, arg0);
19116
0
                    if let Some(v2) = v1 {
19117
0
                        let v1690 = C::symbol_value_data(ctx, v1689);
19118
0
                        if let Some(v1691) = v1690 {
19119
0
                            let v3 = C::value_type(ctx, v2);
19120
0
                            let v2537 = &C::tls_model(ctx, v3);
19121
0
                            match v2537 {
19122
                                &TlsModel::ElfGd => {
19123
0
                                    let v2538 = constructor_elf_tls_get_addr(ctx, v1691.0);
19124
0
                                    let v2539 = constructor_output_gpr(ctx, v2538);
19125
0
                                    // Rule at src/isa/x64/lower.isle line 4620.
19126
0
                                    return Some(v2539);
19127
                                }
19128
                                &TlsModel::Macho => {
19129
0
                                    let v2540 = constructor_macho_tls_get_addr(ctx, v1691.0);
19130
0
                                    let v2541 = constructor_output_gpr(ctx, v2540);
19131
0
                                    // Rule at src/isa/x64/lower.isle line 4623.
19132
0
                                    return Some(v2541);
19133
                                }
19134
                                &TlsModel::Coff => {
19135
0
                                    let v2542 = constructor_coff_tls_get_addr(ctx, v1691.0);
19136
0
                                    let v2543 = constructor_output_gpr(ctx, v2542);
19137
0
                                    // Rule at src/isa/x64/lower.isle line 4626.
19138
0
                                    return Some(v2543);
19139
                                }
19140
0
                                _ => {}
19141
                            }
19142
0
                        }
19143
0
                    }
19144
                }
19145
0
                _ => {}
19146
            }
19147
        }
19148
        &InstructionData::UnaryIeee32 {
19149
0
            opcode: ref v18,
19150
0
            imm: v19,
19151
0
        } => {
19152
0
            if let &Opcode::F32const = v18 {
19153
0
                let v20 = C::u32_from_ieee32(ctx, v19);
19154
0
                let v22 = C::u32_as_u64(ctx, v20);
19155
0
                let v23 = constructor_imm(ctx, F32, v22);
19156
0
                let v24 = constructor_output_reg(ctx, v23);
19157
0
                // Rule at src/isa/x64/lower.isle line 27.
19158
0
                return Some(v24);
19159
0
            }
19160
        }
19161
        &InstructionData::UnaryIeee64 {
19162
0
            opcode: ref v25,
19163
0
            imm: v26,
19164
0
        } => {
19165
0
            if let &Opcode::F64const = v25 {
19166
0
                let v27 = C::u64_from_ieee64(ctx, v26);
19167
0
                let v29 = constructor_imm(ctx, F64, v27);
19168
0
                let v30 = constructor_output_reg(ctx, v29);
19169
0
                // Rule at src/isa/x64/lower.isle line 32.
19170
0
                return Some(v30);
19171
0
            }
19172
        }
19173
        &InstructionData::UnaryImm {
19174
808k
            opcode: ref v7,
19175
808k
            imm: v8,
19176
808k
        } => {
19177
808k
            if let &Opcode::Iconst = v7 {
19178
808k
                let v1 = C::first_result(ctx, arg0);
19179
808k
                if let Some(v2) = v1 {
19180
808k
                    let v3 = C::value_type(ctx, v2);
19181
808k
                    if v3 == I128 {
19182
0
                        let v9 = C::u64_from_imm64(ctx, v8);
19183
0
                        let v13 = constructor_imm(ctx, I64, v9);
19184
0
                        let v15 = constructor_imm(ctx, I64, 0x0);
19185
0
                        let v16 = C::value_regs(ctx, v13, v15);
19186
0
                        let v17 = C::output(ctx, v16);
19187
0
                        // Rule at src/isa/x64/lower.isle line 20.
19188
0
                        return Some(v17);
19189
808k
                    }
19190
808k
                    let v4 = C::fits_in_64(ctx, v3);
19191
808k
                    if let Some(v5) = v4 {
19192
808k
                        let v9 = C::u64_from_imm64(ctx, v8);
19193
808k
                        let v10 = constructor_imm(ctx, v5, v9);
19194
808k
                        let v11 = constructor_output_reg(ctx, v10);
19195
808k
                        // Rule at src/isa/x64/lower.isle line 15.
19196
808k
                        return Some(v11);
19197
0
                    }
19198
0
                }
19199
0
            }
19200
        }
19201
0
        _ => {}
19202
    }
19203
0
    None
19204
5.79M
}
19205
19206
// Generated as internal constructor for term lower_branch.
19207
778k
pub fn constructor_lower_branch<C: Context>(
19208
778k
    ctx: &mut C,
19209
778k
    arg0: Inst,
19210
778k
    arg1: &MachLabelSlice,
19211
778k
) -> Option<Unit> {
19212
778k
    let v1 = &C::inst_data(ctx, arg0);
19213
778k
    match v1 {
19214
        &InstructionData::BranchTable {
19215
15.3k
            opcode: ref v55,
19216
15.3k
            arg: v56,
19217
15.3k
            table: v57,
19218
15.3k
        } => {
19219
15.3k
            if let &Opcode::BrTable = v55 {
19220
15.3k
                let v59 = C::jump_table_targets(ctx, arg1);
19221
15.3k
                if let Some(v60) = v59 {
19222
15.3k
                    let v58 = C::value_type(ctx, v56);
19223
15.3k
                    let v63 = &C::raw_operand_size_of_type(ctx, v58);
19224
15.3k
                    let v64 = C::jump_table_size(ctx, &v60.1);
19225
15.3k
                    let v65 = C::u32_as_u64(ctx, v64);
19226
15.3k
                    let v66 = constructor_imm(ctx, v58, v65);
19227
15.3k
                    let v69 = constructor_extend_to_gpr(ctx, v56, I64, &ExtendKind::Zero);
19228
15.3k
                    let v70 = &constructor_reg_to_gpr_mem_imm(ctx, v66);
19229
15.3k
                    let v71 = &constructor_x64_cmp(ctx, v63, v70, v69);
19230
15.3k
                    let v73 = &C::gpr_to_gpr_mem(ctx, v69);
19231
15.3k
                    let v74 = C::gpr_new(ctx, v66);
19232
15.3k
                    let v75 = &constructor_cmove(ctx, v58, &CC::B, v73, v74);
19233
15.3k
                    let v76 = constructor_with_flags_reg(ctx, v71, v75);
19234
15.3k
                    let v77 = C::gpr_new(ctx, v76);
19235
15.3k
                    let v78 = &constructor_jmp_table_seq(ctx, v58, v77, v60.0, &v60.1);
19236
15.3k
                    let v79 = constructor_emit_side_effect(ctx, v78);
19237
15.3k
                    // Rule at src/isa/x64/lower.isle line 3313.
19238
15.3k
                    return Some(v79);
19239
0
                }
19240
0
            }
19241
        }
19242
        &InstructionData::Brif {
19243
452k
            opcode: ref v9,
19244
452k
            arg: v10,
19245
452k
            blocks: ref v11,
19246
452k
        } => {
19247
452k
            if let &Opcode::Brif = v9 {
19248
452k
                let v26 = C::two_targets(ctx, arg1);
19249
452k
                if let Some(v27) = v26 {
19250
452k
                    let v12 = C::maybe_uextend(ctx, v10);
19251
452k
                    if let Some(v13) = v12 {
19252
452k
                        let v14 = C::def_inst(ctx, v13);
19253
452k
                        if let Some(
v15418k
) = v14 {
19254
418k
                            let v16 = &C::inst_data(ctx, v15);
19255
418k
                            match v16 {
19256
                                &InstructionData::FloatCompare {
19257
0
                                    opcode: ref v33,
19258
0
                                    args: ref v34,
19259
0
                                    cond: ref v35,
19260
0
                                } => {
19261
0
                                    if let &Opcode::Fcmp = v33 {
19262
0
                                        let v36 = C::unpack_value_array_2(ctx, v34);
19263
0
                                        let v39 = &constructor_emit_fcmp(ctx, v35, v36.0, v36.1);
19264
0
                                        let v40 = &constructor_jmp_cond_fcmp(ctx, v39, v27.0, v27.1);
19265
0
                                        let v41 = constructor_emit_side_effect(ctx, v40);
19266
0
                                        // Rule at src/isa/x64/lower.isle line 3274.
19267
0
                                        return Some(v41);
19268
0
                                    }
19269
                                }
19270
                                &InstructionData::IntCompare {
19271
338k
                                    opcode: ref v17,
19272
338k
                                    args: ref v18,
19273
338k
                                    cond: ref v19,
19274
338k
                                } => {
19275
338k
                                    if let &Opcode::Icmp = v17 {
19276
338k
                                        let v20 = C::unpack_value_array_2(ctx, v18);
19277
338k
                                        let v30 = &constructor_emit_cmp(ctx, v19, v20.0, v20.1);
19278
338k
                                        let v31 = &constructor_jmp_cond_icmp(ctx, v30, v27.0, v27.1);
19279
338k
                                        let v32 = constructor_emit_side_effect(ctx, v31);
19280
338k
                                        // Rule at src/isa/x64/lower.isle line 3271.
19281
338k
                                        return Some(v32);
19282
0
                                    }
19283
                                }
19284
80.7k
                                _ => {}
19285
                            }
19286
33.2k
                        }
19287
0
                    }
19288
114k
                    let v42 = C::value_type(ctx, v10);
19289
114k
                    if v42 == I128 {
19290
0
                        let v44 = C::put_in_regs(ctx, v10);
19291
0
                        let v45 = &constructor_cmp_zero_i128(ctx, &CC::Z, v44);
19292
0
                        let v46 = &constructor_jmp_cond_icmp(ctx, v45, v27.0, v27.1);
19293
0
                        let v47 = constructor_emit_side_effect(ctx, v46);
19294
0
                        // Rule at src/isa/x64/lower.isle line 3277.
19295
0
                        return Some(v47);
19296
114k
                    }
19297
114k
                    let v48 = C::ty_int_bool_or_ref(ctx, v42);
19298
114k
                    if let Some(v49) = v48 {
19299
114k
                        let v50 = &constructor_cmp_zero_int_bool_ref(ctx, v10);
19300
114k
                        let v52 = &constructor_jmp_cond(ctx, &CC::NZ, v27.0, v27.1);
19301
114k
                        let v53 = &constructor_with_flags_side_effect(ctx, v50, v52);
19302
114k
                        let v54 = constructor_emit_side_effect(ctx, v53);
19303
114k
                        // Rule at src/isa/x64/lower.isle line 3281.
19304
114k
                        return Some(v54);
19305
0
                    }
19306
0
                }
19307
0
            }
19308
        }
19309
        &InstructionData::Jump {
19310
311k
            opcode: ref v2,
19311
311k
            destination: v3,
19312
311k
        } => {
19313
311k
            if let &Opcode::Jump = v2 {
19314
311k
                let v5 = C::single_target(ctx, arg1);
19315
311k
                if let Some(v6) = v5 {
19316
311k
                    let v7 = &constructor_jmp_known(ctx, v6);
19317
311k
                    let v8 = constructor_emit_side_effect(ctx, v7);
19318
311k
                    // Rule at src/isa/x64/lower.isle line 3266.
19319
311k
                    return Some(v8);
19320
0
                }
19321
0
            }
19322
        }
19323
0
        _ => {}
19324
    }
19325
0
    None
19326
778k
}
19327
19328
// Generated as internal constructor for term construct_overflow_op.
19329
0
pub fn constructor_construct_overflow_op<C: Context>(
19330
0
    ctx: &mut C,
19331
0
    arg0: &CC,
19332
0
    arg1: &ProducesFlags,
19333
0
) -> InstOutput {
19334
0
    let v2 = &constructor_x64_setcc_paired(ctx, arg0);
19335
0
    let v3 = constructor_with_flags(ctx, arg1, v2);
19336
0
    let v5 = C::value_regs_get(ctx, v3, 0x0);
19337
0
    let v6 = C::value_reg(ctx, v5);
19338
0
    let v8 = C::value_regs_get(ctx, v3, 0x1);
19339
0
    let v9 = C::value_reg(ctx, v8);
19340
0
    let v10 = C::output_pair(ctx, v6, v9);
19341
0
    // Rule at src/isa/x64/lower.isle line 104.
19342
0
    return v10;
19343
0
}
19344
19345
// Generated as internal constructor for term construct_overflow_op_alu.
19346
0
pub fn constructor_construct_overflow_op_alu<C: Context>(
19347
0
    ctx: &mut C,
19348
0
    arg0: Type,
19349
0
    arg1: &CC,
19350
0
    arg2: &AluRmiROpcode,
19351
0
    arg3: Gpr,
19352
0
    arg4: &GprMemImm,
19353
0
) -> InstOutput {
19354
0
    let v5 = &constructor_x64_alurmi_with_flags_paired(ctx, arg2, arg0, arg3, arg4);
19355
0
    let v6 = constructor_construct_overflow_op(ctx, arg1, v5);
19356
0
    // Rule at src/isa/x64/lower.isle line 111.
19357
0
    return v6;
19358
0
}
19359
19360
// Generated as internal constructor for term construct_overflow_op_alu_128.
19361
0
pub fn constructor_construct_overflow_op_alu_128<C: Context>(
19362
0
    ctx: &mut C,
19363
0
    arg0: &CC,
19364
0
    arg1: &AluRmiROpcode,
19365
0
    arg2: &AluRmiROpcode,
19366
0
    arg3: Value,
19367
0
    arg4: Value,
19368
0
) -> InstOutput {
19369
0
    let v5 = C::put_in_regs(ctx, arg3);
19370
0
    let v7 = constructor_value_regs_get_gpr(ctx, v5, 0x0);
19371
0
    let v9 = constructor_value_regs_get_gpr(ctx, v5, 0x1);
19372
0
    let v10 = C::put_in_regs(ctx, arg4);
19373
0
    let v11 = constructor_value_regs_get_gpr(ctx, v10, 0x0);
19374
0
    let v12 = constructor_value_regs_get_gpr(ctx, v10, 0x1);
19375
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
19376
0
    let v15 = &constructor_x64_alurmi_with_flags_paired(ctx, arg1, I64, v7, v14);
19377
0
    let v16 = &C::gpr_to_gpr_mem_imm(ctx, v12);
19378
0
    let v17 = &constructor_x64_alurmi_with_flags_chained(ctx, arg2, I64, v9, v16);
19379
0
    let v18 = &constructor_x64_setcc_paired(ctx, arg0);
19380
0
    let v19 = &constructor_with_flags_chained(ctx, v15, v17, v18);
19381
0
    let v20 = constructor_multi_reg_to_pair_and_single(ctx, v19);
19382
0
    // Rule at src/isa/x64/lower.isle line 119.
19383
0
    return v20;
19384
0
}
19385
19386
// Generated as internal constructor for term sse_and.
19387
0
pub fn constructor_sse_and<C: Context>(
19388
0
    ctx: &mut C,
19389
0
    arg0: Type,
19390
0
    arg1: Xmm,
19391
0
    arg2: &XmmMem,
19392
0
) -> Xmm {
19393
0
    match arg0 {
19394
        F32 => {
19395
0
            let v3 = constructor_x64_andps(ctx, arg1, arg2);
19396
0
            // Rule at src/isa/x64/lower.isle line 293.
19397
0
            return v3;
19398
        }
19399
        F64 => {
19400
0
            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
19401
0
            // Rule at src/isa/x64/lower.isle line 294.
19402
0
            return v4;
19403
        }
19404
        F32X4 => {
19405
0
            let v3 = constructor_x64_andps(ctx, arg1, arg2);
19406
0
            // Rule at src/isa/x64/lower.isle line 291.
19407
0
            return v3;
19408
        }
19409
        F64X2 => {
19410
0
            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
19411
0
            // Rule at src/isa/x64/lower.isle line 292.
19412
0
            return v4;
19413
        }
19414
0
        _ => {}
19415
0
    }
19416
0
    let v5 = C::multi_lane(ctx, arg0);
19417
0
    if let Some(v6) = v5 {
19418
0
        let v9 = constructor_x64_pand(ctx, arg1, arg2);
19419
0
        // Rule at src/isa/x64/lower.isle line 295.
19420
0
        return v9;
19421
0
    }
19422
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_and", "src/isa/x64/lower.isle line 290")
19423
0
}
19424
19425
// Generated as internal constructor for term and_i128.
19426
0
pub fn constructor_and_i128<C: Context>(
19427
0
    ctx: &mut C,
19428
0
    arg0: ValueRegs,
19429
0
    arg1: ValueRegs,
19430
0
) -> ValueRegs {
19431
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19432
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19433
0
    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
19434
0
    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
19435
0
    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
19436
0
    let v10 = constructor_x64_and(ctx, I64, v3, v9);
19437
0
    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19438
0
    let v12 = constructor_x64_and(ctx, I64, v5, v11);
19439
0
    let v13 = constructor_value_gprs(ctx, v10, v12);
19440
0
    // Rule at src/isa/x64/lower.isle line 304.
19441
0
    return v13;
19442
0
}
19443
19444
// Generated as internal constructor for term sse_and_not.
19445
0
pub fn constructor_sse_and_not<C: Context>(
19446
0
    ctx: &mut C,
19447
0
    arg0: Type,
19448
0
    arg1: Xmm,
19449
0
    arg2: &XmmMem,
19450
0
) -> Xmm {
19451
0
    match arg0 {
19452
        F32X4 => {
19453
0
            let v3 = constructor_x64_andnps(ctx, arg1, arg2);
19454
0
            // Rule at src/isa/x64/lower.isle line 322.
19455
0
            return v3;
19456
        }
19457
        F64X2 => {
19458
0
            let v4 = constructor_x64_andnpd(ctx, arg1, arg2);
19459
0
            // Rule at src/isa/x64/lower.isle line 323.
19460
0
            return v4;
19461
        }
19462
0
        _ => {}
19463
0
    }
19464
0
    let v5 = C::multi_lane(ctx, arg0);
19465
0
    if let Some(v6) = v5 {
19466
0
        let v9 = constructor_x64_pandn(ctx, arg1, arg2);
19467
0
        // Rule at src/isa/x64/lower.isle line 324.
19468
0
        return v9;
19469
0
    }
19470
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_and_not", "src/isa/x64/lower.isle line 321")
19471
0
}
19472
19473
// Generated as internal constructor for term val_minus_one.
19474
143k
pub fn constructor_val_minus_one<C: Context>(
19475
143k
    ctx: &mut C,
19476
143k
    arg0: Value,
19477
143k
) -> Option<Value> {
19478
143k
    let v1 = C::def_inst(ctx, arg0);
19479
143k
    if let Some(
v2135k
) = v1 {
19480
135k
        let v3 = &C::inst_data(ctx, v2);
19481
        if let &InstructionData::Binary {
19482
16.4k
            opcode: ref v4,
19483
16.4k
            args: ref v5,
19484
135k
        } = v3 {
19485
16.4k
            match v4 {
19486
                &Opcode::Iadd => {
19487
4.75k
                    let v6 = C::unpack_value_array_2(ctx, v5);
19488
4.75k
                    let v17 = C::i64_from_iconst(ctx, v6.0);
19489
4.75k
                    if let Some(
v180
) = v17 {
19490
0
                        if v18 == -0x1 {
19491
                            // Rule at src/isa/x64/lower.isle line 353.
19492
0
                            return Some(v6.1);
19493
0
                        }
19494
4.75k
                    }
19495
4.75k
                    let v15 = C::i64_from_iconst(ctx, v6.1);
19496
4.75k
                    if let Some(
v163.47k
) = v15 {
19497
3.47k
                        if v16 == -0x1 {
19498
                            // Rule at src/isa/x64/lower.isle line 352.
19499
1.48k
                            return Some(v6.0);
19500
1.98k
                        }
19501
1.28k
                    }
19502
                }
19503
                &Opcode::Isub => {
19504
4.80k
                    let v6 = C::unpack_value_array_2(ctx, v5);
19505
4.80k
                    let v9 = C::def_inst(ctx, v6.1);
19506
4.80k
                    if let Some(
v104.56k
) = v9 {
19507
4.56k
                        let v11 = &C::inst_data(ctx, v10);
19508
                        if let &InstructionData::UnaryImm {
19509
4.12k
                            opcode: ref v12,
19510
4.12k
                            imm: v13,
19511
4.56k
                        } = v11 {
19512
4.12k
                            if let &Opcode::Iconst = v12 {
19513
4.12k
                                let v14 = C::u64_from_imm64(ctx, v13);
19514
4.12k
                                if v14 == 0x1 {
19515
                                    // Rule at src/isa/x64/lower.isle line 351.
19516
0
                                    return Some(v6.0);
19517
4.12k
                                }
19518
0
                            }
19519
437
                        }
19520
237
                    }
19521
                }
19522
6.85k
                _ => {}
19523
            }
19524
119k
        }
19525
7.35k
    }
19526
141k
    None
19527
143k
}
19528
19529
// Generated as internal constructor for term sse_or.
19530
0
pub fn constructor_sse_or<C: Context>(
19531
0
    ctx: &mut C,
19532
0
    arg0: Type,
19533
0
    arg1: Xmm,
19534
0
    arg2: &XmmMem,
19535
0
) -> Xmm {
19536
0
    match arg0 {
19537
        F32 => {
19538
0
            let v3 = constructor_x64_orps(ctx, arg1, arg2);
19539
0
            // Rule at src/isa/x64/lower.isle line 417.
19540
0
            return v3;
19541
        }
19542
        F64 => {
19543
0
            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
19544
0
            // Rule at src/isa/x64/lower.isle line 418.
19545
0
            return v4;
19546
        }
19547
        F32X4 => {
19548
0
            let v3 = constructor_x64_orps(ctx, arg1, arg2);
19549
0
            // Rule at src/isa/x64/lower.isle line 415.
19550
0
            return v3;
19551
        }
19552
        F64X2 => {
19553
0
            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
19554
0
            // Rule at src/isa/x64/lower.isle line 416.
19555
0
            return v4;
19556
        }
19557
0
        _ => {}
19558
0
    }
19559
0
    let v5 = C::multi_lane(ctx, arg0);
19560
0
    if let Some(v6) = v5 {
19561
0
        let v9 = constructor_x64_por(ctx, arg1, arg2);
19562
0
        // Rule at src/isa/x64/lower.isle line 419.
19563
0
        return v9;
19564
0
    }
19565
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_or", "src/isa/x64/lower.isle line 414")
19566
0
}
19567
19568
// Generated as internal constructor for term or_i128.
19569
0
pub fn constructor_or_i128<C: Context>(
19570
0
    ctx: &mut C,
19571
0
    arg0: ValueRegs,
19572
0
    arg1: ValueRegs,
19573
0
) -> ValueRegs {
19574
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19575
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19576
0
    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
19577
0
    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
19578
0
    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
19579
0
    let v10 = constructor_x64_or(ctx, I64, v3, v9);
19580
0
    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19581
0
    let v12 = constructor_x64_or(ctx, I64, v5, v11);
19582
0
    let v13 = constructor_value_gprs(ctx, v10, v12);
19583
0
    // Rule at src/isa/x64/lower.isle line 428.
19584
0
    return v13;
19585
0
}
19586
19587
// Generated as internal constructor for term shl_i128.
19588
0
pub fn constructor_shl_i128<C: Context>(
19589
0
    ctx: &mut C,
19590
0
    arg0: ValueRegs,
19591
0
    arg1: Gpr,
19592
0
) -> ValueRegs {
19593
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19594
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19595
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
19596
0
    let v8 = constructor_x64_shl(ctx, I64, v3, v7);
19597
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
19598
0
    let v10 = constructor_x64_shl(ctx, I64, v5, v9);
19599
0
    let v12 = constructor_imm(ctx, I64, 0x40);
19600
0
    let v13 = C::gpr_new(ctx, v12);
19601
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
19602
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
19603
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
19604
0
    let v17 = constructor_x64_shr(ctx, I64, v3, v16);
19605
0
    let v19 = constructor_imm(ctx, I64, 0x0);
19606
0
    let v20 = C::gpr_new(ctx, v19);
19607
0
    let v23 = RegMemImm::Imm {
19608
0
        simm32: 0x7F,
19609
0
    };
19610
0
    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
19611
0
    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
19612
0
    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
19613
0
    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
19614
0
    let v29 = constructor_with_flags_reg(ctx, v25, v28);
19615
0
    let v30 = C::gpr_new(ctx, v29);
19616
0
    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v10);
19617
0
    let v32 = constructor_x64_or(ctx, I64, v30, v31);
19618
0
    let v34 = RegMemImm::Imm {
19619
0
        simm32: 0x40,
19620
0
    };
19621
0
    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
19622
0
    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
19623
0
    let v37 = &C::gpr_to_gpr_mem(ctx, v8);
19624
0
    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v20);
19625
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v32);
19626
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v8);
19627
0
    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
19628
0
    let v42 = constructor_with_flags(ctx, v36, v41);
19629
0
    // Rule at src/isa/x64/lower.isle line 502.
19630
0
    return v42;
19631
0
}
19632
19633
// Generated as internal constructor for term ishl_i8x16_mask.
19634
0
pub fn constructor_ishl_i8x16_mask<C: Context>(
19635
0
    ctx: &mut C,
19636
0
    arg0: &RegMemImm,
19637
0
) -> SyntheticAmode {
19638
0
    match arg0 {
19639
        &RegMemImm::Reg {
19640
0
            reg: v3,
19641
0
        } => {
19642
0
            let v4 = &C::ishl_i8x16_mask_table(ctx);
19643
0
            let v6 = constructor_x64_lea(ctx, I64, v4);
19644
0
            let v7 = C::gpr_new(ctx, v3);
19645
0
            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
19646
0
            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
19647
0
            let v13 = C::mem_flags_trusted(ctx);
19648
0
            let v14 = Amode::ImmRegRegShift {
19649
0
                simm32: 0x0,
19650
0
                base: v6,
19651
0
                index: v10,
19652
0
                shift: 0x0,
19653
0
                flags: v13,
19654
0
            };
19655
0
            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
19656
0
            // Rule at src/isa/x64/lower.isle line 576.
19657
0
            return v15.clone();
19658
        }
19659
        &RegMemImm::Mem {
19660
0
            addr: ref v16,
19661
0
        } => {
19662
0
            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
19663
0
            let v19 = RegMemImm::Reg {
19664
0
                reg: v18,
19665
0
            };
19666
0
            let v20 = &constructor_ishl_i8x16_mask(ctx, &v19);
19667
0
            // Rule at src/isa/x64/lower.isle line 587.
19668
0
            return v20.clone();
19669
        }
19670
        &RegMemImm::Imm {
19671
0
            simm32: v1,
19672
0
        } => {
19673
0
            let v2 = &C::ishl_i8x16_mask_for_const(ctx, v1);
19674
0
            // Rule at src/isa/x64/lower.isle line 567.
19675
0
            return v2.clone();
19676
        }
19677
0
        _ => {}
19678
0
    }
19679
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "ishl_i8x16_mask", "src/isa/x64/lower.isle line 561")
19680
0
}
19681
19682
// Generated as internal constructor for term shr_i128.
19683
0
pub fn constructor_shr_i128<C: Context>(
19684
0
    ctx: &mut C,
19685
0
    arg0: ValueRegs,
19686
0
    arg1: Gpr,
19687
0
) -> ValueRegs {
19688
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19689
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19690
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
19691
0
    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
19692
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
19693
0
    let v10 = constructor_x64_shr(ctx, I64, v5, v9);
19694
0
    let v12 = constructor_imm(ctx, I64, 0x40);
19695
0
    let v13 = C::gpr_new(ctx, v12);
19696
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
19697
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
19698
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
19699
0
    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
19700
0
    let v19 = constructor_imm(ctx, I64, 0x0);
19701
0
    let v20 = C::gpr_new(ctx, v19);
19702
0
    let v23 = RegMemImm::Imm {
19703
0
        simm32: 0x7F,
19704
0
    };
19705
0
    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
19706
0
    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
19707
0
    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
19708
0
    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
19709
0
    let v29 = constructor_with_flags_reg(ctx, v25, v28);
19710
0
    let v30 = C::gpr_new(ctx, v29);
19711
0
    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v8);
19712
0
    let v32 = constructor_x64_or(ctx, I64, v30, v31);
19713
0
    let v34 = RegMemImm::Imm {
19714
0
        simm32: 0x40,
19715
0
    };
19716
0
    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
19717
0
    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
19718
0
    let v37 = &C::gpr_to_gpr_mem(ctx, v32);
19719
0
    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v10);
19720
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v10);
19721
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v20);
19722
0
    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
19723
0
    let v42 = constructor_with_flags(ctx, v36, v41);
19724
0
    // Rule at src/isa/x64/lower.isle line 612.
19725
0
    return v42;
19726
0
}
19727
19728
// Generated as internal constructor for term ushr_i8x16_mask.
19729
0
pub fn constructor_ushr_i8x16_mask<C: Context>(
19730
0
    ctx: &mut C,
19731
0
    arg0: &RegMemImm,
19732
0
) -> SyntheticAmode {
19733
0
    match arg0 {
19734
        &RegMemImm::Reg {
19735
0
            reg: v3,
19736
0
        } => {
19737
0
            let v4 = &C::ushr_i8x16_mask_table(ctx);
19738
0
            let v6 = constructor_x64_lea(ctx, I64, v4);
19739
0
            let v7 = C::gpr_new(ctx, v3);
19740
0
            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
19741
0
            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
19742
0
            let v13 = C::mem_flags_trusted(ctx);
19743
0
            let v14 = Amode::ImmRegRegShift {
19744
0
                simm32: 0x0,
19745
0
                base: v6,
19746
0
                index: v10,
19747
0
                shift: 0x0,
19748
0
                flags: v13,
19749
0
            };
19750
0
            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
19751
0
            // Rule at src/isa/x64/lower.isle line 681.
19752
0
            return v15.clone();
19753
        }
19754
        &RegMemImm::Mem {
19755
0
            addr: ref v16,
19756
0
        } => {
19757
0
            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
19758
0
            let v19 = RegMemImm::Reg {
19759
0
                reg: v18,
19760
0
            };
19761
0
            let v20 = &constructor_ushr_i8x16_mask(ctx, &v19);
19762
0
            // Rule at src/isa/x64/lower.isle line 693.
19763
0
            return v20.clone();
19764
        }
19765
        &RegMemImm::Imm {
19766
0
            simm32: v1,
19767
0
        } => {
19768
0
            let v2 = &C::ushr_i8x16_mask_for_const(ctx, v1);
19769
0
            // Rule at src/isa/x64/lower.isle line 672.
19770
0
            return v2.clone();
19771
        }
19772
0
        _ => {}
19773
0
    }
19774
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "ushr_i8x16_mask", "src/isa/x64/lower.isle line 666")
19775
0
}
19776
19777
// Generated as internal constructor for term mask_xmm_shift.
19778
0
pub fn constructor_mask_xmm_shift<C: Context>(
19779
0
    ctx: &mut C,
19780
0
    arg0: Type,
19781
0
    arg1: Value,
19782
0
) -> RegMemImm {
19783
0
    let v11 = C::def_inst(ctx, arg1);
19784
0
    if let Some(v12) = v11 {
19785
0
        let v13 = &C::inst_data(ctx, v12);
19786
        if let &InstructionData::UnaryImm {
19787
0
            opcode: ref v14,
19788
0
            imm: v15,
19789
0
        } = v13 {
19790
0
            if let &Opcode::Iconst = v14 {
19791
0
                let v16 = C::shift_amount_masked(ctx, arg0, v15);
19792
0
                let v17 = C::u8_as_u32(ctx, v16);
19793
0
                let v18 = RegMemImm::Imm {
19794
0
                    simm32: v17,
19795
0
                };
19796
0
                // Rule at src/isa/x64/lower.isle line 710.
19797
0
                return v18;
19798
0
            }
19799
0
        }
19800
0
    }
19801
0
    let v3 = constructor_put_in_gpr(ctx, arg1);
19802
0
    let v4 = C::shift_mask(ctx, arg0);
19803
0
    let v5 = C::u8_as_u32(ctx, v4);
19804
0
    let v6 = RegMemImm::Imm {
19805
0
        simm32: v5,
19806
0
    };
19807
0
    let v7 = &C::gpr_mem_imm_new(ctx, &v6);
19808
0
    let v8 = constructor_x64_and(ctx, I64, v3, v7);
19809
0
    let v9 = C::gpr_to_reg(ctx, v8);
19810
0
    let v10 = &C::reg_to_reg_mem_imm(ctx, v9);
19811
0
    // Rule at src/isa/x64/lower.isle line 708.
19812
0
    return v10.clone();
19813
0
}
19814
19815
// Generated as internal constructor for term sar_i128.
19816
0
pub fn constructor_sar_i128<C: Context>(
19817
0
    ctx: &mut C,
19818
0
    arg0: ValueRegs,
19819
0
    arg1: Gpr,
19820
0
) -> ValueRegs {
19821
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19822
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19823
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
19824
0
    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
19825
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
19826
0
    let v10 = constructor_x64_sar(ctx, I64, v5, v9);
19827
0
    let v12 = constructor_imm(ctx, I64, 0x40);
19828
0
    let v13 = C::gpr_new(ctx, v12);
19829
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
19830
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
19831
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
19832
0
    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
19833
0
    let v20 = RegMemImm::Imm {
19834
0
        simm32: 0x7F,
19835
0
    };
19836
0
    let v21 = &C::gpr_mem_imm_new(ctx, &v20);
19837
0
    let v22 = &constructor_x64_test(ctx, &OperandSize::Size64, v21, arg1);
19838
0
    let v25 = constructor_imm(ctx, I64, 0x0);
19839
0
    let v26 = &C::reg_to_gpr_mem(ctx, v25);
19840
0
    let v27 = &constructor_cmove(ctx, I64, &CC::Z, v26, v17);
19841
0
    let v28 = constructor_with_flags_reg(ctx, v22, v27);
19842
0
    let v29 = C::gpr_new(ctx, v28);
19843
0
    let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
19844
0
    let v31 = constructor_x64_or(ctx, I64, v8, v30);
19845
0
    let v33 = &C::imm8_to_imm8_gpr(ctx, 0x3F);
19846
0
    let v34 = constructor_x64_sar(ctx, I64, v5, v33);
19847
0
    let v36 = RegMemImm::Imm {
19848
0
        simm32: 0x40,
19849
0
    };
19850
0
    let v37 = &C::gpr_mem_imm_new(ctx, &v36);
19851
0
    let v38 = &constructor_x64_test(ctx, &OperandSize::Size64, v37, arg1);
19852
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v31);
19853
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v10);
19854
0
    let v41 = &C::gpr_to_gpr_mem(ctx, v10);
19855
0
    let v42 = &constructor_cmove(ctx, I64, &CC::Z, v41, v34);
19856
0
    let v43 = &constructor_consumes_flags_concat(ctx, v40, v42);
19857
0
    let v44 = constructor_with_flags(ctx, v38, v43);
19858
0
    // Rule at src/isa/x64/lower.isle line 724.
19859
0
    return v44;
19860
0
}
19861
19862
// Generated as internal constructor for term sshr_i8x16_bigger_shift.
19863
0
pub fn constructor_sshr_i8x16_bigger_shift<C: Context>(
19864
0
    ctx: &mut C,
19865
0
    arg0: Type,
19866
0
    arg1: &RegMemImm,
19867
0
) -> XmmMemImm {
19868
0
    match arg1 {
19869
        &RegMemImm::Reg {
19870
0
            reg: v7,
19871
0
        } => {
19872
0
            let v8 = C::gpr_new(ctx, v7);
19873
0
            let v9 = RegMemImm::Imm {
19874
0
                simm32: 0x8,
19875
0
            };
19876
0
            let v10 = &C::gpr_mem_imm_new(ctx, &v9);
19877
0
            let v11 = constructor_x64_add(ctx, arg0, v8, v10);
19878
0
            let v12 = C::gpr_to_reg(ctx, v11);
19879
0
            let v13 = RegMemImm::Reg {
19880
0
                reg: v12,
19881
0
            };
19882
0
            let v14 = &constructor_mov_rmi_to_xmm(ctx, &v13);
19883
0
            // Rule at src/isa/x64/lower.isle line 792.
19884
0
            return v14.clone();
19885
        }
19886
        &RegMemImm::Mem {
19887
0
            addr: ref v15,
19888
0
        } => {
19889
0
            let v17 = constructor_imm(ctx, arg0, 0x8);
19890
0
            let v18 = C::gpr_new(ctx, v17);
19891
0
            let v19 = &C::gpr_mem_imm_new(ctx, arg1);
19892
0
            let v20 = constructor_x64_add(ctx, arg0, v18, v19);
19893
0
            let v21 = C::gpr_to_reg(ctx, v20);
19894
0
            let v22 = RegMemImm::Reg {
19895
0
                reg: v21,
19896
0
            };
19897
0
            let v23 = &constructor_mov_rmi_to_xmm(ctx, &v22);
19898
0
            // Rule at src/isa/x64/lower.isle line 796.
19899
0
            return v23.clone();
19900
        }
19901
        &RegMemImm::Imm {
19902
0
            simm32: v2,
19903
0
        } => {
19904
0
            let v4 = C::u32_add(ctx, v2, 0x8);
19905
0
            let v5 = RegMemImm::Imm {
19906
0
                simm32: v4,
19907
0
            };
19908
0
            let v6 = &C::xmm_mem_imm_new(ctx, &v5);
19909
0
            // Rule at src/isa/x64/lower.isle line 790.
19910
0
            return v6.clone();
19911
        }
19912
0
        _ => {}
19913
0
    }
19914
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sshr_i8x16_bigger_shift", "src/isa/x64/lower.isle line 789")
19915
0
}
19916
19917
// Generated as internal constructor for term lower_i64x2_sshr_imm.
19918
0
pub fn constructor_lower_i64x2_sshr_imm<C: Context>(
19919
0
    ctx: &mut C,
19920
0
    arg0: Xmm,
19921
0
    arg1: u32,
19922
0
) -> Xmm {
19923
0
    let v2 = C::u32_as_u64(ctx, arg1);
19924
0
    let v4 = C::u64_lt(ctx, v2, 0x20);
19925
0
    if v4 == true {
19926
0
        let v5 = &C::xmi_imm(ctx, arg1);
19927
0
        let v6 = constructor_x64_psrad(ctx, arg0, v5);
19928
0
        let v7 = &C::xmm_to_xmm_mem(ctx, v6);
19929
0
        let v9 = constructor_x64_pshufd(ctx, v7, 0xED);
19930
0
        let v10 = &C::xmi_imm(ctx, arg1);
19931
0
        let v11 = constructor_x64_psrlq(ctx, arg0, v10);
19932
0
        let v12 = &C::xmm_to_xmm_mem(ctx, v11);
19933
0
        let v14 = constructor_x64_pshufd(ctx, v12, 0xE8);
19934
0
        let v15 = &C::xmm_to_xmm_mem(ctx, v9);
19935
0
        let v16 = constructor_x64_punpckldq(ctx, v14, v15);
19936
0
        // Rule at src/isa/x64/lower.isle line 835.
19937
0
        return v16;
19938
0
    }
19939
0
    if arg1 == 0x20 {
19940
0
        let v17 = &C::xmm_to_xmm_mem(ctx, arg0);
19941
0
        let v18 = constructor_x64_pshufd(ctx, v17, 0xED);
19942
0
        let v20 = &C::xmi_imm(ctx, 0x1F);
19943
0
        let v21 = constructor_x64_psrad(ctx, arg0, v20);
19944
0
        let v22 = &C::xmm_to_xmm_mem(ctx, v21);
19945
0
        let v23 = constructor_x64_pshufd(ctx, v22, 0xED);
19946
0
        let v24 = &C::xmm_to_xmm_mem(ctx, v23);
19947
0
        let v25 = constructor_x64_punpckldq(ctx, v18, v24);
19948
0
        // Rule at src/isa/x64/lower.isle line 846.
19949
0
        return v25;
19950
0
    }
19951
0
    let v26 = C::u64_lt(ctx, 0x20, v2);
19952
0
    if v26 == true {
19953
0
        let v27 = &C::xmi_imm(ctx, 0x1F);
19954
0
        let v28 = constructor_x64_psrad(ctx, arg0, v27);
19955
0
        let v29 = &C::xmm_to_xmm_mem(ctx, v28);
19956
0
        let v30 = constructor_x64_pshufd(ctx, v29, 0xED);
19957
0
        let v32 = C::u32_sub(ctx, arg1, 0x20);
19958
0
        let v33 = &C::xmi_imm(ctx, v32);
19959
0
        let v34 = constructor_x64_psrad(ctx, arg0, v33);
19960
0
        let v35 = &C::xmm_to_xmm_mem(ctx, v34);
19961
0
        let v36 = constructor_x64_pshufd(ctx, v35, 0xED);
19962
0
        let v37 = &C::xmm_to_xmm_mem(ctx, v30);
19963
0
        let v38 = constructor_x64_punpckldq(ctx, v36, v37);
19964
0
        // Rule at src/isa/x64/lower.isle line 857.
19965
0
        return v38;
19966
0
    }
19967
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_i64x2_sshr_imm", "src/isa/x64/lower.isle line 830")
19968
0
}
19969
19970
// Generated as internal constructor for term lower_i64x2_sshr_gpr.
19971
0
pub fn constructor_lower_i64x2_sshr_gpr<C: Context>(
19972
0
    ctx: &mut C,
19973
0
    arg0: Xmm,
19974
0
    arg1: Gpr,
19975
0
) -> Xmm {
19976
0
    let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
19977
0
    let v3 = constructor_x64_movq_to_xmm(ctx, v2);
19978
0
    let v5 = constructor_flip_high_bit_mask(ctx, I64X2);
19979
0
    let v6 = &C::xmm_to_xmm_mem_imm(ctx, v3);
19980
0
    let v7 = constructor_x64_psrlq(ctx, v5, v6);
19981
0
    let v8 = &C::xmm_to_xmm_mem_imm(ctx, v3);
19982
0
    let v9 = constructor_x64_psrlq(ctx, arg0, v8);
19983
0
    let v10 = &C::xmm_to_xmm_mem(ctx, v9);
19984
0
    let v11 = constructor_x64_pxor(ctx, v7, v10);
19985
0
    let v12 = &C::xmm_to_xmm_mem(ctx, v7);
19986
0
    let v13 = constructor_x64_psubq(ctx, v11, v12);
19987
0
    // Rule at src/isa/x64/lower.isle line 872.
19988
0
    return v13;
19989
0
}
19990
19991
// Generated as internal constructor for term lower_bmask.
19992
0
pub fn constructor_lower_bmask<C: Context>(
19993
0
    ctx: &mut C,
19994
0
    arg0: Type,
19995
0
    arg1: Type,
19996
0
    arg2: ValueRegs,
19997
0
) -> ValueRegs {
19998
0
    if arg0 == I128 {
19999
0
        let v23 = constructor_lower_bmask(ctx, I64, arg1, arg2);
20000
0
        let v24 = constructor_value_regs_get_gpr(ctx, v23, 0x0);
20001
0
        let v25 = C::gpr_to_reg(ctx, v24);
20002
0
        let v26 = C::gpr_to_reg(ctx, v24);
20003
0
        let v27 = C::value_regs(ctx, v25, v26);
20004
0
        // Rule at src/isa/x64/lower.isle line 1335.
20005
0
        return v27;
20006
0
    }
20007
0
    let v1 = C::fits_in_64(ctx, arg0);
20008
0
    if let Some(v2) = v1 {
20009
0
        if arg1 == I128 {
20010
0
            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
20011
0
            let v16 = constructor_value_regs_get_gpr(ctx, arg2, 0x1);
20012
0
            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v16);
20013
0
            let v19 = constructor_x64_or(ctx, I64, v8, v18);
20014
0
            let v20 = C::gpr_to_reg(ctx, v19);
20015
0
            let v21 = C::value_reg(ctx, v20);
20016
0
            let v22 = constructor_lower_bmask(ctx, v2, I64, v21);
20017
0
            // Rule at src/isa/x64/lower.isle line 1327.
20018
0
            return v22;
20019
0
        }
20020
0
        let v4 = C::fits_in_64(ctx, arg1);
20021
0
        if let Some(v5) = v4 {
20022
0
            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
20023
0
            let v9 = &constructor_x64_neg_paired(ctx, v5, v8);
20024
0
            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v8);
20025
0
            let v11 = &constructor_x64_sbb_paired(ctx, v2, v8, v10);
20026
0
            let v12 = constructor_with_flags(ctx, v9, v11);
20027
0
            let v14 = C::value_regs_get(ctx, v12, 0x1);
20028
0
            let v15 = C::value_reg(ctx, v14);
20029
0
            // Rule at src/isa/x64/lower.isle line 1316.
20030
0
            return v15;
20031
0
        }
20032
0
    }
20033
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_bmask", "src/isa/x64/lower.isle line 1304")
20034
0
}
20035
20036
// Generated as internal constructor for term i128_not.
20037
0
pub fn constructor_i128_not<C: Context>(
20038
0
    ctx: &mut C,
20039
0
    arg0: Value,
20040
0
) -> ValueRegs {
20041
0
    let v1 = C::put_in_regs(ctx, arg0);
20042
0
    let v3 = constructor_value_regs_get_gpr(ctx, v1, 0x0);
20043
0
    let v5 = constructor_value_regs_get_gpr(ctx, v1, 0x1);
20044
0
    let v7 = constructor_x64_not(ctx, I64, v3);
20045
0
    let v8 = constructor_x64_not(ctx, I64, v5);
20046
0
    let v9 = constructor_value_gprs(ctx, v7, v8);
20047
0
    // Rule at src/isa/x64/lower.isle line 1358.
20048
0
    return v9;
20049
0
}
20050
20051
// Generated as internal constructor for term all_ones_or_all_zeros.
20052
0
pub fn constructor_all_ones_or_all_zeros<C: Context>(
20053
0
    ctx: &mut C,
20054
0
    arg0: Value,
20055
0
) -> Option<bool> {
20056
0
    let v1 = C::def_inst(ctx, arg0);
20057
0
    if let Some(v2) = v1 {
20058
0
        let v3 = &C::inst_data(ctx, v2);
20059
0
        match v3 {
20060
            &InstructionData::FloatCompare {
20061
0
                opcode: ref v16,
20062
0
                args: ref v17,
20063
0
                cond: ref v18,
20064
0
            } => {
20065
0
                if let &Opcode::Fcmp = v16 {
20066
0
                    let v10 = C::value_type(ctx, arg0);
20067
0
                    let v11 = C::multi_lane(ctx, v10);
20068
0
                    if let Some(v12) = v11 {
20069
                        // Rule at src/isa/x64/lower.isle line 1404.
20070
0
                        return Some(true);
20071
0
                    }
20072
0
                }
20073
            }
20074
            &InstructionData::IntCompare {
20075
0
                opcode: ref v4,
20076
0
                args: ref v5,
20077
0
                cond: ref v6,
20078
0
            } => {
20079
0
                if let &Opcode::Icmp = v4 {
20080
0
                    let v10 = C::value_type(ctx, arg0);
20081
0
                    let v11 = C::multi_lane(ctx, v10);
20082
0
                    if let Some(v12) = v11 {
20083
                        // Rule at src/isa/x64/lower.isle line 1403.
20084
0
                        return Some(true);
20085
0
                    }
20086
0
                }
20087
            }
20088
            &InstructionData::UnaryConst {
20089
0
                opcode: ref v22,
20090
0
                constant_handle: v23,
20091
0
            } => {
20092
0
                if let &Opcode::Vconst = v22 {
20093
0
                    let v24 = C::vconst_all_ones_or_all_zeros(ctx, v23);
20094
0
                    if let Some(v25) = v24 {
20095
                        // Rule at src/isa/x64/lower.isle line 1405.
20096
0
                        return Some(true);
20097
0
                    }
20098
0
                }
20099
            }
20100
0
            _ => {}
20101
        }
20102
0
    }
20103
0
    None
20104
0
}
20105
20106
// Generated as internal constructor for term vec_insert_lane.
20107
0
pub fn constructor_vec_insert_lane<C: Context>(
20108
0
    ctx: &mut C,
20109
0
    arg0: Type,
20110
0
    arg1: Xmm,
20111
0
    arg2: &RegMem,
20112
0
    arg3: u8,
20113
0
) -> Xmm {
20114
0
    match arg0 {
20115
        I8X16 => {
20116
0
            let v4 = C::use_sse41(ctx);
20117
0
            if v4 == true {
20118
0
                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20119
0
                let v6 = constructor_x64_pinsrb(ctx, arg1, v5, arg3);
20120
0
                // Rule at src/isa/x64/lower.isle line 1473.
20121
0
                return v6;
20122
0
            }
20123
0
            let v7 = C::insert_i8x16_lane_hole(ctx, arg3);
20124
0
            let v8 = &constructor_const_to_xmm_mem(ctx, v7);
20125
0
            let v9 = constructor_x64_pand(ctx, arg1, v8);
20126
0
            let v11 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20127
0
            let v12 = constructor_x64_movzx(ctx, &ExtMode::BL, v11);
20128
0
            let v15 = C::u8_and(ctx, arg3, 0x3);
20129
0
            let v16 = C::u8_shl(ctx, v15, 0x3);
20130
0
            let v17 = Imm8Reg::Imm8 {
20131
0
                imm: v16,
20132
0
            };
20133
0
            let v18 = &C::imm8_reg_to_imm8_gpr(ctx, &v17);
20134
0
            let v19 = constructor_x64_shl(ctx, I32, v12, v18);
20135
0
            let v20 = &C::gpr_to_gpr_mem(ctx, v19);
20136
0
            let v21 = constructor_x64_movd_to_xmm(ctx, v20);
20137
0
            let v22 = &C::xmm_to_xmm_mem(ctx, v21);
20138
0
            let v24 = C::u8_shr(ctx, arg3, 0x2);
20139
0
            let v25 = constructor_insert_i8x16_lane_pshufd_imm(ctx, v24);
20140
0
            let v26 = constructor_x64_pshufd(ctx, v22, v25);
20141
0
            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
20142
0
            let v28 = constructor_x64_por(ctx, v9, v27);
20143
0
            // Rule at src/isa/x64/lower.isle line 1501.
20144
0
            return v28;
20145
        }
20146
        I16X8 => {
20147
0
            let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20148
0
            let v29 = constructor_x64_pinsrw(ctx, arg1, v5, arg3);
20149
0
            // Rule at src/isa/x64/lower.isle line 1518.
20150
0
            return v29;
20151
        }
20152
        I32X4 => {
20153
0
            let v4 = C::use_sse41(ctx);
20154
0
            if v4 == true {
20155
0
                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20156
0
                let v30 = constructor_x64_pinsrd(ctx, arg1, v5, arg3);
20157
0
                // Rule at src/isa/x64/lower.isle line 1522.
20158
0
                return v30;
20159
0
            }
20160
0
            match arg3 {
20161
                0x0 => {
20162
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20163
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20164
0
                    let v32 = constructor_x64_movss_regmove(ctx, arg1, v31);
20165
0
                    // Rule at src/isa/x64/lower.isle line 1526.
20166
0
                    return v32;
20167
                }
20168
                0x1 => {
20169
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20170
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20171
0
                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
20172
0
                    let v34 = constructor_x64_punpcklqdq(ctx, v31, v33);
20173
0
                    let v35 = &C::xmm_to_xmm_mem(ctx, arg1);
20174
0
                    let v37 = constructor_x64_shufps(ctx, v34, v35, 0xE2);
20175
0
                    // Rule at src/isa/x64/lower.isle line 1531.
20176
0
                    return v37;
20177
                }
20178
                0x2 => {
20179
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20180
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20181
0
                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
20182
0
                    let v39 = constructor_x64_shufps(ctx, v31, v33, 0x30);
20183
0
                    let v40 = &C::xmm_to_xmm_mem(ctx, v39);
20184
0
                    let v42 = constructor_x64_shufps(ctx, arg1, v40, 0x84);
20185
0
                    // Rule at src/isa/x64/lower.isle line 1538.
20186
0
                    return v42;
20187
                }
20188
                0x3 => {
20189
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20190
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20191
0
                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
20192
0
                    let v44 = constructor_x64_shufps(ctx, v31, v33, 0xE4);
20193
0
                    let v45 = &C::xmm_to_xmm_mem(ctx, v44);
20194
0
                    let v47 = constructor_x64_shufps(ctx, arg1, v45, 0x24);
20195
0
                    // Rule at src/isa/x64/lower.isle line 1545.
20196
0
                    return v47;
20197
                }
20198
0
                _ => {}
20199
            }
20200
        }
20201
        I64X2 => {
20202
0
            let v4 = C::use_sse41(ctx);
20203
0
            if v4 == true {
20204
0
                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20205
0
                let v48 = constructor_x64_pinsrq(ctx, arg1, v5, arg3);
20206
0
                // Rule at src/isa/x64/lower.isle line 1551.
20207
0
                return v48;
20208
0
            }
20209
0
            match arg3 {
20210
                0x0 => {
20211
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20212
0
                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
20213
0
                    let v50 = constructor_x64_movsd_regmove(ctx, arg1, v49);
20214
0
                    // Rule at src/isa/x64/lower.isle line 1554.
20215
0
                    return v50;
20216
                }
20217
                0x1 => {
20218
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20219
0
                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
20220
0
                    let v51 = &C::xmm_to_xmm_mem(ctx, v49);
20221
0
                    let v52 = constructor_x64_punpcklqdq(ctx, arg1, v51);
20222
0
                    // Rule at src/isa/x64/lower.isle line 1556.
20223
0
                    return v52;
20224
                }
20225
0
                _ => {}
20226
            }
20227
        }
20228
        F32X4 => {
20229
0
            let v4 = C::use_sse41(ctx);
20230
0
            if v4 == true {
20231
0
                let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
20232
0
                let v54 = C::sse_insertps_lane_imm(ctx, arg3);
20233
0
                let v55 = constructor_x64_insertps(ctx, arg1, v53, v54);
20234
0
                // Rule at src/isa/x64/lower.isle line 1560.
20235
0
                return v55;
20236
0
            }
20237
0
            match arg2 {
20238
                &RegMem::Reg {
20239
0
                    reg: v56,
20240
0
                } => {
20241
0
                    match arg3 {
20242
                        0x0 => {
20243
0
                            let v57 = C::xmm_new(ctx, v56);
20244
0
                            let v58 = constructor_x64_movss_regmove(ctx, arg1, v57);
20245
0
                            // Rule at src/isa/x64/lower.isle line 1565.
20246
0
                            return v58;
20247
                        }
20248
                        0x1 => {
20249
0
                            let v57 = C::xmm_new(ctx, v56);
20250
0
                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
20251
0
                            let v60 = constructor_x64_movlhps(ctx, v57, v59);
20252
0
                            let v61 = &C::xmm_to_xmm_mem(ctx, arg1);
20253
0
                            let v62 = constructor_x64_shufps(ctx, v60, v61, 0xE2);
20254
0
                            // Rule at src/isa/x64/lower.isle line 1571.
20255
0
                            return v62;
20256
                        }
20257
                        0x2 => {
20258
0
                            let v57 = C::xmm_new(ctx, v56);
20259
0
                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
20260
0
                            let v63 = constructor_x64_shufps(ctx, v57, v59, 0x30);
20261
0
                            let v64 = &C::xmm_to_xmm_mem(ctx, v63);
20262
0
                            let v65 = constructor_x64_shufps(ctx, arg1, v64, 0x84);
20263
0
                            // Rule at src/isa/x64/lower.isle line 1578.
20264
0
                            return v65;
20265
                        }
20266
                        0x3 => {
20267
0
                            let v57 = C::xmm_new(ctx, v56);
20268
0
                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
20269
0
                            let v66 = constructor_x64_shufps(ctx, v57, v59, 0xE4);
20270
0
                            let v67 = &C::xmm_to_xmm_mem(ctx, v66);
20271
0
                            let v68 = constructor_x64_shufps(ctx, arg1, v67, 0x24);
20272
0
                            // Rule at src/isa/x64/lower.isle line 1585.
20273
0
                            return v68;
20274
                        }
20275
0
                        _ => {}
20276
                    }
20277
                }
20278
                &RegMem::Mem {
20279
0
                    addr: ref v69,
20280
0
                } => {
20281
0
                    let v71 = constructor_x64_movss_load(ctx, v69);
20282
0
                    let v72 = C::xmm_to_reg(ctx, v71);
20283
0
                    let v73 = &constructor_xmm_to_reg_mem(ctx, v72);
20284
0
                    let v74 = &C::xmm_mem_to_reg_mem(ctx, v73);
20285
0
                    let v75 = constructor_vec_insert_lane(ctx, F32X4, arg1, v74, arg3);
20286
0
                    // Rule at src/isa/x64/lower.isle line 1590.
20287
0
                    return v75;
20288
                }
20289
0
                _ => {}
20290
            }
20291
        }
20292
        F64X2 => {
20293
0
            match arg3 {
20294
                0x0 => {
20295
0
                    match arg2 {
20296
                        &RegMem::Reg {
20297
0
                            reg: v56,
20298
0
                        } => {
20299
0
                            let v57 = C::xmm_new(ctx, v56);
20300
0
                            let v76 = constructor_x64_movsd_regmove(ctx, arg1, v57);
20301
0
                            // Rule at src/isa/x64/lower.isle line 1602.
20302
0
                            return v76;
20303
                        }
20304
                        &RegMem::Mem {
20305
0
                            addr: ref v69,
20306
0
                        } => {
20307
0
                            let v77 = constructor_x64_movsd_load(ctx, v69);
20308
0
                            let v78 = constructor_x64_movsd_regmove(ctx, arg1, v77);
20309
0
                            // Rule at src/isa/x64/lower.isle line 1604.
20310
0
                            return v78;
20311
                        }
20312
0
                        _ => {}
20313
                    }
20314
                }
20315
                0x1 => {
20316
0
                    let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
20317
0
                    let v79 = constructor_x64_movlhps(ctx, arg1, v53);
20318
0
                    // Rule at src/isa/x64/lower.isle line 1612.
20319
0
                    return v79;
20320
                }
20321
0
                _ => {}
20322
            }
20323
        }
20324
0
        _ => {}
20325
    }
20326
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "vec_insert_lane", "src/isa/x64/lower.isle line 1470")
20327
0
}
20328
20329
// Generated as internal constructor for term insert_i8x16_lane_pshufd_imm.
20330
0
pub fn constructor_insert_i8x16_lane_pshufd_imm<C: Context>(
20331
0
    ctx: &mut C,
20332
0
    arg0: u8,
20333
0
) -> u8 {
20334
0
    match arg0 {
20335
        0x0 => {
20336
            // Rule at src/isa/x64/lower.isle line 1512.
20337
0
            return 0x54;
20338
        }
20339
        0x1 => {
20340
            // Rule at src/isa/x64/lower.isle line 1513.
20341
0
            return 0x51;
20342
        }
20343
        0x2 => {
20344
            // Rule at src/isa/x64/lower.isle line 1514.
20345
0
            return 0x45;
20346
        }
20347
        0x3 => {
20348
            // Rule at src/isa/x64/lower.isle line 1515.
20349
0
            return 0x15;
20350
        }
20351
0
        _ => {}
20352
0
    }
20353
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "insert_i8x16_lane_pshufd_imm", "src/isa/x64/lower.isle line 1511")
20354
0
}
20355
20356
// Generated as internal constructor for term cmp_and_choose.
20357
4.65k
pub fn constructor_cmp_and_choose<C: Context>(
20358
4.65k
    ctx: &mut C,
20359
4.65k
    arg0: Type,
20360
4.65k
    arg1: &CC,
20361
4.65k
    arg2: Value,
20362
4.65k
    arg3: Value,
20363
4.65k
) -> ValueRegs {
20364
4.65k
    let v1 = C::fits_in_64(ctx, arg0);
20365
4.65k
    if let Some(v2) = v1 {
20366
4.65k
        let v6 = &C::raw_operand_size_of_type(ctx, v2);
20367
4.65k
        let v7 = C::put_in_reg(ctx, arg2);
20368
4.65k
        let v8 = C::put_in_reg(ctx, arg3);
20369
4.65k
        let v9 = &constructor_reg_to_gpr_mem_imm(ctx, v7);
20370
4.65k
        let v10 = C::gpr_new(ctx, v8);
20371
4.65k
        let v11 = &constructor_x64_cmp(ctx, v6, v9, v10);
20372
4.65k
        let v12 = &C::reg_to_gpr_mem(ctx, v8);
20373
4.65k
        let v13 = C::gpr_new(ctx, v7);
20374
4.65k
        let v14 = &constructor_cmove(ctx, v2, arg1, v12, v13);
20375
4.65k
        let v15 = constructor_with_flags_reg(ctx, v11, v14);
20376
4.65k
        let v16 = C::value_reg(ctx, v15);
20377
4.65k
        // Rule at src/isa/x64/lower.isle line 1620.
20378
4.65k
        return v16;
20379
0
    }
20380
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmp_and_choose", "src/isa/x64/lower.isle line 1619")
20381
4.65k
}
20382
20383
// Generated as internal constructor for term has_pmins.
20384
0
pub fn constructor_has_pmins<C: Context>(
20385
0
    ctx: &mut C,
20386
0
    arg0: Type,
20387
0
) -> bool {
20388
0
    match arg0 {
20389
        I16X8 => {
20390
            // Rule at src/isa/x64/lower.isle line 1646.
20391
0
            return true;
20392
        }
20393
        I64X2 => {
20394
            // Rule at src/isa/x64/lower.isle line 1647.
20395
0
            return false;
20396
        }
20397
0
        _ => {}
20398
0
    }
20399
0
    let v3 = C::use_sse41(ctx);
20400
0
    // Rule at src/isa/x64/lower.isle line 1648.
20401
0
    return v3;
20402
0
}
20403
20404
// Generated as internal constructor for term has_pmaxs.
20405
0
pub fn constructor_has_pmaxs<C: Context>(
20406
0
    ctx: &mut C,
20407
0
    arg0: Type,
20408
0
) -> bool {
20409
0
    match arg0 {
20410
        I16X8 => {
20411
            // Rule at src/isa/x64/lower.isle line 1651.
20412
0
            return true;
20413
        }
20414
        I64X2 => {
20415
            // Rule at src/isa/x64/lower.isle line 1652.
20416
0
            return false;
20417
        }
20418
0
        _ => {}
20419
0
    }
20420
0
    let v3 = C::use_sse41(ctx);
20421
0
    // Rule at src/isa/x64/lower.isle line 1653.
20422
0
    return v3;
20423
0
}
20424
20425
// Generated as internal constructor for term has_pmaxu.
20426
0
pub fn constructor_has_pmaxu<C: Context>(
20427
0
    ctx: &mut C,
20428
0
    arg0: Type,
20429
0
) -> bool {
20430
0
    match arg0 {
20431
        I8X16 => {
20432
            // Rule at src/isa/x64/lower.isle line 1656.
20433
0
            return true;
20434
        }
20435
        I64X2 => {
20436
            // Rule at src/isa/x64/lower.isle line 1657.
20437
0
            return false;
20438
        }
20439
0
        _ => {}
20440
0
    }
20441
0
    let v3 = C::use_sse41(ctx);
20442
0
    // Rule at src/isa/x64/lower.isle line 1658.
20443
0
    return v3;
20444
0
}
20445
20446
// Generated as internal constructor for term has_pminu.
20447
0
pub fn constructor_has_pminu<C: Context>(
20448
0
    ctx: &mut C,
20449
0
    arg0: Type,
20450
0
) -> bool {
20451
0
    match arg0 {
20452
        I8X16 => {
20453
            // Rule at src/isa/x64/lower.isle line 1661.
20454
0
            return true;
20455
        }
20456
        I64X2 => {
20457
            // Rule at src/isa/x64/lower.isle line 1662.
20458
0
            return false;
20459
        }
20460
0
        _ => {}
20461
0
    }
20462
0
    let v3 = C::use_sse41(ctx);
20463
0
    // Rule at src/isa/x64/lower.isle line 1663.
20464
0
    return v3;
20465
0
}
20466
20467
// Generated as internal constructor for term lower_vec_smax.
20468
0
pub fn constructor_lower_vec_smax<C: Context>(
20469
0
    ctx: &mut C,
20470
0
    arg0: Type,
20471
0
    arg1: Xmm,
20472
0
    arg2: Xmm,
20473
0
) -> Xmm {
20474
0
    let v3 = constructor_has_pmaxs(ctx, arg0);
20475
0
    if v3 == true {
20476
0
        let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
20477
0
        let v5 = constructor_x64_pmaxs(ctx, arg0, arg1, v4);
20478
0
        // Rule at src/isa/x64/lower.isle line 1671.
20479
0
        return v5;
20480
0
    }
20481
0
    let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
20482
0
    let v6 = constructor_x64_pcmpgt(ctx, arg0, arg1, v4);
20483
0
    let v7 = &C::xmm_to_xmm_mem(ctx, arg1);
20484
0
    let v8 = constructor_x64_pand(ctx, v6, v7);
20485
0
    let v9 = &C::xmm_to_xmm_mem(ctx, arg2);
20486
0
    let v10 = constructor_x64_pandn(ctx, v6, v9);
20487
0
    let v11 = &C::xmm_to_xmm_mem(ctx, v10);
20488
0
    let v12 = constructor_x64_por(ctx, v8, v11);
20489
0
    // Rule at src/isa/x64/lower.isle line 1675.
20490
0
    return v12;
20491
0
}
20492
20493
// Generated as internal constructor for term flip_high_bit_mask.
20494
0
pub fn constructor_flip_high_bit_mask<C: Context>(
20495
0
    ctx: &mut C,
20496
0
    arg0: Type,
20497
0
) -> Xmm {
20498
0
    match arg0 {
20499
        I16X8 => {
20500
0
            let v2 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
20501
0
            let v3 = &constructor_const_to_xmm_mem(ctx, v2);
20502
0
            let v4 = constructor_x64_movdqu_load(ctx, v3);
20503
0
            // Rule at src/isa/x64/lower.isle line 1730.
20504
0
            return v4;
20505
        }
20506
        I32X4 => {
20507
0
            let v6 = C::emit_u128_le_const(ctx, 0x80000000800000008000000080000000);
20508
0
            let v7 = &constructor_const_to_xmm_mem(ctx, v6);
20509
0
            let v8 = constructor_x64_movdqu_load(ctx, v7);
20510
0
            // Rule at src/isa/x64/lower.isle line 1732.
20511
0
            return v8;
20512
        }
20513
        I64X2 => {
20514
0
            let v10 = C::emit_u128_le_const(ctx, 0x80000000000000008000000000000000);
20515
0
            let v11 = &constructor_const_to_xmm_mem(ctx, v10);
20516
0
            let v12 = constructor_x64_movdqu_load(ctx, v11);
20517
0
            // Rule at src/isa/x64/lower.isle line 1734.
20518
0
            return v12;
20519
        }
20520
0
        _ => {}
20521
0
    }
20522
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "flip_high_bit_mask", "src/isa/x64/lower.isle line 1729")
20523
0
}
20524
20525
// Generated as internal constructor for term lower_select_fcmp.
20526
0
pub fn constructor_lower_select_fcmp<C: Context>(
20527
0
    ctx: &mut C,
20528
0
    arg0: Type,
20529
0
    arg1: &FcmpCondResult,
20530
0
    arg2: Value,
20531
0
    arg3: Value,
20532
0
) -> InstOutput {
20533
0
    match arg1 {
20534
        &FcmpCondResult::Condition {
20535
0
            producer: ref v2,
20536
0
            cc: ref v3,
20537
0
        } => {
20538
0
            let v6 = &constructor_cmove_from_values(ctx, arg0, v3, arg2, arg3);
20539
0
            let v7 = constructor_with_flags(ctx, v2, v6);
20540
0
            let v8 = C::output(ctx, v7);
20541
0
            // Rule at src/isa/x64/lower.isle line 2053.
20542
0
            return v8;
20543
        }
20544
        &FcmpCondResult::OrCondition {
20545
0
            producer: ref v9,
20546
0
            cc1: ref v10,
20547
0
            cc2: ref v11,
20548
0
        } => {
20549
0
            let v12 = &constructor_cmove_or_from_values(ctx, arg0, v10, v11, arg2, arg3);
20550
0
            let v13 = constructor_with_flags(ctx, v9, v12);
20551
0
            let v14 = C::output(ctx, v13);
20552
0
            // Rule at src/isa/x64/lower.isle line 2055.
20553
0
            return v14;
20554
        }
20555
0
        _ => {}
20556
0
    }
20557
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_select_fcmp", "src/isa/x64/lower.isle line 2052")
20558
0
}
20559
20560
// Generated as internal constructor for term do_clz.
20561
0
pub fn constructor_do_clz<C: Context>(
20562
0
    ctx: &mut C,
20563
0
    arg0: Type,
20564
0
    arg1: Type,
20565
0
    arg2: Gpr,
20566
0
) -> Gpr {
20567
0
    let v5 = constructor_imm_i64(ctx, I64, -0x1);
20568
0
    let v6 = C::gpr_new(ctx, v5);
20569
0
    let v7 = constructor_bsr_or_else(ctx, arg0, arg2, v6);
20570
0
    let v8 = C::gpr_to_reg(ctx, v7);
20571
0
    let v9 = C::ty_bits_u64(ctx, arg1);
20572
0
    let v11 = C::u64_sub(ctx, v9, 0x1);
20573
0
    let v12 = constructor_imm(ctx, arg0, v11);
20574
0
    let v13 = C::gpr_new(ctx, v12);
20575
0
    let v14 = &constructor_reg_to_gpr_mem_imm(ctx, v8);
20576
0
    let v15 = constructor_x64_sub(ctx, arg0, v13, v14);
20577
0
    // Rule at src/isa/x64/lower.isle line 2126.
20578
0
    return v15;
20579
0
}
20580
20581
// Generated as internal constructor for term do_ctz.
20582
0
pub fn constructor_do_ctz<C: Context>(
20583
0
    ctx: &mut C,
20584
0
    arg0: Type,
20585
0
    arg1: Type,
20586
0
    arg2: Gpr,
20587
0
) -> Gpr {
20588
0
    let v4 = C::ty_bits_u64(ctx, arg1);
20589
0
    let v5 = constructor_imm(ctx, I64, v4);
20590
0
    let v6 = C::gpr_new(ctx, v5);
20591
0
    let v7 = constructor_bsf_or_else(ctx, arg0, arg2, v6);
20592
0
    // Rule at src/isa/x64/lower.isle line 2162.
20593
0
    return v7;
20594
0
}
20595
20596
// Generated as internal constructor for term do_popcnt.
20597
0
pub fn constructor_do_popcnt<C: Context>(
20598
0
    ctx: &mut C,
20599
0
    arg0: Type,
20600
0
    arg1: Gpr,
20601
0
) -> Gpr {
20602
0
    match arg0 {
20603
        I32 => {
20604
0
            let v4 = Imm8Reg::Imm8 {
20605
0
                imm: 0x1,
20606
0
            };
20607
0
            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20608
0
            let v47 = constructor_x64_shr(ctx, I32, arg1, v5);
20609
0
            let v49 = constructor_imm(ctx, I32, 0x77777777);
20610
0
            let v50 = C::gpr_new(ctx, v49);
20611
0
            let v51 = &C::gpr_to_gpr_mem_imm(ctx, v50);
20612
0
            let v52 = constructor_x64_and(ctx, I32, v47, v51);
20613
0
            let v53 = &C::gpr_to_gpr_mem_imm(ctx, v52);
20614
0
            let v54 = constructor_x64_sub(ctx, I32, arg1, v53);
20615
0
            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20616
0
            let v55 = constructor_x64_shr(ctx, I32, v52, v14);
20617
0
            let v56 = &C::gpr_to_gpr_mem_imm(ctx, v50);
20618
0
            let v57 = constructor_x64_and(ctx, I32, v55, v56);
20619
0
            let v58 = &C::gpr_to_gpr_mem_imm(ctx, v57);
20620
0
            let v59 = constructor_x64_sub(ctx, I32, v54, v58);
20621
0
            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20622
0
            let v60 = constructor_x64_shr(ctx, I32, v57, v20);
20623
0
            let v61 = &C::gpr_to_gpr_mem_imm(ctx, v50);
20624
0
            let v62 = constructor_x64_and(ctx, I32, v60, v61);
20625
0
            let v63 = &C::gpr_to_gpr_mem_imm(ctx, v62);
20626
0
            let v64 = constructor_x64_sub(ctx, I32, v59, v63);
20627
0
            let v27 = Imm8Reg::Imm8 {
20628
0
                imm: 0x4,
20629
0
            };
20630
0
            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
20631
0
            let v65 = constructor_x64_shr(ctx, I32, v64, v28);
20632
0
            let v66 = &C::gpr_to_gpr_mem_imm(ctx, v64);
20633
0
            let v67 = constructor_x64_add(ctx, I32, v65, v66);
20634
0
            let v69 = RegMemImm::Imm {
20635
0
                simm32: 0xF0F0F0F,
20636
0
            };
20637
0
            let v70 = &C::gpr_mem_imm_new(ctx, &v69);
20638
0
            let v71 = constructor_x64_and(ctx, I32, v67, v70);
20639
0
            let v73 = RegMemImm::Imm {
20640
0
                simm32: 0x1010101,
20641
0
            };
20642
0
            let v74 = &C::gpr_mem_imm_new(ctx, &v73);
20643
0
            let v75 = constructor_x64_mul(ctx, I32, v71, v74);
20644
0
            let v77 = Imm8Reg::Imm8 {
20645
0
                imm: 0x18,
20646
0
            };
20647
0
            let v78 = &C::imm8_reg_to_imm8_gpr(ctx, &v77);
20648
0
            let v79 = constructor_x64_shr(ctx, I32, v75, v78);
20649
0
            // Rule at src/isa/x64/lower.isle line 2244.
20650
0
            return v79;
20651
        }
20652
        I64 => {
20653
0
            let v4 = Imm8Reg::Imm8 {
20654
0
                imm: 0x1,
20655
0
            };
20656
0
            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20657
0
            let v6 = constructor_x64_shr(ctx, I64, arg1, v5);
20658
0
            let v8 = constructor_imm(ctx, I64, 0x7777777777777777);
20659
0
            let v9 = C::gpr_new(ctx, v8);
20660
0
            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v9);
20661
0
            let v11 = constructor_x64_and(ctx, I64, v6, v10);
20662
0
            let v12 = &C::gpr_to_gpr_mem_imm(ctx, v11);
20663
0
            let v13 = constructor_x64_sub(ctx, I64, arg1, v12);
20664
0
            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20665
0
            let v15 = constructor_x64_shr(ctx, I64, v11, v14);
20666
0
            let v16 = &C::gpr_to_gpr_mem_imm(ctx, v9);
20667
0
            let v17 = constructor_x64_and(ctx, I64, v15, v16);
20668
0
            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v17);
20669
0
            let v19 = constructor_x64_sub(ctx, I64, v13, v18);
20670
0
            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20671
0
            let v21 = constructor_x64_shr(ctx, I64, v17, v20);
20672
0
            let v22 = &C::gpr_to_gpr_mem_imm(ctx, v9);
20673
0
            let v23 = constructor_x64_and(ctx, I64, v21, v22);
20674
0
            let v24 = &C::gpr_to_gpr_mem_imm(ctx, v23);
20675
0
            let v25 = constructor_x64_sub(ctx, I64, v19, v24);
20676
0
            let v27 = Imm8Reg::Imm8 {
20677
0
                imm: 0x4,
20678
0
            };
20679
0
            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
20680
0
            let v29 = constructor_x64_shr(ctx, I64, v25, v28);
20681
0
            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v25);
20682
0
            let v31 = constructor_x64_add(ctx, I64, v29, v30);
20683
0
            let v33 = constructor_imm(ctx, I64, 0xF0F0F0F0F0F0F0F);
20684
0
            let v34 = C::gpr_new(ctx, v33);
20685
0
            let v35 = &C::gpr_to_gpr_mem_imm(ctx, v34);
20686
0
            let v36 = constructor_x64_and(ctx, I64, v31, v35);
20687
0
            let v38 = constructor_imm(ctx, I64, 0x101010101010101);
20688
0
            let v39 = C::gpr_new(ctx, v38);
20689
0
            let v40 = &C::gpr_to_gpr_mem_imm(ctx, v39);
20690
0
            let v41 = constructor_x64_mul(ctx, I64, v36, v40);
20691
0
            let v43 = Imm8Reg::Imm8 {
20692
0
                imm: 0x38,
20693
0
            };
20694
0
            let v44 = &C::imm8_reg_to_imm8_gpr(ctx, &v43);
20695
0
            let v45 = constructor_x64_shr(ctx, I64, v41, v44);
20696
0
            // Rule at src/isa/x64/lower.isle line 2201.
20697
0
            return v45;
20698
        }
20699
0
        _ => {}
20700
0
    }
20701
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "do_popcnt", "src/isa/x64/lower.isle line 2200")
20702
0
}
20703
20704
// Generated as internal constructor for term do_bitrev8.
20705
0
pub fn constructor_do_bitrev8<C: Context>(
20706
0
    ctx: &mut C,
20707
0
    arg0: Type,
20708
0
    arg1: Gpr,
20709
0
) -> Gpr {
20710
0
    let v2 = C::ty_mask(ctx, arg0);
20711
0
    let v4 = C::u64_and(ctx, v2, 0x5555555555555555);
20712
0
    let v5 = constructor_imm(ctx, arg0, v4);
20713
0
    let v6 = C::gpr_new(ctx, v5);
20714
0
    let v7 = &C::gpr_to_gpr_mem_imm(ctx, v6);
20715
0
    let v8 = constructor_x64_and(ctx, arg0, arg1, v7);
20716
0
    let v10 = Imm8Reg::Imm8 {
20717
0
        imm: 0x1,
20718
0
    };
20719
0
    let v11 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
20720
0
    let v12 = constructor_x64_shr(ctx, arg0, arg1, v11);
20721
0
    let v13 = &C::gpr_to_gpr_mem_imm(ctx, v6);
20722
0
    let v14 = constructor_x64_and(ctx, arg0, v12, v13);
20723
0
    let v15 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
20724
0
    let v16 = constructor_x64_shl(ctx, arg0, v8, v15);
20725
0
    let v17 = &C::gpr_to_gpr_mem_imm(ctx, v14);
20726
0
    let v18 = constructor_x64_or(ctx, arg0, v16, v17);
20727
0
    let v20 = C::u64_and(ctx, v2, 0x3333333333333333);
20728
0
    let v21 = constructor_imm(ctx, arg0, v20);
20729
0
    let v22 = C::gpr_new(ctx, v21);
20730
0
    let v23 = &C::gpr_to_gpr_mem_imm(ctx, v22);
20731
0
    let v24 = constructor_x64_and(ctx, arg0, v18, v23);
20732
0
    let v26 = Imm8Reg::Imm8 {
20733
0
        imm: 0x2,
20734
0
    };
20735
0
    let v27 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
20736
0
    let v28 = constructor_x64_shr(ctx, arg0, v18, v27);
20737
0
    let v29 = &C::gpr_to_gpr_mem_imm(ctx, v22);
20738
0
    let v30 = constructor_x64_and(ctx, arg0, v28, v29);
20739
0
    let v31 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
20740
0
    let v32 = constructor_x64_shl(ctx, arg0, v24, v31);
20741
0
    let v33 = &C::gpr_to_gpr_mem_imm(ctx, v30);
20742
0
    let v34 = constructor_x64_or(ctx, arg0, v32, v33);
20743
0
    let v36 = C::u64_and(ctx, v2, 0xF0F0F0F0F0F0F0F);
20744
0
    let v37 = constructor_imm(ctx, arg0, v36);
20745
0
    let v38 = C::gpr_new(ctx, v37);
20746
0
    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
20747
0
    let v40 = constructor_x64_and(ctx, arg0, v34, v39);
20748
0
    let v42 = Imm8Reg::Imm8 {
20749
0
        imm: 0x4,
20750
0
    };
20751
0
    let v43 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
20752
0
    let v44 = constructor_x64_shr(ctx, arg0, v34, v43);
20753
0
    let v45 = &C::gpr_to_gpr_mem_imm(ctx, v38);
20754
0
    let v46 = constructor_x64_and(ctx, arg0, v44, v45);
20755
0
    let v47 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
20756
0
    let v48 = constructor_x64_shl(ctx, arg0, v40, v47);
20757
0
    let v49 = &C::gpr_to_gpr_mem_imm(ctx, v46);
20758
0
    let v50 = constructor_x64_or(ctx, arg0, v48, v49);
20759
0
    // Rule at src/isa/x64/lower.isle line 2338.
20760
0
    return v50;
20761
0
}
20762
20763
// Generated as internal constructor for term do_bitrev16.
20764
0
pub fn constructor_do_bitrev16<C: Context>(
20765
0
    ctx: &mut C,
20766
0
    arg0: Type,
20767
0
    arg1: Gpr,
20768
0
) -> Gpr {
20769
0
    let v2 = constructor_do_bitrev8(ctx, arg0, arg1);
20770
0
    let v3 = C::ty_mask(ctx, arg0);
20771
0
    let v5 = C::u64_and(ctx, v3, 0xFF00FF00FF00FF);
20772
0
    let v6 = constructor_imm(ctx, arg0, v5);
20773
0
    let v7 = C::gpr_new(ctx, v6);
20774
0
    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20775
0
    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
20776
0
    let v11 = Imm8Reg::Imm8 {
20777
0
        imm: 0x8,
20778
0
    };
20779
0
    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20780
0
    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
20781
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20782
0
    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
20783
0
    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20784
0
    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
20785
0
    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
20786
0
    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
20787
0
    // Rule at src/isa/x64/lower.isle line 2361.
20788
0
    return v19;
20789
0
}
20790
20791
// Generated as internal constructor for term do_bitrev32.
20792
0
pub fn constructor_do_bitrev32<C: Context>(
20793
0
    ctx: &mut C,
20794
0
    arg0: Type,
20795
0
    arg1: Gpr,
20796
0
) -> Gpr {
20797
0
    let v2 = constructor_do_bitrev16(ctx, arg0, arg1);
20798
0
    let v3 = C::ty_mask(ctx, arg0);
20799
0
    let v5 = C::u64_and(ctx, v3, 0xFFFF0000FFFF);
20800
0
    let v6 = constructor_imm(ctx, arg0, v5);
20801
0
    let v7 = C::gpr_new(ctx, v6);
20802
0
    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20803
0
    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
20804
0
    let v11 = Imm8Reg::Imm8 {
20805
0
        imm: 0x10,
20806
0
    };
20807
0
    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20808
0
    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
20809
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20810
0
    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
20811
0
    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20812
0
    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
20813
0
    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
20814
0
    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
20815
0
    // Rule at src/isa/x64/lower.isle line 2373.
20816
0
    return v19;
20817
0
}
20818
20819
// Generated as internal constructor for term do_bitrev64.
20820
0
pub fn constructor_do_bitrev64<C: Context>(
20821
0
    ctx: &mut C,
20822
0
    arg0: Type,
20823
0
    arg1: Gpr,
20824
0
) -> Gpr {
20825
0
    if arg0 == I64 {
20826
0
        let v2 = constructor_do_bitrev32(ctx, arg0, arg1);
20827
0
        let v4 = constructor_imm(ctx, arg0, 0xFFFFFFFF);
20828
0
        let v5 = C::gpr_new(ctx, v4);
20829
0
        let v6 = &C::gpr_to_gpr_mem_imm(ctx, v5);
20830
0
        let v7 = constructor_x64_and(ctx, arg0, v2, v6);
20831
0
        let v9 = Imm8Reg::Imm8 {
20832
0
            imm: 0x20,
20833
0
        };
20834
0
        let v10 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
20835
0
        let v11 = constructor_x64_shr(ctx, arg0, v2, v10);
20836
0
        let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
20837
0
        let v13 = constructor_x64_shl(ctx, arg0, v7, v12);
20838
0
        let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
20839
0
        let v15 = constructor_x64_or(ctx, arg0, v13, v14);
20840
0
        // Rule at src/isa/x64/lower.isle line 2385.
20841
0
        return v15;
20842
0
    }
20843
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "do_bitrev64", "src/isa/x64/lower.isle line 2384")
20844
0
}
20845
20846
// Generated as internal constructor for term fmadd.
20847
0
pub fn constructor_fmadd<C: Context>(
20848
0
    ctx: &mut C,
20849
0
    arg0: Type,
20850
0
    arg1: Value,
20851
0
    arg2: Value,
20852
0
    arg3: Value,
20853
0
) -> Xmm {
20854
0
    let v24 = C::def_inst(ctx, arg2);
20855
0
    if let Some(v25) = v24 {
20856
0
        let v26 = &C::inst_data(ctx, v25);
20857
        if let &InstructionData::Unary {
20858
0
            opcode: ref v27,
20859
0
            arg: v28,
20860
0
        } = v26 {
20861
0
            if let &Opcode::Fneg = v27 {
20862
0
                let v29 = constructor_fnmadd(ctx, arg0, arg1, v28, arg3);
20863
0
                // Rule at src/isa/x64/lower.isle line 2819.
20864
0
                return v29;
20865
0
            }
20866
0
        }
20867
0
    }
20868
0
    let v18 = C::def_inst(ctx, arg1);
20869
0
    if let Some(v19) = v18 {
20870
0
        let v20 = &C::inst_data(ctx, v19);
20871
        if let &InstructionData::Unary {
20872
0
            opcode: ref v21,
20873
0
            arg: v22,
20874
0
        } = v20 {
20875
0
            if let &Opcode::Fneg = v21 {
20876
0
                let v23 = constructor_fnmadd(ctx, arg0, v22, arg2, arg3);
20877
0
                // Rule at src/isa/x64/lower.isle line 2818.
20878
0
                return v23;
20879
0
            }
20880
0
        }
20881
0
    }
20882
0
    let v14 = &C::sinkable_load(ctx, arg2);
20883
0
    if let Some(v15) = v14 {
20884
0
        let v4 = constructor_put_in_xmm(ctx, arg1);
20885
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
20886
0
        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
20887
0
        let v17 = constructor_x64_vfmadd132(ctx, arg0, v4, v11, v16);
20888
0
        // Rule at src/isa/x64/lower.isle line 2814.
20889
0
        return v17;
20890
0
    }
20891
0
    let v8 = &C::sinkable_load(ctx, arg1);
20892
0
    if let Some(v9) = v8 {
20893
0
        let v10 = constructor_put_in_xmm(ctx, arg2);
20894
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
20895
0
        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
20896
0
        let v13 = constructor_x64_vfmadd132(ctx, arg0, v10, v11, v12);
20897
0
        // Rule at src/isa/x64/lower.isle line 2813.
20898
0
        return v13;
20899
0
    }
20900
0
    let v4 = constructor_put_in_xmm(ctx, arg1);
20901
0
    let v5 = constructor_put_in_xmm(ctx, arg2);
20902
0
    let v6 = &C::put_in_xmm_mem(ctx, arg3);
20903
0
    let v7 = constructor_x64_vfmadd213(ctx, arg0, v4, v5, v6);
20904
0
    // Rule at src/isa/x64/lower.isle line 2808.
20905
0
    return v7;
20906
0
}
20907
20908
// Generated as internal constructor for term fnmadd.
20909
0
pub fn constructor_fnmadd<C: Context>(
20910
0
    ctx: &mut C,
20911
0
    arg0: Type,
20912
0
    arg1: Value,
20913
0
    arg2: Value,
20914
0
    arg3: Value,
20915
0
) -> Xmm {
20916
0
    let v24 = C::def_inst(ctx, arg2);
20917
0
    if let Some(v25) = v24 {
20918
0
        let v26 = &C::inst_data(ctx, v25);
20919
        if let &InstructionData::Unary {
20920
0
            opcode: ref v27,
20921
0
            arg: v28,
20922
0
        } = v26 {
20923
0
            if let &Opcode::Fneg = v27 {
20924
0
                let v29 = constructor_fmadd(ctx, arg0, arg1, v28, arg3);
20925
0
                // Rule at src/isa/x64/lower.isle line 2827.
20926
0
                return v29;
20927
0
            }
20928
0
        }
20929
0
    }
20930
0
    let v18 = C::def_inst(ctx, arg1);
20931
0
    if let Some(v19) = v18 {
20932
0
        let v20 = &C::inst_data(ctx, v19);
20933
        if let &InstructionData::Unary {
20934
0
            opcode: ref v21,
20935
0
            arg: v22,
20936
0
        } = v20 {
20937
0
            if let &Opcode::Fneg = v21 {
20938
0
                let v23 = constructor_fmadd(ctx, arg0, v22, arg2, arg3);
20939
0
                // Rule at src/isa/x64/lower.isle line 2826.
20940
0
                return v23;
20941
0
            }
20942
0
        }
20943
0
    }
20944
0
    let v14 = &C::sinkable_load(ctx, arg2);
20945
0
    if let Some(v15) = v14 {
20946
0
        let v4 = constructor_put_in_xmm(ctx, arg1);
20947
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
20948
0
        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
20949
0
        let v17 = constructor_x64_vfnmadd132(ctx, arg0, v4, v11, v16);
20950
0
        // Rule at src/isa/x64/lower.isle line 2823.
20951
0
        return v17;
20952
0
    }
20953
0
    let v8 = &C::sinkable_load(ctx, arg1);
20954
0
    if let Some(v9) = v8 {
20955
0
        let v10 = constructor_put_in_xmm(ctx, arg2);
20956
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
20957
0
        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
20958
0
        let v13 = constructor_x64_vfnmadd132(ctx, arg0, v10, v11, v12);
20959
0
        // Rule at src/isa/x64/lower.isle line 2822.
20960
0
        return v13;
20961
0
    }
20962
0
    let v4 = constructor_put_in_xmm(ctx, arg1);
20963
0
    let v5 = constructor_put_in_xmm(ctx, arg2);
20964
0
    let v6 = &C::put_in_xmm_mem(ctx, arg3);
20965
0
    let v7 = constructor_x64_vfnmadd213(ctx, arg0, v4, v5, v6);
20966
0
    // Rule at src/isa/x64/lower.isle line 2821.
20967
0
    return v7;
20968
0
}
20969
20970
// Generated as internal constructor for term cmp_zero_i128.
20971
0
pub fn constructor_cmp_zero_i128<C: Context>(
20972
0
    ctx: &mut C,
20973
0
    arg0: &CC,
20974
0
    arg1: ValueRegs,
20975
0
) -> IcmpCondResult {
20976
0
    let v1 = &C::cc_nz_or_z(ctx, arg0);
20977
0
    if let Some(v2) = v1 {
20978
0
        let v5 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
20979
0
        let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
20980
0
        let v10 = RegMemImm::Imm {
20981
0
            simm32: 0x0,
20982
0
        };
20983
0
        let v11 = &C::gpr_mem_imm_new(ctx, &v10);
20984
0
        let v12 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v11, v5);
20985
0
        let v14 = &constructor_x64_setcc(ctx, &CC::Z);
20986
0
        let v15 = constructor_with_flags_reg(ctx, v12, v14);
20987
0
        let v16 = C::gpr_new(ctx, v15);
20988
0
        let v17 = &C::gpr_mem_imm_new(ctx, &v10);
20989
0
        let v18 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v17, v7);
20990
0
        let v19 = &constructor_x64_setcc(ctx, &CC::Z);
20991
0
        let v20 = constructor_with_flags_reg(ctx, v18, v19);
20992
0
        let v21 = C::gpr_new(ctx, v20);
20993
0
        let v23 = &C::gpr_to_gpr_mem_imm(ctx, v16);
20994
0
        let v24 = &constructor_x64_test(ctx, &OperandSize::Size8, v23, v21);
20995
0
        let v25 = &constructor_icmp_cond_result(ctx, v24, v2);
20996
0
        // Rule at src/isa/x64/lower.isle line 3295.
20997
0
        return v25.clone();
20998
0
    }
20999
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmp_zero_i128", "src/isa/x64/lower.isle line 3294")
21000
0
}
21001
21002
// Generated as internal constructor for term cmp_zero_int_bool_ref.
21003
114k
pub fn constructor_cmp_zero_int_bool_ref<C: Context>(
21004
114k
    ctx: &mut C,
21005
114k
    arg0: Value,
21006
114k
) -> ProducesFlags {
21007
114k
    let v1 = C::value_type(ctx, arg0);
21008
114k
    let v2 = &C::raw_operand_size_of_type(ctx, v1);
21009
114k
    let v3 = constructor_put_in_gpr(ctx, arg0);
21010
114k
    let v4 = &C::gpr_to_gpr_mem_imm(ctx, v3);
21011
114k
    let v5 = &constructor_x64_test(ctx, v2, v4, v3);
21012
114k
    // Rule at src/isa/x64/lower.isle line 3306.
21013
114k
    return v5.clone();
21014
114k
}
21015
21016
// Generated as internal constructor for term lower_swiden_low.
21017
0
pub fn constructor_lower_swiden_low<C: Context>(
21018
0
    ctx: &mut C,
21019
0
    arg0: Type,
21020
0
    arg1: Xmm,
21021
0
) -> Xmm {
21022
0
    match arg0 {
21023
        I16X8 => {
21024
0
            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
21025
0
            let v3 = constructor_x64_punpcklbw(ctx, arg1, v2);
21026
0
            let v5 = &C::xmi_imm(ctx, 0x8);
21027
0
            let v6 = constructor_x64_psraw(ctx, v3, v5);
21028
0
            // Rule at src/isa/x64/lower.isle line 3720.
21029
0
            return v6;
21030
        }
21031
        I32X4 => {
21032
0
            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
21033
0
            let v7 = constructor_x64_punpcklwd(ctx, arg1, v2);
21034
0
            let v9 = &C::xmi_imm(ctx, 0x10);
21035
0
            let v10 = constructor_x64_psrad(ctx, v7, v9);
21036
0
            // Rule at src/isa/x64/lower.isle line 3722.
21037
0
            return v10;
21038
        }
21039
        I64X2 => {
21040
0
            let v12 = constructor_xmm_zero(ctx, I32X4);
21041
0
            let v13 = &C::xmm_to_xmm_mem(ctx, arg1);
21042
0
            let v14 = constructor_x64_pcmpgtd(ctx, v12, v13);
21043
0
            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
21044
0
            let v16 = constructor_x64_punpckldq(ctx, arg1, v15);
21045
0
            // Rule at src/isa/x64/lower.isle line 3728.
21046
0
            return v16;
21047
        }
21048
0
        _ => {}
21049
0
    }
21050
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_swiden_low", "src/isa/x64/lower.isle line 3715")
21051
0
}
21052
21053
// Generated as internal constructor for term lower_uwiden_low.
21054
0
pub fn constructor_lower_uwiden_low<C: Context>(
21055
0
    ctx: &mut C,
21056
0
    arg0: Type,
21057
0
    arg1: Xmm,
21058
0
) -> Xmm {
21059
0
    match arg0 {
21060
        I16X8 => {
21061
0
            let v3 = constructor_xmm_zero(ctx, I8X16);
21062
0
            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
21063
0
            let v5 = constructor_x64_punpcklbw(ctx, arg1, v4);
21064
0
            // Rule at src/isa/x64/lower.isle line 3783.
21065
0
            return v5;
21066
        }
21067
        I32X4 => {
21068
0
            let v3 = constructor_xmm_zero(ctx, I8X16);
21069
0
            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
21070
0
            let v6 = constructor_x64_punpcklwd(ctx, arg1, v4);
21071
0
            // Rule at src/isa/x64/lower.isle line 3784.
21072
0
            return v6;
21073
        }
21074
        I64X2 => {
21075
0
            let v8 = constructor_xmm_zero(ctx, F32X4);
21076
0
            let v9 = &C::xmm_to_xmm_mem(ctx, v8);
21077
0
            let v10 = constructor_x64_unpcklps(ctx, arg1, v9);
21078
0
            // Rule at src/isa/x64/lower.isle line 3785.
21079
0
            return v10;
21080
        }
21081
0
        _ => {}
21082
0
    }
21083
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_uwiden_low", "src/isa/x64/lower.isle line 3782")
21084
0
}
21085
21086
// Generated as internal constructor for term unarrow_i32x4_lanes_to_low_u16_lanes.
21087
0
pub fn constructor_unarrow_i32x4_lanes_to_low_u16_lanes<C: Context>(
21088
0
    ctx: &mut C,
21089
0
    arg0: Xmm,
21090
0
) -> Xmm {
21091
0
    let v2 = constructor_xmm_zero(ctx, I32X4);
21092
0
    let v3 = &C::xmm_to_xmm_mem(ctx, v2);
21093
0
    let v4 = constructor_x64_pcmpgtd(ctx, arg0, v3);
21094
0
    let v5 = &C::xmm_to_xmm_mem(ctx, v4);
21095
0
    let v6 = constructor_x64_pand(ctx, arg0, v5);
21096
0
    let v8 = C::emit_u128_le_const(ctx, 0xFFFF0000FFFF0000FFFF0000FFFF);
21097
0
    let v9 = &constructor_const_to_xmm_mem(ctx, v8);
21098
0
    let v10 = constructor_x64_movdqu_load(ctx, v9);
21099
0
    let v11 = &C::xmm_to_xmm_mem(ctx, v6);
21100
0
    let v12 = constructor_x64_pcmpgtd(ctx, v10, v11);
21101
0
    let v13 = &C::xmm_to_xmm_mem(ctx, v12);
21102
0
    let v14 = constructor_x64_pand(ctx, v6, v13);
21103
0
    let v15 = &C::xmm_to_xmm_mem(ctx, v10);
21104
0
    let v16 = constructor_x64_pandn(ctx, v12, v15);
21105
0
    let v17 = &C::xmm_to_xmm_mem(ctx, v16);
21106
0
    let v18 = constructor_x64_por(ctx, v14, v17);
21107
0
    let v19 = &C::xmm_to_xmm_mem(ctx, v18);
21108
0
    let v21 = constructor_x64_pshuflw(ctx, v19, 0x8);
21109
0
    let v22 = &C::xmm_to_xmm_mem(ctx, v21);
21110
0
    let v23 = constructor_x64_pshufhw(ctx, v22, 0x8);
21111
0
    let v24 = &C::xmm_to_xmm_mem(ctx, v23);
21112
0
    let v25 = constructor_x64_pshufd(ctx, v24, 0x8);
21113
0
    // Rule at src/isa/x64/lower.isle line 3865.
21114
0
    return v25;
21115
0
}
21116
21117
// Generated as internal constructor for term x64_round.
21118
0
pub fn constructor_x64_round<C: Context>(
21119
0
    ctx: &mut C,
21120
0
    arg0: Type,
21121
0
    arg1: &RegMem,
21122
0
    arg2: &RoundImm,
21123
0
) -> Xmm {
21124
0
    match arg0 {
21125
        F32 => {
21126
0
            let v3 = C::use_sse41(ctx);
21127
0
            if v3 == true {
21128
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21129
0
                let v5 = constructor_x64_roundss(ctx, v4, arg2);
21130
0
                // Rule at src/isa/x64/lower.isle line 3933.
21131
0
                return v5;
21132
0
            }
21133
            if let &RegMem::Reg {
21134
0
                reg: v9,
21135
0
            } = arg1 {
21136
0
                let v11 = &constructor_round_libcall(ctx, F32, arg2);
21137
0
                let v12 = C::libcall_1(ctx, v11, v9);
21138
0
                let v13 = C::xmm_new(ctx, v12);
21139
0
                // Rule at src/isa/x64/lower.isle line 3946.
21140
0
                return v13;
21141
0
            }
21142
        }
21143
        F64 => {
21144
0
            let v3 = C::use_sse41(ctx);
21145
0
            if v3 == true {
21146
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21147
0
                let v6 = constructor_x64_roundsd(ctx, v4, arg2);
21148
0
                // Rule at src/isa/x64/lower.isle line 3936.
21149
0
                return v6;
21150
0
            }
21151
            if let &RegMem::Reg {
21152
0
                reg: v9,
21153
0
            } = arg1 {
21154
0
                let v15 = &constructor_round_libcall(ctx, F64, arg2);
21155
0
                let v16 = C::libcall_1(ctx, v15, v9);
21156
0
                let v17 = C::xmm_new(ctx, v16);
21157
0
                // Rule at src/isa/x64/lower.isle line 3947.
21158
0
                return v17;
21159
0
            }
21160
        }
21161
        F32X4 => {
21162
0
            let v3 = C::use_sse41(ctx);
21163
0
            if v3 == true {
21164
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21165
0
                let v7 = constructor_x64_roundps(ctx, v4, arg2);
21166
0
                // Rule at src/isa/x64/lower.isle line 3939.
21167
0
                return v7;
21168
0
            }
21169
            if let &RegMem::Reg {
21170
0
                reg: v9,
21171
0
            } = arg1 {
21172
0
                let v11 = &constructor_round_libcall(ctx, F32, arg2);
21173
0
                let v12 = C::libcall_1(ctx, v11, v9);
21174
0
                let v13 = C::xmm_new(ctx, v12);
21175
0
                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
21176
0
                let v20 = constructor_x64_pshufd(ctx, v18, 0x1);
21177
0
                let v21 = C::xmm_to_reg(ctx, v20);
21178
0
                let v22 = C::libcall_1(ctx, v11, v21);
21179
0
                let v23 = C::xmm_new(ctx, v22);
21180
0
                let v25 = C::xmm_to_reg(ctx, v23);
21181
0
                let v26 = &constructor_xmm_to_reg_mem(ctx, v25);
21182
0
                let v27 = &C::xmm_mem_to_reg_mem(ctx, v26);
21183
0
                let v28 = constructor_vec_insert_lane(ctx, F32X4, v13, v27, 0x1);
21184
0
                let v29 = &constructor_reg_to_xmm_mem(ctx, v9);
21185
0
                let v31 = constructor_x64_pshufd(ctx, v29, 0x2);
21186
0
                let v32 = C::xmm_to_reg(ctx, v31);
21187
0
                let v33 = C::libcall_1(ctx, v11, v32);
21188
0
                let v34 = C::xmm_new(ctx, v33);
21189
0
                let v35 = C::xmm_to_reg(ctx, v34);
21190
0
                let v36 = &constructor_xmm_to_reg_mem(ctx, v35);
21191
0
                let v37 = &C::xmm_mem_to_reg_mem(ctx, v36);
21192
0
                let v38 = constructor_vec_insert_lane(ctx, F32X4, v28, v37, 0x2);
21193
0
                let v39 = &constructor_reg_to_xmm_mem(ctx, v9);
21194
0
                let v41 = constructor_x64_pshufd(ctx, v39, 0x3);
21195
0
                let v42 = C::xmm_to_reg(ctx, v41);
21196
0
                let v43 = C::libcall_1(ctx, v11, v42);
21197
0
                let v44 = C::xmm_new(ctx, v43);
21198
0
                let v45 = C::xmm_to_reg(ctx, v44);
21199
0
                let v46 = &constructor_xmm_to_reg_mem(ctx, v45);
21200
0
                let v47 = &C::xmm_mem_to_reg_mem(ctx, v46);
21201
0
                let v48 = constructor_vec_insert_lane(ctx, F32X4, v38, v47, 0x3);
21202
0
                // Rule at src/isa/x64/lower.isle line 3948.
21203
0
                return v48;
21204
0
            }
21205
        }
21206
        F64X2 => {
21207
0
            let v3 = C::use_sse41(ctx);
21208
0
            if v3 == true {
21209
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21210
0
                let v8 = constructor_x64_roundpd(ctx, v4, arg2);
21211
0
                // Rule at src/isa/x64/lower.isle line 3942.
21212
0
                return v8;
21213
0
            }
21214
            if let &RegMem::Reg {
21215
0
                reg: v9,
21216
0
            } = arg1 {
21217
0
                let v15 = &constructor_round_libcall(ctx, F64, arg2);
21218
0
                let v16 = C::libcall_1(ctx, v15, v9);
21219
0
                let v17 = C::xmm_new(ctx, v16);
21220
0
                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
21221
0
                let v50 = constructor_x64_pshufd(ctx, v18, 0xE);
21222
0
                let v51 = C::xmm_to_reg(ctx, v50);
21223
0
                let v52 = C::libcall_1(ctx, v15, v51);
21224
0
                let v53 = C::xmm_new(ctx, v52);
21225
0
                let v55 = C::xmm_to_reg(ctx, v53);
21226
0
                let v56 = &constructor_xmm_to_reg_mem(ctx, v55);
21227
0
                let v57 = &C::xmm_mem_to_reg_mem(ctx, v56);
21228
0
                let v58 = constructor_vec_insert_lane(ctx, F64X2, v17, v57, 0x1);
21229
0
                // Rule at src/isa/x64/lower.isle line 3960.
21230
0
                return v58;
21231
0
            }
21232
        }
21233
0
        _ => {}
21234
    }
21235
    if let &RegMem::Mem {
21236
0
        addr: ref v59,
21237
0
    } = arg1 {
21238
0
        let v61 = constructor_x64_load(ctx, arg0, v59, &ExtKind::ZeroExtend);
21239
0
        let v62 = RegMem::Reg {
21240
0
            reg: v61,
21241
0
        };
21242
0
        let v63 = constructor_x64_round(ctx, arg0, &v62, arg2);
21243
0
        // Rule at src/isa/x64/lower.isle line 3968.
21244
0
        return v63;
21245
0
    }
21246
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_round", "src/isa/x64/lower.isle line 3932")
21247
0
}
21248
21249
// Generated as internal constructor for term round_libcall.
21250
0
pub fn constructor_round_libcall<C: Context>(
21251
0
    ctx: &mut C,
21252
0
    arg0: Type,
21253
0
    arg1: &RoundImm,
21254
0
) -> LibCall {
21255
0
    match arg0 {
21256
        F32 => {
21257
0
            match arg1 {
21258
                &RoundImm::RoundNearest => {
21259
                    // Rule at src/isa/x64/lower.isle line 3976.
21260
0
                    return LibCall::NearestF32;
21261
                }
21262
                &RoundImm::RoundDown => {
21263
                    // Rule at src/isa/x64/lower.isle line 3974.
21264
0
                    return LibCall::FloorF32;
21265
                }
21266
                &RoundImm::RoundUp => {
21267
                    // Rule at src/isa/x64/lower.isle line 3972.
21268
0
                    return LibCall::CeilF32;
21269
                }
21270
                &RoundImm::RoundZero => {
21271
                    // Rule at src/isa/x64/lower.isle line 3978.
21272
0
                    return LibCall::TruncF32;
21273
                }
21274
0
                _ => {}
21275
            }
21276
        }
21277
        F64 => {
21278
0
            match arg1 {
21279
                &RoundImm::RoundNearest => {
21280
                    // Rule at src/isa/x64/lower.isle line 3977.
21281
0
                    return LibCall::NearestF64;
21282
                }
21283
                &RoundImm::RoundDown => {
21284
                    // Rule at src/isa/x64/lower.isle line 3975.
21285
0
                    return LibCall::FloorF64;
21286
                }
21287
                &RoundImm::RoundUp => {
21288
                    // Rule at src/isa/x64/lower.isle line 3973.
21289
0
                    return LibCall::CeilF64;
21290
                }
21291
                &RoundImm::RoundZero => {
21292
                    // Rule at src/isa/x64/lower.isle line 3979.
21293
0
                    return LibCall::TruncF64;
21294
                }
21295
0
                _ => {}
21296
            }
21297
        }
21298
0
        _ => {}
21299
    }
21300
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "round_libcall", "src/isa/x64/lower.isle line 3971")
21301
0
}
21302
21303
// Generated as internal constructor for term nonzero_sdiv_divisor.
21304
465
pub fn constructor_nonzero_sdiv_divisor<C: Context>(
21305
465
    ctx: &mut C,
21306
465
    arg0: Type,
21307
465
    arg1: Value,
21308
465
) -> Reg {
21309
465
    let v2 = C::def_inst(ctx, arg1);
21310
465
    if let Some(v3) = v2 {
21311
465
        let v4 = &C::inst_data(ctx, v3);
21312
        if let &InstructionData::UnaryImm {
21313
465
            opcode: ref v5,
21314
465
            imm: v6,
21315
465
        } = v4 {
21316
465
            if let &Opcode::Iconst = v5 {
21317
465
                let v7 = C::safe_divisor_from_imm64(ctx, arg0, v6);
21318
465
                if let Some(v8) = v7 {
21319
465
                    let v9 = constructor_imm(ctx, arg0, v8);
21320
465
                    // Rule at src/isa/x64/lower.isle line 4059.
21321
465
                    return v9;
21322
0
                }
21323
0
            }
21324
0
        }
21325
0
    }
21326
0
    let v10 = C::put_in_reg(ctx, arg1);
21327
0
    let v11 = &C::raw_operand_size_of_type(ctx, arg0);
21328
0
    let v12 = &constructor_reg_to_gpr_mem_imm(ctx, v10);
21329
0
    let v13 = C::gpr_new(ctx, v10);
21330
0
    let v14 = &constructor_x64_test(ctx, v11, v12, v13);
21331
0
    let v17 = &constructor_trap_if(ctx, &CC::Z, &TrapCode::IntegerDivisionByZero);
21332
0
    let v18 = &constructor_with_flags_side_effect(ctx, v14, v17);
21333
0
    let v19 = constructor_side_effect(ctx, v18);
21334
0
    // Rule at src/isa/x64/lower.isle line 4062.
21335
0
    return v10;
21336
465
}
21337
21338
// Generated as internal constructor for term lower_pshufb.
21339
0
pub fn constructor_lower_pshufb<C: Context>(
21340
0
    ctx: &mut C,
21341
0
    arg0: Xmm,
21342
0
    arg1: &RegMem,
21343
0
) -> Xmm {
21344
0
    let v2 = C::use_ssse3(ctx);
21345
0
    if v2 == true {
21346
0
        let v3 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21347
0
        let v4 = constructor_x64_pshufb(ctx, arg0, v3);
21348
0
        // Rule at src/isa/x64/lower.isle line 4357.
21349
0
        return v4;
21350
0
    }
21351
0
    match arg1 {
21352
        &RegMem::Reg {
21353
0
            reg: v5,
21354
0
        } => {
21355
0
            let v7 = C::xmm_to_reg(ctx, arg0);
21356
0
            let v8 = C::libcall_2(ctx, &LibCall::X86Pshufb, v7, v5);
21357
0
            let v9 = C::xmm_new(ctx, v8);
21358
0
            // Rule at src/isa/x64/lower.isle line 4360.
21359
0
            return v9;
21360
        }
21361
        &RegMem::Mem {
21362
0
            addr: ref v10,
21363
0
        } => {
21364
0
            let v11 = &constructor_synthetic_amode_to_xmm_mem(ctx, v10);
21365
0
            let v12 = constructor_x64_movdqu_load(ctx, v11);
21366
0
            let v13 = C::xmm_to_reg(ctx, v12);
21367
0
            let v14 = &constructor_xmm_to_reg_mem(ctx, v13);
21368
0
            let v15 = &C::xmm_mem_to_reg_mem(ctx, v14);
21369
0
            let v16 = constructor_lower_pshufb(ctx, arg0, v15);
21370
0
            // Rule at src/isa/x64/lower.isle line 4362.
21371
0
            return v16;
21372
        }
21373
0
        _ => {}
21374
0
    }
21375
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_pshufb", "src/isa/x64/lower.isle line 4356")
21376
0
}